Loading...
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
4 *
5 * Author: Li Yang <LeoLi@freescale.com>
6 * Jerry Huang <Chang-Ming.Huang@freescale.com>
7 *
8 * Initialization based on code from Shlomi Gridish.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/proc_fs.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/timer.h>
20#include <linux/usb.h>
21#include <linux/device.h>
22#include <linux/usb/ch9.h>
23#include <linux/usb/gadget.h>
24#include <linux/workqueue.h>
25#include <linux/time.h>
26#include <linux/fsl_devices.h>
27#include <linux/platform_device.h>
28#include <linux/uaccess.h>
29
30#include <asm/unaligned.h>
31
32#include "phy-fsl-usb.h"
33
34#ifdef VERBOSE
35#define VDBG(fmt, args...) pr_debug("[%s] " fmt, \
36 __func__, ## args)
37#else
38#define VDBG(stuff...) do {} while (0)
39#endif
40
41#define DRIVER_VERSION "Rev. 1.55"
42#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
43#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
44#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
45
46static const char driver_name[] = "fsl-usb2-otg";
47
48const pm_message_t otg_suspend_state = {
49 .event = 1,
50};
51
52#define HA_DATA_PULSE
53
54static struct usb_dr_mmap *usb_dr_regs;
55static struct fsl_otg *fsl_otg_dev;
56static int srp_wait_done;
57
58/* FSM timers */
59struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
60 *b_ase0_brst_tmr, *b_se0_srp_tmr;
61
62/* Driver specific timers */
63struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
64 *b_srp_wait_tmr, *a_wait_enum_tmr;
65
66static struct list_head active_timers;
67
68static const struct fsl_otg_config fsl_otg_initdata = {
69 .otg_port = 1,
70};
71
72#ifdef CONFIG_PPC32
73static u32 _fsl_readl_be(const unsigned __iomem *p)
74{
75 return in_be32(p);
76}
77
78static u32 _fsl_readl_le(const unsigned __iomem *p)
79{
80 return in_le32(p);
81}
82
83static void _fsl_writel_be(u32 v, unsigned __iomem *p)
84{
85 out_be32(p, v);
86}
87
88static void _fsl_writel_le(u32 v, unsigned __iomem *p)
89{
90 out_le32(p, v);
91}
92
93static u32 (*_fsl_readl)(const unsigned __iomem *p);
94static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
95
96#define fsl_readl(p) (*_fsl_readl)((p))
97#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
98
99#else
100#define fsl_readl(addr) readl(addr)
101#define fsl_writel(val, addr) writel(val, addr)
102#endif /* CONFIG_PPC32 */
103
104int write_ulpi(u8 addr, u8 data)
105{
106 u32 temp;
107
108 temp = 0x60000000 | (addr << 16) | data;
109 fsl_writel(temp, &usb_dr_regs->ulpiview);
110 return 0;
111}
112
113/* -------------------------------------------------------------*/
114/* Operations that will be called from OTG Finite State Machine */
115
116/* Charge vbus for vbus pulsing in SRP */
117void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
118{
119 u32 tmp;
120
121 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
122
123 if (on)
124 /* stop discharging, start charging */
125 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
126 OTGSC_CTRL_VBUS_CHARGE;
127 else
128 /* stop charging */
129 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
130
131 fsl_writel(tmp, &usb_dr_regs->otgsc);
132}
133
134/* Discharge vbus through a resistor to ground */
135void fsl_otg_dischrg_vbus(int on)
136{
137 u32 tmp;
138
139 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
140
141 if (on)
142 /* stop charging, start discharging */
143 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
144 OTGSC_CTRL_VBUS_DISCHARGE;
145 else
146 /* stop discharging */
147 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
148
149 fsl_writel(tmp, &usb_dr_regs->otgsc);
150}
151
152/* A-device driver vbus, controlled through PP bit in PORTSC */
153void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
154{
155 u32 tmp;
156
157 if (on) {
158 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
159 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
160 } else {
161 tmp = fsl_readl(&usb_dr_regs->portsc) &
162 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
163 fsl_writel(tmp, &usb_dr_regs->portsc);
164 }
165}
166
167/*
168 * Pull-up D+, signalling connect by periperal. Also used in
169 * data-line pulsing in SRP
170 */
171void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
172{
173 u32 tmp;
174
175 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
176
177 if (on)
178 tmp |= OTGSC_CTRL_DATA_PULSING;
179 else
180 tmp &= ~OTGSC_CTRL_DATA_PULSING;
181
182 fsl_writel(tmp, &usb_dr_regs->otgsc);
183}
184
185/*
186 * Generate SOF by host. This is controlled through suspend/resume the
187 * port. In host mode, controller will automatically send SOF.
188 * Suspend will block the data on the port.
189 */
190void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
191{
192 u32 tmp;
193
194 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
195 if (on)
196 tmp |= PORTSC_PORT_FORCE_RESUME;
197 else
198 tmp |= PORTSC_PORT_SUSPEND;
199
200 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
201
202}
203
204/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
205void fsl_otg_start_pulse(struct otg_fsm *fsm)
206{
207 u32 tmp;
208
209 srp_wait_done = 0;
210#ifdef HA_DATA_PULSE
211 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
212 tmp |= OTGSC_HA_DATA_PULSE;
213 fsl_writel(tmp, &usb_dr_regs->otgsc);
214#else
215 fsl_otg_loc_conn(1);
216#endif
217
218 fsl_otg_add_timer(fsm, b_data_pulse_tmr);
219}
220
221void b_data_pulse_end(unsigned long foo)
222{
223#ifdef HA_DATA_PULSE
224#else
225 fsl_otg_loc_conn(0);
226#endif
227
228 /* Do VBUS pulse after data pulse */
229 fsl_otg_pulse_vbus();
230}
231
232void fsl_otg_pulse_vbus(void)
233{
234 srp_wait_done = 0;
235 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
236 /* start the timer to end vbus charge */
237 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
238}
239
240void b_vbus_pulse_end(unsigned long foo)
241{
242 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
243
244 /*
245 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
246 * we need to discharge the bus for a while to distinguish
247 * residual voltage of vbus pulsing and A device pull up
248 */
249 fsl_otg_dischrg_vbus(1);
250 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
251}
252
253void b_srp_end(unsigned long foo)
254{
255 fsl_otg_dischrg_vbus(0);
256 srp_wait_done = 1;
257
258 if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
259 fsl_otg_dev->fsm.b_sess_vld)
260 fsl_otg_dev->fsm.b_srp_done = 1;
261}
262
263/*
264 * Workaround for a_host suspending too fast. When a_bus_req=0,
265 * a_host will start by SRP. It needs to set b_hnp_enable before
266 * actually suspending to start HNP
267 */
268void a_wait_enum(unsigned long foo)
269{
270 VDBG("a_wait_enum timeout\n");
271 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
272 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
273 else
274 otg_statemachine(&fsl_otg_dev->fsm);
275}
276
277/* The timeout callback function to set time out bit */
278void set_tmout(unsigned long indicator)
279{
280 *(int *)indicator = 1;
281}
282
283/* Initialize timers */
284int fsl_otg_init_timers(struct otg_fsm *fsm)
285{
286 /* FSM used timers */
287 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
288 (unsigned long)&fsm->a_wait_vrise_tmout);
289 if (!a_wait_vrise_tmr)
290 return -ENOMEM;
291
292 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
293 (unsigned long)&fsm->a_wait_bcon_tmout);
294 if (!a_wait_bcon_tmr)
295 return -ENOMEM;
296
297 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
298 (unsigned long)&fsm->a_aidl_bdis_tmout);
299 if (!a_aidl_bdis_tmr)
300 return -ENOMEM;
301
302 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
303 (unsigned long)&fsm->b_ase0_brst_tmout);
304 if (!b_ase0_brst_tmr)
305 return -ENOMEM;
306
307 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
308 (unsigned long)&fsm->b_se0_srp);
309 if (!b_se0_srp_tmr)
310 return -ENOMEM;
311
312 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
313 (unsigned long)&fsm->b_srp_done);
314 if (!b_srp_fail_tmr)
315 return -ENOMEM;
316
317 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
318 (unsigned long)&fsm);
319 if (!a_wait_enum_tmr)
320 return -ENOMEM;
321
322 /* device driver used timers */
323 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
324 if (!b_srp_wait_tmr)
325 return -ENOMEM;
326
327 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
328 TB_DATA_PLS, 0);
329 if (!b_data_pulse_tmr)
330 return -ENOMEM;
331
332 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
333 TB_VBUS_PLS, 0);
334 if (!b_vbus_pulse_tmr)
335 return -ENOMEM;
336
337 return 0;
338}
339
340/* Uninitialize timers */
341void fsl_otg_uninit_timers(void)
342{
343 /* FSM used timers */
344 kfree(a_wait_vrise_tmr);
345 kfree(a_wait_bcon_tmr);
346 kfree(a_aidl_bdis_tmr);
347 kfree(b_ase0_brst_tmr);
348 kfree(b_se0_srp_tmr);
349 kfree(b_srp_fail_tmr);
350 kfree(a_wait_enum_tmr);
351
352 /* device driver used timers */
353 kfree(b_srp_wait_tmr);
354 kfree(b_data_pulse_tmr);
355 kfree(b_vbus_pulse_tmr);
356}
357
358static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
359{
360 struct fsl_otg_timer *timer;
361
362 /* REVISIT: use array of pointers to timers instead */
363 switch (t) {
364 case A_WAIT_VRISE:
365 timer = a_wait_vrise_tmr;
366 break;
367 case A_WAIT_BCON:
368 timer = a_wait_vrise_tmr;
369 break;
370 case A_AIDL_BDIS:
371 timer = a_wait_vrise_tmr;
372 break;
373 case B_ASE0_BRST:
374 timer = a_wait_vrise_tmr;
375 break;
376 case B_SE0_SRP:
377 timer = a_wait_vrise_tmr;
378 break;
379 case B_SRP_FAIL:
380 timer = a_wait_vrise_tmr;
381 break;
382 case A_WAIT_ENUM:
383 timer = a_wait_vrise_tmr;
384 break;
385 default:
386 timer = NULL;
387 }
388
389 return timer;
390}
391
392/* Add timer to timer list */
393void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
394{
395 struct fsl_otg_timer *timer = gtimer;
396 struct fsl_otg_timer *tmp_timer;
397
398 /*
399 * Check if the timer is already in the active list,
400 * if so update timer count
401 */
402 list_for_each_entry(tmp_timer, &active_timers, list)
403 if (tmp_timer == timer) {
404 timer->count = timer->expires;
405 return;
406 }
407 timer->count = timer->expires;
408 list_add_tail(&timer->list, &active_timers);
409}
410
411static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
412{
413 struct fsl_otg_timer *timer;
414
415 timer = fsl_otg_get_timer(t);
416 if (!timer)
417 return;
418
419 fsl_otg_add_timer(fsm, timer);
420}
421
422/* Remove timer from the timer list; clear timeout status */
423void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
424{
425 struct fsl_otg_timer *timer = gtimer;
426 struct fsl_otg_timer *tmp_timer, *del_tmp;
427
428 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
429 if (tmp_timer == timer)
430 list_del(&timer->list);
431}
432
433static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
434{
435 struct fsl_otg_timer *timer;
436
437 timer = fsl_otg_get_timer(t);
438 if (!timer)
439 return;
440
441 fsl_otg_del_timer(fsm, timer);
442}
443
444/* Reset controller, not reset the bus */
445void otg_reset_controller(void)
446{
447 u32 command;
448
449 command = fsl_readl(&usb_dr_regs->usbcmd);
450 command |= (1 << 1);
451 fsl_writel(command, &usb_dr_regs->usbcmd);
452 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
453 ;
454}
455
456/* Call suspend/resume routines in host driver */
457int fsl_otg_start_host(struct otg_fsm *fsm, int on)
458{
459 struct usb_otg *otg = fsm->otg;
460 struct device *dev;
461 struct fsl_otg *otg_dev =
462 container_of(otg->usb_phy, struct fsl_otg, phy);
463 u32 retval = 0;
464
465 if (!otg->host)
466 return -ENODEV;
467 dev = otg->host->controller;
468
469 /*
470 * Update a_vbus_vld state as a_vbus_vld int is disabled
471 * in device mode
472 */
473 fsm->a_vbus_vld =
474 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
475 if (on) {
476 /* start fsl usb host controller */
477 if (otg_dev->host_working)
478 goto end;
479 else {
480 otg_reset_controller();
481 VDBG("host on......\n");
482 if (dev->driver->pm && dev->driver->pm->resume) {
483 retval = dev->driver->pm->resume(dev);
484 if (fsm->id) {
485 /* default-b */
486 fsl_otg_drv_vbus(fsm, 1);
487 /*
488 * Workaround: b_host can't driver
489 * vbus, but PP in PORTSC needs to
490 * be 1 for host to work.
491 * So we set drv_vbus bit in
492 * transceiver to 0 thru ULPI.
493 */
494 write_ulpi(0x0c, 0x20);
495 }
496 }
497
498 otg_dev->host_working = 1;
499 }
500 } else {
501 /* stop fsl usb host controller */
502 if (!otg_dev->host_working)
503 goto end;
504 else {
505 VDBG("host off......\n");
506 if (dev && dev->driver) {
507 if (dev->driver->pm && dev->driver->pm->suspend)
508 retval = dev->driver->pm->suspend(dev);
509 if (fsm->id)
510 /* default-b */
511 fsl_otg_drv_vbus(fsm, 0);
512 }
513 otg_dev->host_working = 0;
514 }
515 }
516end:
517 return retval;
518}
519
520/*
521 * Call suspend and resume function in udc driver
522 * to stop and start udc driver.
523 */
524int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
525{
526 struct usb_otg *otg = fsm->otg;
527 struct device *dev;
528
529 if (!otg->gadget || !otg->gadget->dev.parent)
530 return -ENODEV;
531
532 VDBG("gadget %s\n", on ? "on" : "off");
533 dev = otg->gadget->dev.parent;
534
535 if (on) {
536 if (dev->driver->resume)
537 dev->driver->resume(dev);
538 } else {
539 if (dev->driver->suspend)
540 dev->driver->suspend(dev, otg_suspend_state);
541 }
542
543 return 0;
544}
545
546/*
547 * Called by initialization code of host driver. Register host controller
548 * to the OTG. Suspend host for OTG role detection.
549 */
550static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
551{
552 struct fsl_otg *otg_dev;
553
554 if (!otg)
555 return -ENODEV;
556
557 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
558 if (otg_dev != fsl_otg_dev)
559 return -ENODEV;
560
561 otg->host = host;
562
563 otg_dev->fsm.a_bus_drop = 0;
564 otg_dev->fsm.a_bus_req = 1;
565
566 if (host) {
567 VDBG("host off......\n");
568
569 otg->host->otg_port = fsl_otg_initdata.otg_port;
570 otg->host->is_b_host = otg_dev->fsm.id;
571 /*
572 * must leave time for hub_wq to finish its thing
573 * before yanking the host driver out from under it,
574 * so suspend the host after a short delay.
575 */
576 otg_dev->host_working = 1;
577 schedule_delayed_work(&otg_dev->otg_event, 100);
578 return 0;
579 } else {
580 /* host driver going away */
581 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
582 OTGSC_STS_USB_ID)) {
583 /* Mini-A cable connected */
584 struct otg_fsm *fsm = &otg_dev->fsm;
585
586 otg->state = OTG_STATE_UNDEFINED;
587 fsm->protocol = PROTO_UNDEF;
588 }
589 }
590
591 otg_dev->host_working = 0;
592
593 otg_statemachine(&otg_dev->fsm);
594
595 return 0;
596}
597
598/* Called by initialization code of udc. Register udc to OTG. */
599static int fsl_otg_set_peripheral(struct usb_otg *otg,
600 struct usb_gadget *gadget)
601{
602 struct fsl_otg *otg_dev;
603
604 if (!otg)
605 return -ENODEV;
606
607 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
608 VDBG("otg_dev 0x%x\n", (int)otg_dev);
609 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
610 if (otg_dev != fsl_otg_dev)
611 return -ENODEV;
612
613 if (!gadget) {
614 if (!otg->default_a)
615 otg->gadget->ops->vbus_draw(otg->gadget, 0);
616 usb_gadget_vbus_disconnect(otg->gadget);
617 otg->gadget = 0;
618 otg_dev->fsm.b_bus_req = 0;
619 otg_statemachine(&otg_dev->fsm);
620 return 0;
621 }
622
623 otg->gadget = gadget;
624 otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
625
626 otg_dev->fsm.b_bus_req = 1;
627
628 /* start the gadget right away if the ID pin says Mini-B */
629 pr_debug("ID pin=%d\n", otg_dev->fsm.id);
630 if (otg_dev->fsm.id == 1) {
631 fsl_otg_start_host(&otg_dev->fsm, 0);
632 otg_drv_vbus(&otg_dev->fsm, 0);
633 fsl_otg_start_gadget(&otg_dev->fsm, 1);
634 }
635
636 return 0;
637}
638
639/*
640 * Delayed pin detect interrupt processing.
641 *
642 * When the Mini-A cable is disconnected from the board,
643 * the pin-detect interrupt happens before the disconnect
644 * interrupts for the connected device(s). In order to
645 * process the disconnect interrupt(s) prior to switching
646 * roles, the pin-detect interrupts are delayed, and handled
647 * by this routine.
648 */
649static void fsl_otg_event(struct work_struct *work)
650{
651 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
652 struct otg_fsm *fsm = &og->fsm;
653
654 if (fsm->id) { /* switch to gadget */
655 fsl_otg_start_host(fsm, 0);
656 otg_drv_vbus(fsm, 0);
657 fsl_otg_start_gadget(fsm, 1);
658 }
659}
660
661/* B-device start SRP */
662static int fsl_otg_start_srp(struct usb_otg *otg)
663{
664 struct fsl_otg *otg_dev;
665
666 if (!otg || otg->state != OTG_STATE_B_IDLE)
667 return -ENODEV;
668
669 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
670 if (otg_dev != fsl_otg_dev)
671 return -ENODEV;
672
673 otg_dev->fsm.b_bus_req = 1;
674 otg_statemachine(&otg_dev->fsm);
675
676 return 0;
677}
678
679/* A_host suspend will call this function to start hnp */
680static int fsl_otg_start_hnp(struct usb_otg *otg)
681{
682 struct fsl_otg *otg_dev;
683
684 if (!otg)
685 return -ENODEV;
686
687 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
688 if (otg_dev != fsl_otg_dev)
689 return -ENODEV;
690
691 pr_debug("start_hnp...\n");
692
693 /* clear a_bus_req to enter a_suspend state */
694 otg_dev->fsm.a_bus_req = 0;
695 otg_statemachine(&otg_dev->fsm);
696
697 return 0;
698}
699
700/*
701 * Interrupt handler. OTG/host/peripheral share the same int line.
702 * OTG driver clears OTGSC interrupts and leaves USB interrupts
703 * intact. It needs to have knowledge of some USB interrupts
704 * such as port change.
705 */
706irqreturn_t fsl_otg_isr(int irq, void *dev_id)
707{
708 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
709 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
710 u32 otg_int_src, otg_sc;
711
712 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
713 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
714
715 /* Only clear otg interrupts */
716 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
717
718 /*FIXME: ID change not generate when init to 0 */
719 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
720 otg->default_a = (fsm->id == 0);
721
722 /* process OTG interrupts */
723 if (otg_int_src) {
724 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
725 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
726 otg->default_a = (fsm->id == 0);
727 /* clear conn information */
728 if (fsm->id)
729 fsm->b_conn = 0;
730 else
731 fsm->a_conn = 0;
732
733 if (otg->host)
734 otg->host->is_b_host = fsm->id;
735 if (otg->gadget)
736 otg->gadget->is_a_peripheral = !fsm->id;
737 VDBG("ID int (ID is %d)\n", fsm->id);
738
739 if (fsm->id) { /* switch to gadget */
740 schedule_delayed_work(
741 &((struct fsl_otg *)dev_id)->otg_event,
742 100);
743 } else { /* switch to host */
744 cancel_delayed_work(&
745 ((struct fsl_otg *)dev_id)->
746 otg_event);
747 fsl_otg_start_gadget(fsm, 0);
748 otg_drv_vbus(fsm, 1);
749 fsl_otg_start_host(fsm, 1);
750 }
751 return IRQ_HANDLED;
752 }
753 }
754 return IRQ_NONE;
755}
756
757static struct otg_fsm_ops fsl_otg_ops = {
758 .chrg_vbus = fsl_otg_chrg_vbus,
759 .drv_vbus = fsl_otg_drv_vbus,
760 .loc_conn = fsl_otg_loc_conn,
761 .loc_sof = fsl_otg_loc_sof,
762 .start_pulse = fsl_otg_start_pulse,
763
764 .add_timer = fsl_otg_fsm_add_timer,
765 .del_timer = fsl_otg_fsm_del_timer,
766
767 .start_host = fsl_otg_start_host,
768 .start_gadget = fsl_otg_start_gadget,
769};
770
771/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
772static int fsl_otg_conf(struct platform_device *pdev)
773{
774 struct fsl_otg *fsl_otg_tc;
775 int status;
776
777 if (fsl_otg_dev)
778 return 0;
779
780 /* allocate space to fsl otg device */
781 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
782 if (!fsl_otg_tc)
783 return -ENOMEM;
784
785 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
786 if (!fsl_otg_tc->phy.otg) {
787 kfree(fsl_otg_tc);
788 return -ENOMEM;
789 }
790
791 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
792
793 INIT_LIST_HEAD(&active_timers);
794 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
795 if (status) {
796 pr_info("Couldn't init OTG timers\n");
797 goto err;
798 }
799 mutex_init(&fsl_otg_tc->fsm.lock);
800
801 /* Set OTG state machine operations */
802 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
803
804 /* initialize the otg structure */
805 fsl_otg_tc->phy.label = DRIVER_DESC;
806 fsl_otg_tc->phy.dev = &pdev->dev;
807
808 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
809 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
810 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
811 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
812 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
813
814 fsl_otg_dev = fsl_otg_tc;
815
816 /* Store the otg transceiver */
817 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
818 if (status) {
819 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
820 goto err;
821 }
822
823 return 0;
824err:
825 fsl_otg_uninit_timers();
826 kfree(fsl_otg_tc->phy.otg);
827 kfree(fsl_otg_tc);
828 return status;
829}
830
831/* OTG Initialization */
832int usb_otg_start(struct platform_device *pdev)
833{
834 struct fsl_otg *p_otg;
835 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
836 struct otg_fsm *fsm;
837 int status;
838 struct resource *res;
839 u32 temp;
840 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
841
842 p_otg = container_of(otg_trans, struct fsl_otg, phy);
843 fsm = &p_otg->fsm;
844
845 /* Initialize the state machine structure with default values */
846 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
847 fsm->otg = p_otg->phy.otg;
848
849 /* We don't require predefined MEM/IRQ resource index */
850 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
851 if (!res)
852 return -ENXIO;
853
854 /* We don't request_mem_region here to enable resource sharing
855 * with host/device */
856
857 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
858 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
859 pdata->regs = (void *)usb_dr_regs;
860
861 if (pdata->init && pdata->init(pdev) != 0)
862 return -EINVAL;
863
864#ifdef CONFIG_PPC32
865 if (pdata->big_endian_mmio) {
866 _fsl_readl = _fsl_readl_be;
867 _fsl_writel = _fsl_writel_be;
868 } else {
869 _fsl_readl = _fsl_readl_le;
870 _fsl_writel = _fsl_writel_le;
871 }
872#endif
873
874 /* request irq */
875 p_otg->irq = platform_get_irq(pdev, 0);
876 if (p_otg->irq < 0)
877 return p_otg->irq;
878 status = request_irq(p_otg->irq, fsl_otg_isr,
879 IRQF_SHARED, driver_name, p_otg);
880 if (status) {
881 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
882 p_otg->irq, status);
883 iounmap(p_otg->dr_mem_map);
884 kfree(p_otg->phy.otg);
885 kfree(p_otg);
886 return status;
887 }
888
889 /* stop the controller */
890 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
891 temp &= ~USB_CMD_RUN_STOP;
892 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
893
894 /* reset the controller */
895 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
896 temp |= USB_CMD_CTRL_RESET;
897 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
898
899 /* wait reset completed */
900 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
901 ;
902
903 /* configure the VBUSHS as IDLE(both host and device) */
904 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
905 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
906
907 /* configure PHY interface */
908 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
909 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
910 switch (pdata->phy_mode) {
911 case FSL_USB2_PHY_ULPI:
912 temp |= PORTSC_PTS_ULPI;
913 break;
914 case FSL_USB2_PHY_UTMI_WIDE:
915 temp |= PORTSC_PTW_16BIT;
916 fallthrough;
917 case FSL_USB2_PHY_UTMI:
918 temp |= PORTSC_PTS_UTMI;
919 fallthrough;
920 default:
921 break;
922 }
923 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
924
925 if (pdata->have_sysif_regs) {
926 /* configure control enable IO output, big endian register */
927 temp = __raw_readl(&p_otg->dr_mem_map->control);
928 temp |= USB_CTRL_IOENB;
929 __raw_writel(temp, &p_otg->dr_mem_map->control);
930 }
931
932 /* disable all interrupt and clear all OTGSC status */
933 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
934 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
935 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
936 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
937
938 /*
939 * The identification (id) input is FALSE when a Mini-A plug is inserted
940 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
941 * Also: record initial state of ID pin
942 */
943 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
944 p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
945 p_otg->fsm.id = 1;
946 } else {
947 p_otg->phy.otg->state = OTG_STATE_A_IDLE;
948 p_otg->fsm.id = 0;
949 }
950
951 pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
952
953 /* enable OTG ID pin interrupt */
954 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
955 temp |= OTGSC_INTR_USB_ID_EN;
956 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
957 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
958
959 return 0;
960}
961
962static int fsl_otg_probe(struct platform_device *pdev)
963{
964 int ret;
965
966 if (!dev_get_platdata(&pdev->dev))
967 return -ENODEV;
968
969 /* configure the OTG */
970 ret = fsl_otg_conf(pdev);
971 if (ret) {
972 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
973 return ret;
974 }
975
976 /* start OTG */
977 ret = usb_otg_start(pdev);
978 if (ret) {
979 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
980 return ret;
981 }
982
983 return ret;
984}
985
986static void fsl_otg_remove(struct platform_device *pdev)
987{
988 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
989
990 usb_remove_phy(&fsl_otg_dev->phy);
991 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
992
993 iounmap((void *)usb_dr_regs);
994
995 fsl_otg_uninit_timers();
996 kfree(fsl_otg_dev->phy.otg);
997 kfree(fsl_otg_dev);
998
999 if (pdata->exit)
1000 pdata->exit(pdev);
1001}
1002
1003struct platform_driver fsl_otg_driver = {
1004 .probe = fsl_otg_probe,
1005 .remove_new = fsl_otg_remove,
1006 .driver = {
1007 .name = driver_name,
1008 .owner = THIS_MODULE,
1009 },
1010};
1011
1012module_platform_driver(fsl_otg_driver);
1013
1014MODULE_DESCRIPTION(DRIVER_INFO);
1015MODULE_AUTHOR(DRIVER_AUTHOR);
1016MODULE_LICENSE("GPL");
1/*
2 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
3 *
4 * Author: Li Yang <LeoLi@freescale.com>
5 * Jerry Huang <Chang-Ming.Huang@freescale.com>
6 *
7 * Initialization based on code from Shlomi Gridish.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/proc_fs.h>
29#include <linux/errno.h>
30#include <linux/interrupt.h>
31#include <linux/io.h>
32#include <linux/timer.h>
33#include <linux/usb.h>
34#include <linux/device.h>
35#include <linux/usb/ch9.h>
36#include <linux/usb/gadget.h>
37#include <linux/workqueue.h>
38#include <linux/time.h>
39#include <linux/fsl_devices.h>
40#include <linux/platform_device.h>
41#include <linux/uaccess.h>
42
43#include <asm/unaligned.h>
44
45#include "phy-fsl-usb.h"
46
47#define DRIVER_VERSION "Rev. 1.55"
48#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
49#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
50#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
51
52static const char driver_name[] = "fsl-usb2-otg";
53
54const pm_message_t otg_suspend_state = {
55 .event = 1,
56};
57
58#define HA_DATA_PULSE
59
60static struct usb_dr_mmap *usb_dr_regs;
61static struct fsl_otg *fsl_otg_dev;
62static int srp_wait_done;
63
64/* FSM timers */
65struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
66 *b_ase0_brst_tmr, *b_se0_srp_tmr;
67
68/* Driver specific timers */
69struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
70 *b_srp_wait_tmr, *a_wait_enum_tmr;
71
72static struct list_head active_timers;
73
74static struct fsl_otg_config fsl_otg_initdata = {
75 .otg_port = 1,
76};
77
78#ifdef CONFIG_PPC32
79static u32 _fsl_readl_be(const unsigned __iomem *p)
80{
81 return in_be32(p);
82}
83
84static u32 _fsl_readl_le(const unsigned __iomem *p)
85{
86 return in_le32(p);
87}
88
89static void _fsl_writel_be(u32 v, unsigned __iomem *p)
90{
91 out_be32(p, v);
92}
93
94static void _fsl_writel_le(u32 v, unsigned __iomem *p)
95{
96 out_le32(p, v);
97}
98
99static u32 (*_fsl_readl)(const unsigned __iomem *p);
100static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
101
102#define fsl_readl(p) (*_fsl_readl)((p))
103#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
104
105#else
106#define fsl_readl(addr) readl(addr)
107#define fsl_writel(val, addr) writel(val, addr)
108#endif /* CONFIG_PPC32 */
109
110int write_ulpi(u8 addr, u8 data)
111{
112 u32 temp;
113
114 temp = 0x60000000 | (addr << 16) | data;
115 fsl_writel(temp, &usb_dr_regs->ulpiview);
116 return 0;
117}
118
119/* -------------------------------------------------------------*/
120/* Operations that will be called from OTG Finite State Machine */
121
122/* Charge vbus for vbus pulsing in SRP */
123void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
124{
125 u32 tmp;
126
127 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
128
129 if (on)
130 /* stop discharging, start charging */
131 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
132 OTGSC_CTRL_VBUS_CHARGE;
133 else
134 /* stop charging */
135 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
136
137 fsl_writel(tmp, &usb_dr_regs->otgsc);
138}
139
140/* Discharge vbus through a resistor to ground */
141void fsl_otg_dischrg_vbus(int on)
142{
143 u32 tmp;
144
145 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
146
147 if (on)
148 /* stop charging, start discharging */
149 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
150 OTGSC_CTRL_VBUS_DISCHARGE;
151 else
152 /* stop discharging */
153 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
154
155 fsl_writel(tmp, &usb_dr_regs->otgsc);
156}
157
158/* A-device driver vbus, controlled through PP bit in PORTSC */
159void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
160{
161 u32 tmp;
162
163 if (on) {
164 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
165 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
166 } else {
167 tmp = fsl_readl(&usb_dr_regs->portsc) &
168 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
169 fsl_writel(tmp, &usb_dr_regs->portsc);
170 }
171}
172
173/*
174 * Pull-up D+, signalling connect by periperal. Also used in
175 * data-line pulsing in SRP
176 */
177void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
178{
179 u32 tmp;
180
181 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
182
183 if (on)
184 tmp |= OTGSC_CTRL_DATA_PULSING;
185 else
186 tmp &= ~OTGSC_CTRL_DATA_PULSING;
187
188 fsl_writel(tmp, &usb_dr_regs->otgsc);
189}
190
191/*
192 * Generate SOF by host. This is controlled through suspend/resume the
193 * port. In host mode, controller will automatically send SOF.
194 * Suspend will block the data on the port.
195 */
196void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
197{
198 u32 tmp;
199
200 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
201 if (on)
202 tmp |= PORTSC_PORT_FORCE_RESUME;
203 else
204 tmp |= PORTSC_PORT_SUSPEND;
205
206 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
207
208}
209
210/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
211void fsl_otg_start_pulse(struct otg_fsm *fsm)
212{
213 u32 tmp;
214
215 srp_wait_done = 0;
216#ifdef HA_DATA_PULSE
217 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
218 tmp |= OTGSC_HA_DATA_PULSE;
219 fsl_writel(tmp, &usb_dr_regs->otgsc);
220#else
221 fsl_otg_loc_conn(1);
222#endif
223
224 fsl_otg_add_timer(fsm, b_data_pulse_tmr);
225}
226
227void b_data_pulse_end(unsigned long foo)
228{
229#ifdef HA_DATA_PULSE
230#else
231 fsl_otg_loc_conn(0);
232#endif
233
234 /* Do VBUS pulse after data pulse */
235 fsl_otg_pulse_vbus();
236}
237
238void fsl_otg_pulse_vbus(void)
239{
240 srp_wait_done = 0;
241 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
242 /* start the timer to end vbus charge */
243 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
244}
245
246void b_vbus_pulse_end(unsigned long foo)
247{
248 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
249
250 /*
251 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
252 * we need to discharge the bus for a while to distinguish
253 * residual voltage of vbus pulsing and A device pull up
254 */
255 fsl_otg_dischrg_vbus(1);
256 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
257}
258
259void b_srp_end(unsigned long foo)
260{
261 fsl_otg_dischrg_vbus(0);
262 srp_wait_done = 1;
263
264 if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
265 fsl_otg_dev->fsm.b_sess_vld)
266 fsl_otg_dev->fsm.b_srp_done = 1;
267}
268
269/*
270 * Workaround for a_host suspending too fast. When a_bus_req=0,
271 * a_host will start by SRP. It needs to set b_hnp_enable before
272 * actually suspending to start HNP
273 */
274void a_wait_enum(unsigned long foo)
275{
276 VDBG("a_wait_enum timeout\n");
277 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
278 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
279 else
280 otg_statemachine(&fsl_otg_dev->fsm);
281}
282
283/* The timeout callback function to set time out bit */
284void set_tmout(unsigned long indicator)
285{
286 *(int *)indicator = 1;
287}
288
289/* Initialize timers */
290int fsl_otg_init_timers(struct otg_fsm *fsm)
291{
292 /* FSM used timers */
293 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
294 (unsigned long)&fsm->a_wait_vrise_tmout);
295 if (!a_wait_vrise_tmr)
296 return -ENOMEM;
297
298 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
299 (unsigned long)&fsm->a_wait_bcon_tmout);
300 if (!a_wait_bcon_tmr)
301 return -ENOMEM;
302
303 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
304 (unsigned long)&fsm->a_aidl_bdis_tmout);
305 if (!a_aidl_bdis_tmr)
306 return -ENOMEM;
307
308 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
309 (unsigned long)&fsm->b_ase0_brst_tmout);
310 if (!b_ase0_brst_tmr)
311 return -ENOMEM;
312
313 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
314 (unsigned long)&fsm->b_se0_srp);
315 if (!b_se0_srp_tmr)
316 return -ENOMEM;
317
318 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
319 (unsigned long)&fsm->b_srp_done);
320 if (!b_srp_fail_tmr)
321 return -ENOMEM;
322
323 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
324 (unsigned long)&fsm);
325 if (!a_wait_enum_tmr)
326 return -ENOMEM;
327
328 /* device driver used timers */
329 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
330 if (!b_srp_wait_tmr)
331 return -ENOMEM;
332
333 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
334 TB_DATA_PLS, 0);
335 if (!b_data_pulse_tmr)
336 return -ENOMEM;
337
338 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
339 TB_VBUS_PLS, 0);
340 if (!b_vbus_pulse_tmr)
341 return -ENOMEM;
342
343 return 0;
344}
345
346/* Uninitialize timers */
347void fsl_otg_uninit_timers(void)
348{
349 /* FSM used timers */
350 kfree(a_wait_vrise_tmr);
351 kfree(a_wait_bcon_tmr);
352 kfree(a_aidl_bdis_tmr);
353 kfree(b_ase0_brst_tmr);
354 kfree(b_se0_srp_tmr);
355 kfree(b_srp_fail_tmr);
356 kfree(a_wait_enum_tmr);
357
358 /* device driver used timers */
359 kfree(b_srp_wait_tmr);
360 kfree(b_data_pulse_tmr);
361 kfree(b_vbus_pulse_tmr);
362}
363
364static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
365{
366 struct fsl_otg_timer *timer;
367
368 /* REVISIT: use array of pointers to timers instead */
369 switch (t) {
370 case A_WAIT_VRISE:
371 timer = a_wait_vrise_tmr;
372 break;
373 case A_WAIT_BCON:
374 timer = a_wait_vrise_tmr;
375 break;
376 case A_AIDL_BDIS:
377 timer = a_wait_vrise_tmr;
378 break;
379 case B_ASE0_BRST:
380 timer = a_wait_vrise_tmr;
381 break;
382 case B_SE0_SRP:
383 timer = a_wait_vrise_tmr;
384 break;
385 case B_SRP_FAIL:
386 timer = a_wait_vrise_tmr;
387 break;
388 case A_WAIT_ENUM:
389 timer = a_wait_vrise_tmr;
390 break;
391 default:
392 timer = NULL;
393 }
394
395 return timer;
396}
397
398/* Add timer to timer list */
399void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
400{
401 struct fsl_otg_timer *timer = gtimer;
402 struct fsl_otg_timer *tmp_timer;
403
404 /*
405 * Check if the timer is already in the active list,
406 * if so update timer count
407 */
408 list_for_each_entry(tmp_timer, &active_timers, list)
409 if (tmp_timer == timer) {
410 timer->count = timer->expires;
411 return;
412 }
413 timer->count = timer->expires;
414 list_add_tail(&timer->list, &active_timers);
415}
416
417static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
418{
419 struct fsl_otg_timer *timer;
420
421 timer = fsl_otg_get_timer(t);
422 if (!timer)
423 return;
424
425 fsl_otg_add_timer(fsm, timer);
426}
427
428/* Remove timer from the timer list; clear timeout status */
429void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
430{
431 struct fsl_otg_timer *timer = gtimer;
432 struct fsl_otg_timer *tmp_timer, *del_tmp;
433
434 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
435 if (tmp_timer == timer)
436 list_del(&timer->list);
437}
438
439static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
440{
441 struct fsl_otg_timer *timer;
442
443 timer = fsl_otg_get_timer(t);
444 if (!timer)
445 return;
446
447 fsl_otg_del_timer(fsm, timer);
448}
449
450/* Reset controller, not reset the bus */
451void otg_reset_controller(void)
452{
453 u32 command;
454
455 command = fsl_readl(&usb_dr_regs->usbcmd);
456 command |= (1 << 1);
457 fsl_writel(command, &usb_dr_regs->usbcmd);
458 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
459 ;
460}
461
462/* Call suspend/resume routines in host driver */
463int fsl_otg_start_host(struct otg_fsm *fsm, int on)
464{
465 struct usb_otg *otg = fsm->otg;
466 struct device *dev;
467 struct fsl_otg *otg_dev =
468 container_of(otg->usb_phy, struct fsl_otg, phy);
469 u32 retval = 0;
470
471 if (!otg->host)
472 return -ENODEV;
473 dev = otg->host->controller;
474
475 /*
476 * Update a_vbus_vld state as a_vbus_vld int is disabled
477 * in device mode
478 */
479 fsm->a_vbus_vld =
480 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
481 if (on) {
482 /* start fsl usb host controller */
483 if (otg_dev->host_working)
484 goto end;
485 else {
486 otg_reset_controller();
487 VDBG("host on......\n");
488 if (dev->driver->pm && dev->driver->pm->resume) {
489 retval = dev->driver->pm->resume(dev);
490 if (fsm->id) {
491 /* default-b */
492 fsl_otg_drv_vbus(fsm, 1);
493 /*
494 * Workaround: b_host can't driver
495 * vbus, but PP in PORTSC needs to
496 * be 1 for host to work.
497 * So we set drv_vbus bit in
498 * transceiver to 0 thru ULPI.
499 */
500 write_ulpi(0x0c, 0x20);
501 }
502 }
503
504 otg_dev->host_working = 1;
505 }
506 } else {
507 /* stop fsl usb host controller */
508 if (!otg_dev->host_working)
509 goto end;
510 else {
511 VDBG("host off......\n");
512 if (dev && dev->driver) {
513 if (dev->driver->pm && dev->driver->pm->suspend)
514 retval = dev->driver->pm->suspend(dev);
515 if (fsm->id)
516 /* default-b */
517 fsl_otg_drv_vbus(fsm, 0);
518 }
519 otg_dev->host_working = 0;
520 }
521 }
522end:
523 return retval;
524}
525
526/*
527 * Call suspend and resume function in udc driver
528 * to stop and start udc driver.
529 */
530int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
531{
532 struct usb_otg *otg = fsm->otg;
533 struct device *dev;
534
535 if (!otg->gadget || !otg->gadget->dev.parent)
536 return -ENODEV;
537
538 VDBG("gadget %s\n", on ? "on" : "off");
539 dev = otg->gadget->dev.parent;
540
541 if (on) {
542 if (dev->driver->resume)
543 dev->driver->resume(dev);
544 } else {
545 if (dev->driver->suspend)
546 dev->driver->suspend(dev, otg_suspend_state);
547 }
548
549 return 0;
550}
551
552/*
553 * Called by initialization code of host driver. Register host controller
554 * to the OTG. Suspend host for OTG role detection.
555 */
556static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
557{
558 struct fsl_otg *otg_dev;
559
560 if (!otg)
561 return -ENODEV;
562
563 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
564 if (otg_dev != fsl_otg_dev)
565 return -ENODEV;
566
567 otg->host = host;
568
569 otg_dev->fsm.a_bus_drop = 0;
570 otg_dev->fsm.a_bus_req = 1;
571
572 if (host) {
573 VDBG("host off......\n");
574
575 otg->host->otg_port = fsl_otg_initdata.otg_port;
576 otg->host->is_b_host = otg_dev->fsm.id;
577 /*
578 * must leave time for hub_wq to finish its thing
579 * before yanking the host driver out from under it,
580 * so suspend the host after a short delay.
581 */
582 otg_dev->host_working = 1;
583 schedule_delayed_work(&otg_dev->otg_event, 100);
584 return 0;
585 } else {
586 /* host driver going away */
587 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
588 OTGSC_STS_USB_ID)) {
589 /* Mini-A cable connected */
590 struct otg_fsm *fsm = &otg_dev->fsm;
591
592 otg->state = OTG_STATE_UNDEFINED;
593 fsm->protocol = PROTO_UNDEF;
594 }
595 }
596
597 otg_dev->host_working = 0;
598
599 otg_statemachine(&otg_dev->fsm);
600
601 return 0;
602}
603
604/* Called by initialization code of udc. Register udc to OTG. */
605static int fsl_otg_set_peripheral(struct usb_otg *otg,
606 struct usb_gadget *gadget)
607{
608 struct fsl_otg *otg_dev;
609
610 if (!otg)
611 return -ENODEV;
612
613 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
614 VDBG("otg_dev 0x%x\n", (int)otg_dev);
615 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
616 if (otg_dev != fsl_otg_dev)
617 return -ENODEV;
618
619 if (!gadget) {
620 if (!otg->default_a)
621 otg->gadget->ops->vbus_draw(otg->gadget, 0);
622 usb_gadget_vbus_disconnect(otg->gadget);
623 otg->gadget = 0;
624 otg_dev->fsm.b_bus_req = 0;
625 otg_statemachine(&otg_dev->fsm);
626 return 0;
627 }
628
629 otg->gadget = gadget;
630 otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
631
632 otg_dev->fsm.b_bus_req = 1;
633
634 /* start the gadget right away if the ID pin says Mini-B */
635 pr_debug("ID pin=%d\n", otg_dev->fsm.id);
636 if (otg_dev->fsm.id == 1) {
637 fsl_otg_start_host(&otg_dev->fsm, 0);
638 otg_drv_vbus(&otg_dev->fsm, 0);
639 fsl_otg_start_gadget(&otg_dev->fsm, 1);
640 }
641
642 return 0;
643}
644
645/* Set OTG port power, only for B-device */
646static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
647{
648 if (!fsl_otg_dev)
649 return -ENODEV;
650 if (phy->otg->state == OTG_STATE_B_PERIPHERAL)
651 pr_info("FSL OTG: Draw %d mA\n", mA);
652
653 return 0;
654}
655
656/*
657 * Delayed pin detect interrupt processing.
658 *
659 * When the Mini-A cable is disconnected from the board,
660 * the pin-detect interrupt happens before the disconnect
661 * interrupts for the connected device(s). In order to
662 * process the disconnect interrupt(s) prior to switching
663 * roles, the pin-detect interrupts are delayed, and handled
664 * by this routine.
665 */
666static void fsl_otg_event(struct work_struct *work)
667{
668 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
669 struct otg_fsm *fsm = &og->fsm;
670
671 if (fsm->id) { /* switch to gadget */
672 fsl_otg_start_host(fsm, 0);
673 otg_drv_vbus(fsm, 0);
674 fsl_otg_start_gadget(fsm, 1);
675 }
676}
677
678/* B-device start SRP */
679static int fsl_otg_start_srp(struct usb_otg *otg)
680{
681 struct fsl_otg *otg_dev;
682
683 if (!otg || otg->state != OTG_STATE_B_IDLE)
684 return -ENODEV;
685
686 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
687 if (otg_dev != fsl_otg_dev)
688 return -ENODEV;
689
690 otg_dev->fsm.b_bus_req = 1;
691 otg_statemachine(&otg_dev->fsm);
692
693 return 0;
694}
695
696/* A_host suspend will call this function to start hnp */
697static int fsl_otg_start_hnp(struct usb_otg *otg)
698{
699 struct fsl_otg *otg_dev;
700
701 if (!otg)
702 return -ENODEV;
703
704 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
705 if (otg_dev != fsl_otg_dev)
706 return -ENODEV;
707
708 pr_debug("start_hnp...\n");
709
710 /* clear a_bus_req to enter a_suspend state */
711 otg_dev->fsm.a_bus_req = 0;
712 otg_statemachine(&otg_dev->fsm);
713
714 return 0;
715}
716
717/*
718 * Interrupt handler. OTG/host/peripheral share the same int line.
719 * OTG driver clears OTGSC interrupts and leaves USB interrupts
720 * intact. It needs to have knowledge of some USB interrupts
721 * such as port change.
722 */
723irqreturn_t fsl_otg_isr(int irq, void *dev_id)
724{
725 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
726 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
727 u32 otg_int_src, otg_sc;
728
729 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
730 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
731
732 /* Only clear otg interrupts */
733 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
734
735 /*FIXME: ID change not generate when init to 0 */
736 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
737 otg->default_a = (fsm->id == 0);
738
739 /* process OTG interrupts */
740 if (otg_int_src) {
741 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
742 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
743 otg->default_a = (fsm->id == 0);
744 /* clear conn information */
745 if (fsm->id)
746 fsm->b_conn = 0;
747 else
748 fsm->a_conn = 0;
749
750 if (otg->host)
751 otg->host->is_b_host = fsm->id;
752 if (otg->gadget)
753 otg->gadget->is_a_peripheral = !fsm->id;
754 VDBG("ID int (ID is %d)\n", fsm->id);
755
756 if (fsm->id) { /* switch to gadget */
757 schedule_delayed_work(
758 &((struct fsl_otg *)dev_id)->otg_event,
759 100);
760 } else { /* switch to host */
761 cancel_delayed_work(&
762 ((struct fsl_otg *)dev_id)->
763 otg_event);
764 fsl_otg_start_gadget(fsm, 0);
765 otg_drv_vbus(fsm, 1);
766 fsl_otg_start_host(fsm, 1);
767 }
768 return IRQ_HANDLED;
769 }
770 }
771 return IRQ_NONE;
772}
773
774static struct otg_fsm_ops fsl_otg_ops = {
775 .chrg_vbus = fsl_otg_chrg_vbus,
776 .drv_vbus = fsl_otg_drv_vbus,
777 .loc_conn = fsl_otg_loc_conn,
778 .loc_sof = fsl_otg_loc_sof,
779 .start_pulse = fsl_otg_start_pulse,
780
781 .add_timer = fsl_otg_fsm_add_timer,
782 .del_timer = fsl_otg_fsm_del_timer,
783
784 .start_host = fsl_otg_start_host,
785 .start_gadget = fsl_otg_start_gadget,
786};
787
788/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
789static int fsl_otg_conf(struct platform_device *pdev)
790{
791 struct fsl_otg *fsl_otg_tc;
792 int status;
793
794 if (fsl_otg_dev)
795 return 0;
796
797 /* allocate space to fsl otg device */
798 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
799 if (!fsl_otg_tc)
800 return -ENOMEM;
801
802 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
803 if (!fsl_otg_tc->phy.otg) {
804 kfree(fsl_otg_tc);
805 return -ENOMEM;
806 }
807
808 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
809
810 INIT_LIST_HEAD(&active_timers);
811 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
812 if (status) {
813 pr_info("Couldn't init OTG timers\n");
814 goto err;
815 }
816 mutex_init(&fsl_otg_tc->fsm.lock);
817
818 /* Set OTG state machine operations */
819 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
820
821 /* initialize the otg structure */
822 fsl_otg_tc->phy.label = DRIVER_DESC;
823 fsl_otg_tc->phy.dev = &pdev->dev;
824 fsl_otg_tc->phy.set_power = fsl_otg_set_power;
825
826 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
827 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
828 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
829 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
830 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
831
832 fsl_otg_dev = fsl_otg_tc;
833
834 /* Store the otg transceiver */
835 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
836 if (status) {
837 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
838 goto err;
839 }
840
841 return 0;
842err:
843 fsl_otg_uninit_timers();
844 kfree(fsl_otg_tc->phy.otg);
845 kfree(fsl_otg_tc);
846 return status;
847}
848
849/* OTG Initialization */
850int usb_otg_start(struct platform_device *pdev)
851{
852 struct fsl_otg *p_otg;
853 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
854 struct otg_fsm *fsm;
855 int status;
856 struct resource *res;
857 u32 temp;
858 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
859
860 p_otg = container_of(otg_trans, struct fsl_otg, phy);
861 fsm = &p_otg->fsm;
862
863 /* Initialize the state machine structure with default values */
864 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
865 fsm->otg = p_otg->phy.otg;
866
867 /* We don't require predefined MEM/IRQ resource index */
868 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
869 if (!res)
870 return -ENXIO;
871
872 /* We don't request_mem_region here to enable resource sharing
873 * with host/device */
874
875 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
876 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
877 pdata->regs = (void *)usb_dr_regs;
878
879 if (pdata->init && pdata->init(pdev) != 0)
880 return -EINVAL;
881
882 if (pdata->big_endian_mmio) {
883 _fsl_readl = _fsl_readl_be;
884 _fsl_writel = _fsl_writel_be;
885 } else {
886 _fsl_readl = _fsl_readl_le;
887 _fsl_writel = _fsl_writel_le;
888 }
889
890 /* request irq */
891 p_otg->irq = platform_get_irq(pdev, 0);
892 status = request_irq(p_otg->irq, fsl_otg_isr,
893 IRQF_SHARED, driver_name, p_otg);
894 if (status) {
895 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
896 p_otg->irq, status);
897 iounmap(p_otg->dr_mem_map);
898 kfree(p_otg->phy.otg);
899 kfree(p_otg);
900 return status;
901 }
902
903 /* stop the controller */
904 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
905 temp &= ~USB_CMD_RUN_STOP;
906 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
907
908 /* reset the controller */
909 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
910 temp |= USB_CMD_CTRL_RESET;
911 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
912
913 /* wait reset completed */
914 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
915 ;
916
917 /* configure the VBUSHS as IDLE(both host and device) */
918 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
919 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
920
921 /* configure PHY interface */
922 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
923 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
924 switch (pdata->phy_mode) {
925 case FSL_USB2_PHY_ULPI:
926 temp |= PORTSC_PTS_ULPI;
927 break;
928 case FSL_USB2_PHY_UTMI_WIDE:
929 temp |= PORTSC_PTW_16BIT;
930 /* fall through */
931 case FSL_USB2_PHY_UTMI:
932 temp |= PORTSC_PTS_UTMI;
933 /* fall through */
934 default:
935 break;
936 }
937 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
938
939 if (pdata->have_sysif_regs) {
940 /* configure control enable IO output, big endian register */
941 temp = __raw_readl(&p_otg->dr_mem_map->control);
942 temp |= USB_CTRL_IOENB;
943 __raw_writel(temp, &p_otg->dr_mem_map->control);
944 }
945
946 /* disable all interrupt and clear all OTGSC status */
947 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
948 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
949 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
950 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
951
952 /*
953 * The identification (id) input is FALSE when a Mini-A plug is inserted
954 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
955 * Also: record initial state of ID pin
956 */
957 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
958 p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
959 p_otg->fsm.id = 1;
960 } else {
961 p_otg->phy.otg->state = OTG_STATE_A_IDLE;
962 p_otg->fsm.id = 0;
963 }
964
965 pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
966
967 /* enable OTG ID pin interrupt */
968 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
969 temp |= OTGSC_INTR_USB_ID_EN;
970 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
971 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
972
973 return 0;
974}
975
976/*
977 * state file in sysfs
978 */
979static int show_fsl_usb2_otg_state(struct device *dev,
980 struct device_attribute *attr, char *buf)
981{
982 struct otg_fsm *fsm = &fsl_otg_dev->fsm;
983 char *next = buf;
984 unsigned size = PAGE_SIZE;
985 int t;
986
987 mutex_lock(&fsm->lock);
988
989 /* basic driver infomation */
990 t = scnprintf(next, size,
991 DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
992 DRIVER_VERSION);
993 size -= t;
994 next += t;
995
996 /* Registers */
997 t = scnprintf(next, size,
998 "OTGSC: 0x%08x\n"
999 "PORTSC: 0x%08x\n"
1000 "USBMODE: 0x%08x\n"
1001 "USBCMD: 0x%08x\n"
1002 "USBSTS: 0x%08x\n"
1003 "USBINTR: 0x%08x\n",
1004 fsl_readl(&usb_dr_regs->otgsc),
1005 fsl_readl(&usb_dr_regs->portsc),
1006 fsl_readl(&usb_dr_regs->usbmode),
1007 fsl_readl(&usb_dr_regs->usbcmd),
1008 fsl_readl(&usb_dr_regs->usbsts),
1009 fsl_readl(&usb_dr_regs->usbintr));
1010 size -= t;
1011 next += t;
1012
1013 /* State */
1014 t = scnprintf(next, size,
1015 "OTG state: %s\n\n",
1016 usb_otg_state_string(fsl_otg_dev->phy.otg->state));
1017 size -= t;
1018 next += t;
1019
1020 /* State Machine Variables */
1021 t = scnprintf(next, size,
1022 "a_bus_req: %d\n"
1023 "b_bus_req: %d\n"
1024 "a_bus_resume: %d\n"
1025 "a_bus_suspend: %d\n"
1026 "a_conn: %d\n"
1027 "a_sess_vld: %d\n"
1028 "a_srp_det: %d\n"
1029 "a_vbus_vld: %d\n"
1030 "b_bus_resume: %d\n"
1031 "b_bus_suspend: %d\n"
1032 "b_conn: %d\n"
1033 "b_se0_srp: %d\n"
1034 "b_ssend_srp: %d\n"
1035 "b_sess_vld: %d\n"
1036 "id: %d\n",
1037 fsm->a_bus_req,
1038 fsm->b_bus_req,
1039 fsm->a_bus_resume,
1040 fsm->a_bus_suspend,
1041 fsm->a_conn,
1042 fsm->a_sess_vld,
1043 fsm->a_srp_det,
1044 fsm->a_vbus_vld,
1045 fsm->b_bus_resume,
1046 fsm->b_bus_suspend,
1047 fsm->b_conn,
1048 fsm->b_se0_srp,
1049 fsm->b_ssend_srp,
1050 fsm->b_sess_vld,
1051 fsm->id);
1052 size -= t;
1053 next += t;
1054
1055 mutex_unlock(&fsm->lock);
1056
1057 return PAGE_SIZE - size;
1058}
1059
1060static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1061
1062
1063/* Char driver interface to control some OTG input */
1064
1065/*
1066 * Handle some ioctl command, such as get otg
1067 * status and set host suspend
1068 */
1069static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1070 unsigned long arg)
1071{
1072 u32 retval = 0;
1073
1074 switch (cmd) {
1075 case GET_OTG_STATUS:
1076 retval = fsl_otg_dev->host_working;
1077 break;
1078
1079 case SET_A_SUSPEND_REQ:
1080 fsl_otg_dev->fsm.a_suspend_req_inf = arg;
1081 break;
1082
1083 case SET_A_BUS_DROP:
1084 fsl_otg_dev->fsm.a_bus_drop = arg;
1085 break;
1086
1087 case SET_A_BUS_REQ:
1088 fsl_otg_dev->fsm.a_bus_req = arg;
1089 break;
1090
1091 case SET_B_BUS_REQ:
1092 fsl_otg_dev->fsm.b_bus_req = arg;
1093 break;
1094
1095 default:
1096 break;
1097 }
1098
1099 otg_statemachine(&fsl_otg_dev->fsm);
1100
1101 return retval;
1102}
1103
1104static int fsl_otg_open(struct inode *inode, struct file *file)
1105{
1106 return 0;
1107}
1108
1109static int fsl_otg_release(struct inode *inode, struct file *file)
1110{
1111 return 0;
1112}
1113
1114static const struct file_operations otg_fops = {
1115 .owner = THIS_MODULE,
1116 .llseek = NULL,
1117 .read = NULL,
1118 .write = NULL,
1119 .unlocked_ioctl = fsl_otg_ioctl,
1120 .open = fsl_otg_open,
1121 .release = fsl_otg_release,
1122};
1123
1124static int fsl_otg_probe(struct platform_device *pdev)
1125{
1126 int ret;
1127
1128 if (!dev_get_platdata(&pdev->dev))
1129 return -ENODEV;
1130
1131 /* configure the OTG */
1132 ret = fsl_otg_conf(pdev);
1133 if (ret) {
1134 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1135 return ret;
1136 }
1137
1138 /* start OTG */
1139 ret = usb_otg_start(pdev);
1140 if (ret) {
1141 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1142 return ret;
1143 }
1144
1145 ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1146 if (ret) {
1147 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1148 return ret;
1149 }
1150
1151 ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1152 if (ret)
1153 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1154
1155 return ret;
1156}
1157
1158static int fsl_otg_remove(struct platform_device *pdev)
1159{
1160 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
1161
1162 usb_remove_phy(&fsl_otg_dev->phy);
1163 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1164
1165 iounmap((void *)usb_dr_regs);
1166
1167 fsl_otg_uninit_timers();
1168 kfree(fsl_otg_dev->phy.otg);
1169 kfree(fsl_otg_dev);
1170
1171 device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1172
1173 unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1174
1175 if (pdata->exit)
1176 pdata->exit(pdev);
1177
1178 return 0;
1179}
1180
1181struct platform_driver fsl_otg_driver = {
1182 .probe = fsl_otg_probe,
1183 .remove = fsl_otg_remove,
1184 .driver = {
1185 .name = driver_name,
1186 .owner = THIS_MODULE,
1187 },
1188};
1189
1190module_platform_driver(fsl_otg_driver);
1191
1192MODULE_DESCRIPTION(DRIVER_INFO);
1193MODULE_AUTHOR(DRIVER_AUTHOR);
1194MODULE_LICENSE("GPL");