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1# SPDX-License-Identifier: GPL-2.0
2
3config USB_DWC3
4 tristate "DesignWare USB3 DRD Core Support"
5 depends on (USB || USB_GADGET) && HAS_DMA
6 depends on (EXTCON || EXTCON=n)
7 select USB_XHCI_PLATFORM if USB_XHCI_HCD
8 select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
9 help
10 Say Y or M here if your system has a Dual Role SuperSpeed
11 USB controller based on the DesignWare USB3 IP Core.
12
13 If you choose to build this driver as a dynamically linked
14 module, the module will be called dwc3.ko.
15
16if USB_DWC3
17
18config USB_DWC3_ULPI
19 bool "Register ULPI PHY Interface"
20 depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
21 help
22 Select this if you have ULPI type PHY attached to your DWC3
23 controller.
24
25choice
26 bool "DWC3 Mode Selection"
27 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
28 default USB_DWC3_HOST if (USB && !USB_GADGET)
29 default USB_DWC3_GADGET if (!USB && USB_GADGET)
30
31config USB_DWC3_HOST
32 bool "Host only mode"
33 depends on USB=y || USB=USB_DWC3
34 help
35 Select this when you want to use DWC3 in host mode only,
36 thereby the gadget feature will be regressed.
37
38config USB_DWC3_GADGET
39 bool "Gadget only mode"
40 depends on USB_GADGET=y || USB_GADGET=USB_DWC3
41 help
42 Select this when you want to use DWC3 in gadget mode only,
43 thereby the host feature will be regressed.
44
45config USB_DWC3_DUAL_ROLE
46 bool "Dual Role mode"
47 depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
48 help
49 This is the default mode of working of DWC3 controller where
50 both host and gadget features are enabled.
51
52endchoice
53
54comment "Platform Glue Driver Support"
55
56config USB_DWC3_OMAP
57 tristate "Texas Instruments OMAP5 and similar Platforms"
58 depends on ARCH_OMAP2PLUS || COMPILE_TEST
59 depends on EXTCON || !EXTCON
60 depends on OF
61 default USB_DWC3
62 help
63 Some platforms from Texas Instruments like OMAP5, DRA7xxx and
64 AM437x use this IP for USB2/3 functionality.
65
66 Say 'Y' or 'M' here if you have one such device
67
68config USB_DWC3_EXYNOS
69 tristate "Samsung Exynos SoC Platform"
70 depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
71 default USB_DWC3
72 help
73 Recent Samsung Exynos SoCs (Exynos5250, Exynos5410, Exynos542x,
74 Exynos5800, Exynos5433, Exynos7) ship with one DesignWare Core USB3
75 IP inside, say 'Y' or 'M' if you have one such device.
76
77config USB_DWC3_PCI
78 tristate "PCIe-based Platforms"
79 depends on USB_PCI && ACPI
80 default USB_DWC3
81 help
82 If you're using the DesignWare Core IP with a PCIe (but not HAPS
83 platform), please say 'Y' or 'M' here.
84
85config USB_DWC3_HAPS
86 tristate "Synopsys PCIe-based HAPS Platforms"
87 depends on USB_PCI
88 default USB_DWC3
89 help
90 If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
91 platform, please say 'Y' or 'M' here.
92
93config USB_DWC3_KEYSTONE
94 tristate "Texas Instruments Keystone2/AM654 Platforms"
95 depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
96 default USB_DWC3
97 help
98 Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
99 Say 'Y' or 'M' here if you have one such device
100
101config USB_DWC3_MESON_G12A
102 tristate "Amlogic Meson G12A Platforms"
103 depends on OF && COMMON_CLK
104 depends on ARCH_MESON || COMPILE_TEST
105 default USB_DWC3
106 select USB_ROLE_SWITCH
107 select REGMAP_MMIO
108 help
109 Support USB2/3 functionality in Amlogic G12A platforms.
110 Say 'Y' or 'M' if you have one such device.
111
112config USB_DWC3_OF_SIMPLE
113 tristate "Generic OF Simple Glue Layer"
114 depends on OF && COMMON_CLK
115 default USB_DWC3
116 help
117 Support USB2/3 functionality in simple SoC integrations.
118 Currently supports Xilinx and Qualcomm DWC USB3 IP.
119 Say 'Y' or 'M' if you have one such device.
120
121config USB_DWC3_ST
122 tristate "STMicroelectronics Platforms"
123 depends on (ARCH_STI || COMPILE_TEST) && OF
124 default USB_DWC3
125 help
126 STMicroelectronics SoCs with one DesignWare Core USB3 IP
127 inside (i.e. STiH407).
128 Say 'Y' or 'M' if you have one such device.
129
130config USB_DWC3_QCOM
131 tristate "Qualcomm Platform"
132 depends on ARCH_QCOM || COMPILE_TEST
133 depends on EXTCON || !EXTCON
134 depends on (OF || ACPI)
135 default USB_DWC3
136 help
137 Some Qualcomm SoCs use DesignWare Core IP for USB2/3
138 functionality.
139 This driver also handles Qscratch wrapper which is needed
140 for peripheral mode support.
141 Say 'Y' or 'M' if you have one such device.
142
143config USB_DWC3_IMX8MP
144 tristate "NXP iMX8MP Platform"
145 depends on OF && COMMON_CLK
146 depends on (ARCH_MXC && ARM64) || COMPILE_TEST
147 default USB_DWC3
148 help
149 NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
150 functionality.
151 Say 'Y' or 'M' if you have one such device.
152
153config USB_DWC3_XILINX
154 tristate "Xilinx Platforms"
155 depends on (ARCH_ZYNQMP || COMPILE_TEST) && OF
156 default USB_DWC3
157 help
158 Support Xilinx SoCs with DesignWare Core USB3 IP.
159 This driver handles ZynqMP SoC operations.
160 Say 'Y' or 'M' if you have one such device.
161
162config USB_DWC3_AM62
163 tristate "Texas Instruments AM62 Platforms"
164 depends on ARCH_K3 || COMPILE_TEST
165 default USB_DWC3
166 help
167 Support TI's AM62 platforms with DesignWare Core USB3 IP.
168 The Designware Core USB3 IP is programmed to operate in
169 in USB 2.0 mode only.
170 Say 'Y' or 'M' here if you have one such device
171
172config USB_DWC3_OCTEON
173 tristate "Cavium Octeon Platforms"
174 depends on CAVIUM_OCTEON_SOC || COMPILE_TEST
175 default USB_DWC3
176 help
177 Support Cavium Octeon platforms with DesignWare Core USB3 IP.
178 Only the host mode is currently supported.
179 Say 'Y' or 'M' here if you have one such device.
180
181config USB_DWC3_RTK
182 tristate "Realtek DWC3 Platform Driver"
183 depends on OF && ARCH_REALTEK
184 default USB_DWC3
185 select USB_ROLE_SWITCH
186 help
187 RTK DHC RTD SoCs with DesignWare Core USB3 IP inside,
188 and IP Core configured for USB 2.0 and USB 3.0 in host
189 or dual-role mode.
190 Say 'Y' or 'M' if you have such device.
191
192endif
1config USB_DWC3
2 tristate "DesignWare USB3 DRD Core Support"
3 depends on (USB || USB_GADGET) && HAS_DMA
4 select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
5 help
6 Say Y or M here if your system has a Dual Role SuperSpeed
7 USB controller based on the DesignWare USB3 IP Core.
8
9 If you choose to build this driver is a dynamically linked
10 module, the module will be called dwc3.ko.
11
12if USB_DWC3
13
14config USB_DWC3_ULPI
15 bool "Register ULPI PHY Interface"
16 depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
17 help
18 Select this if you have ULPI type PHY attached to your DWC3
19 controller.
20
21choice
22 bool "DWC3 Mode Selection"
23 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
24 default USB_DWC3_HOST if (USB && !USB_GADGET)
25 default USB_DWC3_GADGET if (!USB && USB_GADGET)
26
27config USB_DWC3_HOST
28 bool "Host only mode"
29 depends on USB=y || USB=USB_DWC3
30 help
31 Select this when you want to use DWC3 in host mode only,
32 thereby the gadget feature will be regressed.
33
34config USB_DWC3_GADGET
35 bool "Gadget only mode"
36 depends on USB_GADGET=y || USB_GADGET=USB_DWC3
37 help
38 Select this when you want to use DWC3 in gadget mode only,
39 thereby the host feature will be regressed.
40
41config USB_DWC3_DUAL_ROLE
42 bool "Dual Role mode"
43 depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
44 help
45 This is the default mode of working of DWC3 controller where
46 both host and gadget features are enabled.
47
48endchoice
49
50comment "Platform Glue Driver Support"
51
52config USB_DWC3_OMAP
53 tristate "Texas Instruments OMAP5 and similar Platforms"
54 depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
55 depends on OF
56 default USB_DWC3
57 help
58 Some platforms from Texas Instruments like OMAP5, DRA7xxx and
59 AM437x use this IP for USB2/3 functionality.
60
61 Say 'Y' or 'M' here if you have one such device
62
63config USB_DWC3_EXYNOS
64 tristate "Samsung Exynos Platform"
65 depends on ARCH_EXYNOS && OF || COMPILE_TEST
66 default USB_DWC3
67 help
68 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
69 say 'Y' or 'M' if you have one such device.
70
71config USB_DWC3_PCI
72 tristate "PCIe-based Platforms"
73 depends on PCI
74 default USB_DWC3
75 help
76 If you're using the DesignWare Core IP with a PCIe, please say
77 'Y' or 'M' here.
78
79 One such PCIe-based platform is Synopsys' PCIe HAPS model of
80 this IP.
81
82config USB_DWC3_KEYSTONE
83 tristate "Texas Instruments Keystone2 Platforms"
84 depends on ARCH_KEYSTONE || COMPILE_TEST
85 default USB_DWC3
86 help
87 Support of USB2/3 functionality in TI Keystone2 platforms.
88 Say 'Y' or 'M' here if you have one such device
89
90config USB_DWC3_OF_SIMPLE
91 tristate "Generic OF Simple Glue Layer"
92 depends on OF && COMMON_CLK
93 default USB_DWC3
94 help
95 Support USB2/3 functionality in simple SoC integrations.
96 Currently supports Xilinx and Qualcomm DWC USB3 IP.
97 Say 'Y' or 'M' if you have one such device.
98
99config USB_DWC3_ST
100 tristate "STMicroelectronics Platforms"
101 depends on ARCH_STI && OF
102 default USB_DWC3
103 help
104 STMicroelectronics SoCs with one DesignWare Core USB3 IP
105 inside (i.e. STiH407).
106 Say 'Y' or 'M' if you have one such device.
107
108endif