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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Freescale SPI/eSPI controller driver library.
4 *
5 * Maintainer: Kumar Gala
6 *
7 * Copyright (C) 2006 Polycom, Inc.
8 *
9 * CPM SPI and QE buffer descriptors mode support:
10 * Copyright (c) 2009 MontaVista Software, Inc.
11 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
12 *
13 * Copyright 2010 Freescale Semiconductor, Inc.
14 */
15#include <linux/dma-mapping.h>
16#include <linux/fsl_devices.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/module.h>
21#include <linux/of.h>
22#include <linux/platform_device.h>
23#include <linux/spi/spi.h>
24#ifdef CONFIG_FSL_SOC
25#include <sysdev/fsl_soc.h>
26#endif
27
28#include "spi-fsl-lib.h"
29
30#define MPC8XXX_SPI_RX_BUF(type) \
31void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
32{ \
33 type *rx = mpc8xxx_spi->rx; \
34 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
35 mpc8xxx_spi->rx = rx; \
36} \
37EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type);
38
39#define MPC8XXX_SPI_TX_BUF(type) \
40u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
41{ \
42 u32 data; \
43 const type *tx = mpc8xxx_spi->tx; \
44 if (!tx) \
45 return 0; \
46 data = *tx++ << mpc8xxx_spi->tx_shift; \
47 mpc8xxx_spi->tx = tx; \
48 return data; \
49} \
50EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type);
51
52MPC8XXX_SPI_RX_BUF(u8)
53MPC8XXX_SPI_RX_BUF(u16)
54MPC8XXX_SPI_RX_BUF(u32)
55MPC8XXX_SPI_TX_BUF(u8)
56MPC8XXX_SPI_TX_BUF(u16)
57MPC8XXX_SPI_TX_BUF(u32)
58
59struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
60{
61 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
62}
63EXPORT_SYMBOL_GPL(to_of_pinfo);
64
65const char *mpc8xxx_spi_strmode(unsigned int flags)
66{
67 if (flags & SPI_QE_CPU_MODE) {
68 return "QE CPU";
69 } else if (flags & SPI_CPM_MODE) {
70 if (flags & SPI_QE)
71 return "QE";
72 else if (flags & SPI_CPM2)
73 return "CPM2";
74 else
75 return "CPM1";
76 }
77 return "CPU";
78}
79EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode);
80
81void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
82 unsigned int irq)
83{
84 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
85 struct spi_master *master;
86 struct mpc8xxx_spi *mpc8xxx_spi;
87
88 master = dev_get_drvdata(dev);
89
90 /* the spi->mode bits understood by this driver: */
91 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
92 | SPI_LSB_FIRST | SPI_LOOP;
93
94 master->dev.of_node = dev->of_node;
95
96 mpc8xxx_spi = spi_master_get_devdata(master);
97 mpc8xxx_spi->dev = dev;
98 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
99 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
100 mpc8xxx_spi->flags = pdata->flags;
101 mpc8xxx_spi->spibrg = pdata->sysclk;
102 mpc8xxx_spi->irq = irq;
103
104 mpc8xxx_spi->rx_shift = 0;
105 mpc8xxx_spi->tx_shift = 0;
106
107 master->bus_num = pdata->bus_num;
108 master->num_chipselect = pdata->max_chipselect;
109
110 init_completion(&mpc8xxx_spi->done);
111}
112EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe);
113
114int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
115{
116 struct device *dev = &ofdev->dev;
117 struct device_node *np = ofdev->dev.of_node;
118 struct mpc8xxx_spi_probe_info *pinfo;
119 struct fsl_spi_platform_data *pdata;
120 const void *prop;
121 int ret = -ENOMEM;
122
123 pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
124 if (!pinfo)
125 return ret;
126
127 pdata = &pinfo->pdata;
128 dev->platform_data = pdata;
129
130 /* Allocate bus num dynamically. */
131 pdata->bus_num = -1;
132
133#ifdef CONFIG_FSL_SOC
134 /* SPI controller is either clocked from QE or SoC clock. */
135 pdata->sysclk = get_brgfreq();
136 if (pdata->sysclk == -1) {
137 pdata->sysclk = fsl_get_sys_freq();
138 if (pdata->sysclk == -1)
139 return -ENODEV;
140 }
141#else
142 ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
143 if (ret)
144 return ret;
145#endif
146
147 prop = of_get_property(np, "mode", NULL);
148 if (prop && !strcmp(prop, "cpu-qe"))
149 pdata->flags = SPI_QE_CPU_MODE;
150 else if (prop && !strcmp(prop, "qe"))
151 pdata->flags = SPI_CPM_MODE | SPI_QE;
152 else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
153 pdata->flags = SPI_CPM_MODE | SPI_CPM2;
154 else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
155 pdata->flags = SPI_CPM_MODE | SPI_CPM1;
156
157 return 0;
158}
159EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe);
160
161MODULE_LICENSE("GPL");
1/*
2 * Freescale SPI/eSPI controller driver library.
3 *
4 * Maintainer: Kumar Gala
5 *
6 * Copyright (C) 2006 Polycom, Inc.
7 *
8 * CPM SPI and QE buffer descriptors mode support:
9 * Copyright (c) 2009 MontaVista Software, Inc.
10 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
11 *
12 * Copyright 2010 Freescale Semiconductor, Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 */
19#include <linux/dma-mapping.h>
20#include <linux/fsl_devices.h>
21#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/module.h>
25#include <linux/of_platform.h>
26#include <linux/spi/spi.h>
27#ifdef CONFIG_FSL_SOC
28#include <sysdev/fsl_soc.h>
29#endif
30
31#include "spi-fsl-lib.h"
32
33#define MPC8XXX_SPI_RX_BUF(type) \
34void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
35{ \
36 type *rx = mpc8xxx_spi->rx; \
37 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
38 mpc8xxx_spi->rx = rx; \
39} \
40EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type);
41
42#define MPC8XXX_SPI_TX_BUF(type) \
43u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
44{ \
45 u32 data; \
46 const type *tx = mpc8xxx_spi->tx; \
47 if (!tx) \
48 return 0; \
49 data = *tx++ << mpc8xxx_spi->tx_shift; \
50 mpc8xxx_spi->tx = tx; \
51 return data; \
52} \
53EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type);
54
55MPC8XXX_SPI_RX_BUF(u8)
56MPC8XXX_SPI_RX_BUF(u16)
57MPC8XXX_SPI_RX_BUF(u32)
58MPC8XXX_SPI_TX_BUF(u8)
59MPC8XXX_SPI_TX_BUF(u16)
60MPC8XXX_SPI_TX_BUF(u32)
61
62struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
63{
64 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
65}
66EXPORT_SYMBOL_GPL(to_of_pinfo);
67
68const char *mpc8xxx_spi_strmode(unsigned int flags)
69{
70 if (flags & SPI_QE_CPU_MODE) {
71 return "QE CPU";
72 } else if (flags & SPI_CPM_MODE) {
73 if (flags & SPI_QE)
74 return "QE";
75 else if (flags & SPI_CPM2)
76 return "CPM2";
77 else
78 return "CPM1";
79 }
80 return "CPU";
81}
82EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode);
83
84void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
85 unsigned int irq)
86{
87 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
88 struct spi_master *master;
89 struct mpc8xxx_spi *mpc8xxx_spi;
90
91 master = dev_get_drvdata(dev);
92
93 /* the spi->mode bits understood by this driver: */
94 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
95 | SPI_LSB_FIRST | SPI_LOOP;
96
97 master->dev.of_node = dev->of_node;
98
99 mpc8xxx_spi = spi_master_get_devdata(master);
100 mpc8xxx_spi->dev = dev;
101 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
102 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
103 mpc8xxx_spi->flags = pdata->flags;
104 mpc8xxx_spi->spibrg = pdata->sysclk;
105 mpc8xxx_spi->irq = irq;
106
107 mpc8xxx_spi->rx_shift = 0;
108 mpc8xxx_spi->tx_shift = 0;
109
110 master->bus_num = pdata->bus_num;
111 master->num_chipselect = pdata->max_chipselect;
112
113 init_completion(&mpc8xxx_spi->done);
114}
115EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe);
116
117int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
118{
119 struct device *dev = &ofdev->dev;
120 struct device_node *np = ofdev->dev.of_node;
121 struct mpc8xxx_spi_probe_info *pinfo;
122 struct fsl_spi_platform_data *pdata;
123 const void *prop;
124 int ret = -ENOMEM;
125
126 pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
127 if (!pinfo)
128 return ret;
129
130 pdata = &pinfo->pdata;
131 dev->platform_data = pdata;
132
133 /* Allocate bus num dynamically. */
134 pdata->bus_num = -1;
135
136#ifdef CONFIG_FSL_SOC
137 /* SPI controller is either clocked from QE or SoC clock. */
138 pdata->sysclk = get_brgfreq();
139 if (pdata->sysclk == -1) {
140 pdata->sysclk = fsl_get_sys_freq();
141 if (pdata->sysclk == -1)
142 return -ENODEV;
143 }
144#else
145 ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
146 if (ret)
147 return ret;
148#endif
149
150 prop = of_get_property(np, "mode", NULL);
151 if (prop && !strcmp(prop, "cpu-qe"))
152 pdata->flags = SPI_QE_CPU_MODE;
153 else if (prop && !strcmp(prop, "qe"))
154 pdata->flags = SPI_CPM_MODE | SPI_QE;
155 else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
156 pdata->flags = SPI_CPM_MODE | SPI_CPM2;
157 else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
158 pdata->flags = SPI_CPM_MODE | SPI_CPM1;
159
160 return 0;
161}
162EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe);
163
164MODULE_LICENSE("GPL");