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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * polling/bitbanging SPI master controller driver utilities
4 */
5
6#include <linux/spinlock.h>
7#include <linux/workqueue.h>
8#include <linux/interrupt.h>
9#include <linux/module.h>
10#include <linux/delay.h>
11#include <linux/errno.h>
12#include <linux/platform_device.h>
13#include <linux/slab.h>
14
15#include <linux/spi/spi.h>
16#include <linux/spi/spi_bitbang.h>
17
18#define SPI_BITBANG_CS_DELAY 100
19
20
21/*----------------------------------------------------------------------*/
22
23/*
24 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
25 * Use this for GPIO or shift-register level hardware APIs.
26 *
27 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
28 * to glue code. These bitbang setup() and cleanup() routines are always
29 * used, though maybe they're called from controller-aware code.
30 *
31 * chipselect() and friends may use spi_device->controller_data and
32 * controller registers as appropriate.
33 *
34 *
35 * NOTE: SPI controller pins can often be used as GPIO pins instead,
36 * which means you could use a bitbang driver either to get hardware
37 * working quickly, or testing for differences that aren't speed related.
38 */
39
40struct spi_bitbang_cs {
41 unsigned nsecs; /* (clock cycle time)/2 */
42 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
43 u32 word, u8 bits, unsigned flags);
44 unsigned (*txrx_bufs)(struct spi_device *,
45 u32 (*txrx_word)(
46 struct spi_device *spi,
47 unsigned nsecs,
48 u32 word, u8 bits,
49 unsigned flags),
50 unsigned, struct spi_transfer *,
51 unsigned);
52};
53
54static unsigned bitbang_txrx_8(
55 struct spi_device *spi,
56 u32 (*txrx_word)(struct spi_device *spi,
57 unsigned nsecs,
58 u32 word, u8 bits,
59 unsigned flags),
60 unsigned ns,
61 struct spi_transfer *t,
62 unsigned flags
63)
64{
65 unsigned bits = t->bits_per_word;
66 unsigned count = t->len;
67 const u8 *tx = t->tx_buf;
68 u8 *rx = t->rx_buf;
69
70 while (likely(count > 0)) {
71 u8 word = 0;
72
73 if (tx)
74 word = *tx++;
75 word = txrx_word(spi, ns, word, bits, flags);
76 if (rx)
77 *rx++ = word;
78 count -= 1;
79 }
80 return t->len - count;
81}
82
83static unsigned bitbang_txrx_16(
84 struct spi_device *spi,
85 u32 (*txrx_word)(struct spi_device *spi,
86 unsigned nsecs,
87 u32 word, u8 bits,
88 unsigned flags),
89 unsigned ns,
90 struct spi_transfer *t,
91 unsigned flags
92)
93{
94 unsigned bits = t->bits_per_word;
95 unsigned count = t->len;
96 const u16 *tx = t->tx_buf;
97 u16 *rx = t->rx_buf;
98
99 while (likely(count > 1)) {
100 u16 word = 0;
101
102 if (tx)
103 word = *tx++;
104 word = txrx_word(spi, ns, word, bits, flags);
105 if (rx)
106 *rx++ = word;
107 count -= 2;
108 }
109 return t->len - count;
110}
111
112static unsigned bitbang_txrx_32(
113 struct spi_device *spi,
114 u32 (*txrx_word)(struct spi_device *spi,
115 unsigned nsecs,
116 u32 word, u8 bits,
117 unsigned flags),
118 unsigned ns,
119 struct spi_transfer *t,
120 unsigned flags
121)
122{
123 unsigned bits = t->bits_per_word;
124 unsigned count = t->len;
125 const u32 *tx = t->tx_buf;
126 u32 *rx = t->rx_buf;
127
128 while (likely(count > 3)) {
129 u32 word = 0;
130
131 if (tx)
132 word = *tx++;
133 word = txrx_word(spi, ns, word, bits, flags);
134 if (rx)
135 *rx++ = word;
136 count -= 4;
137 }
138 return t->len - count;
139}
140
141int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142{
143 struct spi_bitbang_cs *cs = spi->controller_state;
144 u8 bits_per_word;
145 u32 hz;
146
147 if (t) {
148 bits_per_word = t->bits_per_word;
149 hz = t->speed_hz;
150 } else {
151 bits_per_word = 0;
152 hz = 0;
153 }
154
155 /* spi_transfer level calls that work per-word */
156 if (!bits_per_word)
157 bits_per_word = spi->bits_per_word;
158 if (bits_per_word <= 8)
159 cs->txrx_bufs = bitbang_txrx_8;
160 else if (bits_per_word <= 16)
161 cs->txrx_bufs = bitbang_txrx_16;
162 else if (bits_per_word <= 32)
163 cs->txrx_bufs = bitbang_txrx_32;
164 else
165 return -EINVAL;
166
167 /* nsecs = (clock period)/2 */
168 if (!hz)
169 hz = spi->max_speed_hz;
170 if (hz) {
171 cs->nsecs = (1000000000/2) / hz;
172 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
173 return -EINVAL;
174 }
175
176 return 0;
177}
178EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
179
180/*
181 * spi_bitbang_setup - default setup for per-word I/O loops
182 */
183int spi_bitbang_setup(struct spi_device *spi)
184{
185 struct spi_bitbang_cs *cs = spi->controller_state;
186 struct spi_bitbang *bitbang;
187 bool initial_setup = false;
188 int retval;
189
190 bitbang = spi_master_get_devdata(spi->master);
191
192 if (!cs) {
193 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
194 if (!cs)
195 return -ENOMEM;
196 spi->controller_state = cs;
197 initial_setup = true;
198 }
199
200 /* per-word shift register access, in hardware or bitbanging */
201 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
202 if (!cs->txrx_word) {
203 retval = -EINVAL;
204 goto err_free;
205 }
206
207 if (bitbang->setup_transfer) {
208 retval = bitbang->setup_transfer(spi, NULL);
209 if (retval < 0)
210 goto err_free;
211 }
212
213 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
214
215 return 0;
216
217err_free:
218 if (initial_setup)
219 kfree(cs);
220 return retval;
221}
222EXPORT_SYMBOL_GPL(spi_bitbang_setup);
223
224/*
225 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
226 */
227void spi_bitbang_cleanup(struct spi_device *spi)
228{
229 kfree(spi->controller_state);
230}
231EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
232
233static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
234{
235 struct spi_bitbang_cs *cs = spi->controller_state;
236 unsigned nsecs = cs->nsecs;
237 struct spi_bitbang *bitbang;
238
239 bitbang = spi_master_get_devdata(spi->master);
240 if (bitbang->set_line_direction) {
241 int err;
242
243 err = bitbang->set_line_direction(spi, !!(t->tx_buf));
244 if (err < 0)
245 return err;
246 }
247
248 if (spi->mode & SPI_3WIRE) {
249 unsigned flags;
250
251 flags = t->tx_buf ? SPI_CONTROLLER_NO_RX : SPI_CONTROLLER_NO_TX;
252 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
253 }
254 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
255}
256
257/*----------------------------------------------------------------------*/
258
259/*
260 * SECOND PART ... simple transfer queue runner.
261 *
262 * This costs a task context per controller, running the queue by
263 * performing each transfer in sequence. Smarter hardware can queue
264 * several DMA transfers at once, and process several controller queues
265 * in parallel; this driver doesn't match such hardware very well.
266 *
267 * Drivers can provide word-at-a-time i/o primitives, or provide
268 * transfer-at-a-time ones to leverage dma or fifo hardware.
269 */
270
271static int spi_bitbang_prepare_hardware(struct spi_master *spi)
272{
273 struct spi_bitbang *bitbang;
274
275 bitbang = spi_master_get_devdata(spi);
276
277 mutex_lock(&bitbang->lock);
278 bitbang->busy = 1;
279 mutex_unlock(&bitbang->lock);
280
281 return 0;
282}
283
284static int spi_bitbang_transfer_one(struct spi_master *master,
285 struct spi_device *spi,
286 struct spi_transfer *transfer)
287{
288 struct spi_bitbang *bitbang = spi_master_get_devdata(master);
289 int status = 0;
290
291 if (bitbang->setup_transfer) {
292 status = bitbang->setup_transfer(spi, transfer);
293 if (status < 0)
294 goto out;
295 }
296
297 if (transfer->len)
298 status = bitbang->txrx_bufs(spi, transfer);
299
300 if (status == transfer->len)
301 status = 0;
302 else if (status >= 0)
303 status = -EREMOTEIO;
304
305out:
306 spi_finalize_current_transfer(master);
307
308 return status;
309}
310
311static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
312{
313 struct spi_bitbang *bitbang;
314
315 bitbang = spi_master_get_devdata(spi);
316
317 mutex_lock(&bitbang->lock);
318 bitbang->busy = 0;
319 mutex_unlock(&bitbang->lock);
320
321 return 0;
322}
323
324static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
325{
326 struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
327
328 /* SPI core provides CS high / low, but bitbang driver
329 * expects CS active
330 * spi device driver takes care of handling SPI_CS_HIGH
331 */
332 enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
333
334 ndelay(SPI_BITBANG_CS_DELAY);
335 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
336 BITBANG_CS_INACTIVE);
337 ndelay(SPI_BITBANG_CS_DELAY);
338}
339
340/*----------------------------------------------------------------------*/
341
342int spi_bitbang_init(struct spi_bitbang *bitbang)
343{
344 struct spi_master *master = bitbang->master;
345 bool custom_cs;
346
347 if (!master)
348 return -EINVAL;
349 /*
350 * We only need the chipselect callback if we are actually using it.
351 * If we just use GPIO descriptors, it is surplus. If the
352 * SPI_CONTROLLER_GPIO_SS flag is set, we always need to call the
353 * driver-specific chipselect routine.
354 */
355 custom_cs = (!master->use_gpio_descriptors ||
356 (master->flags & SPI_CONTROLLER_GPIO_SS));
357
358 if (custom_cs && !bitbang->chipselect)
359 return -EINVAL;
360
361 mutex_init(&bitbang->lock);
362
363 if (!master->mode_bits)
364 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
365
366 if (master->transfer || master->transfer_one_message)
367 return -EINVAL;
368
369 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
370 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
371 master->transfer_one = spi_bitbang_transfer_one;
372 /*
373 * When using GPIO descriptors, the ->set_cs() callback doesn't even
374 * get called unless SPI_CONTROLLER_GPIO_SS is set.
375 */
376 if (custom_cs)
377 master->set_cs = spi_bitbang_set_cs;
378
379 if (!bitbang->txrx_bufs) {
380 bitbang->use_dma = 0;
381 bitbang->txrx_bufs = spi_bitbang_bufs;
382 if (!master->setup) {
383 if (!bitbang->setup_transfer)
384 bitbang->setup_transfer =
385 spi_bitbang_setup_transfer;
386 master->setup = spi_bitbang_setup;
387 master->cleanup = spi_bitbang_cleanup;
388 }
389 }
390
391 return 0;
392}
393EXPORT_SYMBOL_GPL(spi_bitbang_init);
394
395/**
396 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
397 * @bitbang: driver handle
398 *
399 * Caller should have zero-initialized all parts of the structure, and then
400 * provided callbacks for chip selection and I/O loops. If the master has
401 * a transfer method, its final step should call spi_bitbang_transfer; or,
402 * that's the default if the transfer routine is not initialized. It should
403 * also set up the bus number and number of chipselects.
404 *
405 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
406 * hardware that basically exposes a shift register) or per-spi_transfer
407 * (which takes better advantage of hardware like fifos or DMA engines).
408 *
409 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
410 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
411 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
412 * routine isn't initialized.
413 *
414 * This routine registers the spi_master, which will process requests in a
415 * dedicated task, keeping IRQs unblocked most of the time. To stop
416 * processing those requests, call spi_bitbang_stop().
417 *
418 * On success, this routine will take a reference to master. The caller is
419 * responsible for calling spi_bitbang_stop() to decrement the reference and
420 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
421 * leak.
422 */
423int spi_bitbang_start(struct spi_bitbang *bitbang)
424{
425 struct spi_master *master = bitbang->master;
426 int ret;
427
428 ret = spi_bitbang_init(bitbang);
429 if (ret)
430 return ret;
431
432 /* driver may get busy before register() returns, especially
433 * if someone registered boardinfo for devices
434 */
435 ret = spi_register_master(spi_master_get(master));
436 if (ret)
437 spi_master_put(master);
438
439 return ret;
440}
441EXPORT_SYMBOL_GPL(spi_bitbang_start);
442
443/*
444 * spi_bitbang_stop - stops the task providing spi communication
445 */
446void spi_bitbang_stop(struct spi_bitbang *bitbang)
447{
448 spi_unregister_master(bitbang->master);
449}
450EXPORT_SYMBOL_GPL(spi_bitbang_stop);
451
452MODULE_LICENSE("GPL");
453
1/*
2 * polling/bitbanging SPI master controller driver utilities
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/spinlock.h>
16#include <linux/workqueue.h>
17#include <linux/interrupt.h>
18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/errno.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23
24#include <linux/spi/spi.h>
25#include <linux/spi/spi_bitbang.h>
26
27#define SPI_BITBANG_CS_DELAY 100
28
29
30/*----------------------------------------------------------------------*/
31
32/*
33 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
34 * Use this for GPIO or shift-register level hardware APIs.
35 *
36 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
37 * to glue code. These bitbang setup() and cleanup() routines are always
38 * used, though maybe they're called from controller-aware code.
39 *
40 * chipselect() and friends may use spi_device->controller_data and
41 * controller registers as appropriate.
42 *
43 *
44 * NOTE: SPI controller pins can often be used as GPIO pins instead,
45 * which means you could use a bitbang driver either to get hardware
46 * working quickly, or testing for differences that aren't speed related.
47 */
48
49struct spi_bitbang_cs {
50 unsigned nsecs; /* (clock cycle time)/2 */
51 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
52 u32 word, u8 bits);
53 unsigned (*txrx_bufs)(struct spi_device *,
54 u32 (*txrx_word)(
55 struct spi_device *spi,
56 unsigned nsecs,
57 u32 word, u8 bits),
58 unsigned, struct spi_transfer *);
59};
60
61static unsigned bitbang_txrx_8(
62 struct spi_device *spi,
63 u32 (*txrx_word)(struct spi_device *spi,
64 unsigned nsecs,
65 u32 word, u8 bits),
66 unsigned ns,
67 struct spi_transfer *t
68) {
69 unsigned bits = t->bits_per_word;
70 unsigned count = t->len;
71 const u8 *tx = t->tx_buf;
72 u8 *rx = t->rx_buf;
73
74 while (likely(count > 0)) {
75 u8 word = 0;
76
77 if (tx)
78 word = *tx++;
79 word = txrx_word(spi, ns, word, bits);
80 if (rx)
81 *rx++ = word;
82 count -= 1;
83 }
84 return t->len - count;
85}
86
87static unsigned bitbang_txrx_16(
88 struct spi_device *spi,
89 u32 (*txrx_word)(struct spi_device *spi,
90 unsigned nsecs,
91 u32 word, u8 bits),
92 unsigned ns,
93 struct spi_transfer *t
94) {
95 unsigned bits = t->bits_per_word;
96 unsigned count = t->len;
97 const u16 *tx = t->tx_buf;
98 u16 *rx = t->rx_buf;
99
100 while (likely(count > 1)) {
101 u16 word = 0;
102
103 if (tx)
104 word = *tx++;
105 word = txrx_word(spi, ns, word, bits);
106 if (rx)
107 *rx++ = word;
108 count -= 2;
109 }
110 return t->len - count;
111}
112
113static unsigned bitbang_txrx_32(
114 struct spi_device *spi,
115 u32 (*txrx_word)(struct spi_device *spi,
116 unsigned nsecs,
117 u32 word, u8 bits),
118 unsigned ns,
119 struct spi_transfer *t
120) {
121 unsigned bits = t->bits_per_word;
122 unsigned count = t->len;
123 const u32 *tx = t->tx_buf;
124 u32 *rx = t->rx_buf;
125
126 while (likely(count > 3)) {
127 u32 word = 0;
128
129 if (tx)
130 word = *tx++;
131 word = txrx_word(spi, ns, word, bits);
132 if (rx)
133 *rx++ = word;
134 count -= 4;
135 }
136 return t->len - count;
137}
138
139int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
140{
141 struct spi_bitbang_cs *cs = spi->controller_state;
142 u8 bits_per_word;
143 u32 hz;
144
145 if (t) {
146 bits_per_word = t->bits_per_word;
147 hz = t->speed_hz;
148 } else {
149 bits_per_word = 0;
150 hz = 0;
151 }
152
153 /* spi_transfer level calls that work per-word */
154 if (!bits_per_word)
155 bits_per_word = spi->bits_per_word;
156 if (bits_per_word <= 8)
157 cs->txrx_bufs = bitbang_txrx_8;
158 else if (bits_per_word <= 16)
159 cs->txrx_bufs = bitbang_txrx_16;
160 else if (bits_per_word <= 32)
161 cs->txrx_bufs = bitbang_txrx_32;
162 else
163 return -EINVAL;
164
165 /* nsecs = (clock period)/2 */
166 if (!hz)
167 hz = spi->max_speed_hz;
168 if (hz) {
169 cs->nsecs = (1000000000/2) / hz;
170 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
171 return -EINVAL;
172 }
173
174 return 0;
175}
176EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
177
178/**
179 * spi_bitbang_setup - default setup for per-word I/O loops
180 */
181int spi_bitbang_setup(struct spi_device *spi)
182{
183 struct spi_bitbang_cs *cs = spi->controller_state;
184 struct spi_bitbang *bitbang;
185
186 bitbang = spi_master_get_devdata(spi->master);
187
188 if (!cs) {
189 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
190 if (!cs)
191 return -ENOMEM;
192 spi->controller_state = cs;
193 }
194
195 /* per-word shift register access, in hardware or bitbanging */
196 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
197 if (!cs->txrx_word)
198 return -EINVAL;
199
200 if (bitbang->setup_transfer) {
201 int retval = bitbang->setup_transfer(spi, NULL);
202 if (retval < 0)
203 return retval;
204 }
205
206 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
207
208 /* NOTE we _need_ to call chipselect() early, ideally with adapter
209 * setup, unless the hardware defaults cooperate to avoid confusion
210 * between normal (active low) and inverted chipselects.
211 */
212
213 /* deselect chip (low or high) */
214 mutex_lock(&bitbang->lock);
215 if (!bitbang->busy) {
216 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
217 ndelay(cs->nsecs);
218 }
219 mutex_unlock(&bitbang->lock);
220
221 return 0;
222}
223EXPORT_SYMBOL_GPL(spi_bitbang_setup);
224
225/**
226 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
227 */
228void spi_bitbang_cleanup(struct spi_device *spi)
229{
230 kfree(spi->controller_state);
231}
232EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
233
234static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
235{
236 struct spi_bitbang_cs *cs = spi->controller_state;
237 unsigned nsecs = cs->nsecs;
238
239 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
240}
241
242/*----------------------------------------------------------------------*/
243
244/*
245 * SECOND PART ... simple transfer queue runner.
246 *
247 * This costs a task context per controller, running the queue by
248 * performing each transfer in sequence. Smarter hardware can queue
249 * several DMA transfers at once, and process several controller queues
250 * in parallel; this driver doesn't match such hardware very well.
251 *
252 * Drivers can provide word-at-a-time i/o primitives, or provide
253 * transfer-at-a-time ones to leverage dma or fifo hardware.
254 */
255
256static int spi_bitbang_prepare_hardware(struct spi_master *spi)
257{
258 struct spi_bitbang *bitbang;
259
260 bitbang = spi_master_get_devdata(spi);
261
262 mutex_lock(&bitbang->lock);
263 bitbang->busy = 1;
264 mutex_unlock(&bitbang->lock);
265
266 return 0;
267}
268
269static int spi_bitbang_transfer_one(struct spi_master *master,
270 struct spi_device *spi,
271 struct spi_transfer *transfer)
272{
273 struct spi_bitbang *bitbang = spi_master_get_devdata(master);
274 int status = 0;
275
276 if (bitbang->setup_transfer) {
277 status = bitbang->setup_transfer(spi, transfer);
278 if (status < 0)
279 goto out;
280 }
281
282 if (transfer->len)
283 status = bitbang->txrx_bufs(spi, transfer);
284
285 if (status == transfer->len)
286 status = 0;
287 else if (status >= 0)
288 status = -EREMOTEIO;
289
290out:
291 spi_finalize_current_transfer(master);
292
293 return status;
294}
295
296static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
297{
298 struct spi_bitbang *bitbang;
299
300 bitbang = spi_master_get_devdata(spi);
301
302 mutex_lock(&bitbang->lock);
303 bitbang->busy = 0;
304 mutex_unlock(&bitbang->lock);
305
306 return 0;
307}
308
309static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
310{
311 struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
312
313 /* SPI core provides CS high / low, but bitbang driver
314 * expects CS active
315 * spi device driver takes care of handling SPI_CS_HIGH
316 */
317 enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
318
319 ndelay(SPI_BITBANG_CS_DELAY);
320 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
321 BITBANG_CS_INACTIVE);
322 ndelay(SPI_BITBANG_CS_DELAY);
323}
324
325/*----------------------------------------------------------------------*/
326
327/**
328 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
329 * @bitbang: driver handle
330 *
331 * Caller should have zero-initialized all parts of the structure, and then
332 * provided callbacks for chip selection and I/O loops. If the master has
333 * a transfer method, its final step should call spi_bitbang_transfer; or,
334 * that's the default if the transfer routine is not initialized. It should
335 * also set up the bus number and number of chipselects.
336 *
337 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
338 * hardware that basically exposes a shift register) or per-spi_transfer
339 * (which takes better advantage of hardware like fifos or DMA engines).
340 *
341 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
342 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
343 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
344 * routine isn't initialized.
345 *
346 * This routine registers the spi_master, which will process requests in a
347 * dedicated task, keeping IRQs unblocked most of the time. To stop
348 * processing those requests, call spi_bitbang_stop().
349 *
350 * On success, this routine will take a reference to master. The caller is
351 * responsible for calling spi_bitbang_stop() to decrement the reference and
352 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
353 * leak.
354 */
355int spi_bitbang_start(struct spi_bitbang *bitbang)
356{
357 struct spi_master *master = bitbang->master;
358 int ret;
359
360 if (!master || !bitbang->chipselect)
361 return -EINVAL;
362
363 mutex_init(&bitbang->lock);
364
365 if (!master->mode_bits)
366 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
367
368 if (master->transfer || master->transfer_one_message)
369 return -EINVAL;
370
371 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
372 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
373 master->transfer_one = spi_bitbang_transfer_one;
374 master->set_cs = spi_bitbang_set_cs;
375
376 if (!bitbang->txrx_bufs) {
377 bitbang->use_dma = 0;
378 bitbang->txrx_bufs = spi_bitbang_bufs;
379 if (!master->setup) {
380 if (!bitbang->setup_transfer)
381 bitbang->setup_transfer =
382 spi_bitbang_setup_transfer;
383 master->setup = spi_bitbang_setup;
384 master->cleanup = spi_bitbang_cleanup;
385 }
386 }
387
388 /* driver may get busy before register() returns, especially
389 * if someone registered boardinfo for devices
390 */
391 ret = spi_register_master(spi_master_get(master));
392 if (ret)
393 spi_master_put(master);
394
395 return 0;
396}
397EXPORT_SYMBOL_GPL(spi_bitbang_start);
398
399/**
400 * spi_bitbang_stop - stops the task providing spi communication
401 */
402void spi_bitbang_stop(struct spi_bitbang *bitbang)
403{
404 spi_unregister_master(bitbang->master);
405}
406EXPORT_SYMBOL_GPL(spi_bitbang_stop);
407
408MODULE_LICENSE("GPL");
409