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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Marvell NFC driver
4 *
5 * Copyright (C) 2014-2015, Marvell International Ltd.
6 */
7
8#ifndef _NFCMRVL_H_
9#define _NFCMRVL_H_
10
11#include "fw_dnld.h"
12
13/* Define private flags: */
14#define NFCMRVL_NCI_RUNNING 1
15#define NFCMRVL_PHY_ERROR 2
16
17#define NFCMRVL_EXT_COEX_ID 0xE0
18#define NFCMRVL_NOT_ALLOWED_ID 0xE1
19#define NFCMRVL_ACTIVE_ID 0xE2
20#define NFCMRVL_EXT_COEX_ENABLE 1
21#define NFCMRVL_GPIO_PIN_NFC_NOT_ALLOWED 0xA
22#define NFCMRVL_GPIO_PIN_NFC_ACTIVE 0xB
23#define NFCMRVL_NCI_MAX_EVENT_SIZE 260
24
25/*
26 * NCI FW Parameters
27 */
28
29#define NFCMRVL_PB_BAIL_OUT 0x11
30#define NFCMRVL_PROP_REF_CLOCK 0xF0
31#define NFCMRVL_PROP_SET_HI_CONFIG 0xF1
32
33/*
34 * HCI defines
35 */
36
37#define NFCMRVL_HCI_EVENT_HEADER_SIZE 0x04
38#define NFCMRVL_HCI_EVENT_CODE 0x04
39#define NFCMRVL_HCI_NFC_EVENT_CODE 0xFF
40#define NFCMRVL_HCI_COMMAND_CODE 0x01
41#define NFCMRVL_HCI_OGF 0x81
42#define NFCMRVL_HCI_OCF 0xFE
43
44enum nfcmrvl_phy {
45 NFCMRVL_PHY_USB = 0,
46 NFCMRVL_PHY_UART = 1,
47 NFCMRVL_PHY_I2C = 2,
48 NFCMRVL_PHY_SPI = 3,
49};
50
51struct nfcmrvl_platform_data {
52 /*
53 * Generic
54 */
55
56 /* GPIO that is wired to RESET_N signal */
57 int reset_n_io;
58 /* Tell if transport is muxed in HCI one */
59 bool hci_muxed;
60
61 /*
62 * UART specific
63 */
64
65 /* Tell if UART needs flow control at init */
66 bool flow_control;
67 /* Tell if firmware supports break control for power management */
68 bool break_control;
69
70
71 /*
72 * I2C specific
73 */
74
75 unsigned int irq;
76 unsigned int irq_polarity;
77};
78
79struct nfcmrvl_private {
80
81 unsigned long flags;
82
83 /* Platform configuration */
84 struct nfcmrvl_platform_data config;
85
86 /* Parent dev */
87 struct nci_dev *ndev;
88
89 /* FW download context */
90 struct nfcmrvl_fw_dnld fw_dnld;
91
92 /* FW download support */
93 bool support_fw_dnld;
94
95 /*
96 * PHY related information
97 */
98
99 /* PHY driver context */
100 void *drv_data;
101 /* PHY device */
102 struct device *dev;
103 /* PHY type */
104 enum nfcmrvl_phy phy;
105 /* Low level driver ops */
106 const struct nfcmrvl_if_ops *if_ops;
107};
108
109struct nfcmrvl_if_ops {
110 int (*nci_open) (struct nfcmrvl_private *priv);
111 int (*nci_close) (struct nfcmrvl_private *priv);
112 int (*nci_send) (struct nfcmrvl_private *priv, struct sk_buff *skb);
113 void (*nci_update_config)(struct nfcmrvl_private *priv,
114 const void *param);
115};
116
117void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv);
118int nfcmrvl_nci_recv_frame(struct nfcmrvl_private *priv, struct sk_buff *skb);
119struct nfcmrvl_private *nfcmrvl_nci_register_dev(enum nfcmrvl_phy phy,
120 void *drv_data,
121 const struct nfcmrvl_if_ops *ops,
122 struct device *dev,
123 const struct nfcmrvl_platform_data *pdata);
124
125
126void nfcmrvl_chip_reset(struct nfcmrvl_private *priv);
127void nfcmrvl_chip_halt(struct nfcmrvl_private *priv);
128
129int nfcmrvl_parse_dt(struct device_node *node,
130 struct nfcmrvl_platform_data *pdata);
131
132#endif
1/**
2 * Marvell NFC driver
3 *
4 * Copyright (C) 2014-2015, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available on the worldwide web at
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
12 *
13 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
14 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
15 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
16 * this warranty disclaimer.
17 **/
18
19#ifndef _NFCMRVL_H_
20#define _NFCMRVL_H_
21
22#include <linux/platform_data/nfcmrvl.h>
23
24#include "fw_dnld.h"
25
26/* Define private flags: */
27#define NFCMRVL_NCI_RUNNING 1
28#define NFCMRVL_PHY_ERROR 2
29
30#define NFCMRVL_EXT_COEX_ID 0xE0
31#define NFCMRVL_NOT_ALLOWED_ID 0xE1
32#define NFCMRVL_ACTIVE_ID 0xE2
33#define NFCMRVL_EXT_COEX_ENABLE 1
34#define NFCMRVL_GPIO_PIN_NFC_NOT_ALLOWED 0xA
35#define NFCMRVL_GPIO_PIN_NFC_ACTIVE 0xB
36#define NFCMRVL_NCI_MAX_EVENT_SIZE 260
37
38/*
39** NCI FW Parmaters
40*/
41
42#define NFCMRVL_PB_BAIL_OUT 0x11
43#define NFCMRVL_PROP_REF_CLOCK 0xF0
44#define NFCMRVL_PROP_SET_HI_CONFIG 0xF1
45
46/*
47** HCI defines
48*/
49
50#define NFCMRVL_HCI_EVENT_HEADER_SIZE 0x04
51#define NFCMRVL_HCI_EVENT_CODE 0x04
52#define NFCMRVL_HCI_NFC_EVENT_CODE 0xFF
53#define NFCMRVL_HCI_COMMAND_CODE 0x01
54#define NFCMRVL_HCI_OGF 0x81
55#define NFCMRVL_HCI_OCF 0xFE
56
57enum nfcmrvl_phy {
58 NFCMRVL_PHY_USB = 0,
59 NFCMRVL_PHY_UART = 1,
60 NFCMRVL_PHY_I2C = 2,
61 NFCMRVL_PHY_SPI = 3,
62};
63
64struct nfcmrvl_private {
65
66 unsigned long flags;
67
68 /* Platform configuration */
69 struct nfcmrvl_platform_data config;
70
71 /* Parent dev */
72 struct nci_dev *ndev;
73
74 /* FW download context */
75 struct nfcmrvl_fw_dnld fw_dnld;
76
77 /* FW download support */
78 bool support_fw_dnld;
79
80 /*
81 ** PHY related information
82 */
83
84 /* PHY driver context */
85 void *drv_data;
86 /* PHY device */
87 struct device *dev;
88 /* PHY type */
89 enum nfcmrvl_phy phy;
90 /* Low level driver ops */
91 struct nfcmrvl_if_ops *if_ops;
92};
93
94struct nfcmrvl_if_ops {
95 int (*nci_open) (struct nfcmrvl_private *priv);
96 int (*nci_close) (struct nfcmrvl_private *priv);
97 int (*nci_send) (struct nfcmrvl_private *priv, struct sk_buff *skb);
98 void (*nci_update_config)(struct nfcmrvl_private *priv,
99 const void *param);
100};
101
102void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv);
103int nfcmrvl_nci_recv_frame(struct nfcmrvl_private *priv, struct sk_buff *skb);
104struct nfcmrvl_private *nfcmrvl_nci_register_dev(enum nfcmrvl_phy phy,
105 void *drv_data,
106 struct nfcmrvl_if_ops *ops,
107 struct device *dev,
108 struct nfcmrvl_platform_data *pdata);
109
110
111void nfcmrvl_chip_reset(struct nfcmrvl_private *priv);
112void nfcmrvl_chip_halt(struct nfcmrvl_private *priv);
113
114int nfcmrvl_parse_dt(struct device_node *node,
115 struct nfcmrvl_platform_data *pdata);
116
117#endif