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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 1999 - 2018 Intel Corporation. */
3
4#ifndef _IXGBE_MODEL_H_
5#define _IXGBE_MODEL_H_
6
7#include "ixgbe.h"
8#include "ixgbe_type.h"
9
10struct ixgbe_mat_field {
11 unsigned int off;
12 int (*val)(struct ixgbe_fdir_filter *input,
13 union ixgbe_atr_input *mask,
14 u32 val, u32 m);
15 unsigned int type;
16};
17
18struct ixgbe_jump_table {
19 struct ixgbe_mat_field *mat;
20 struct ixgbe_fdir_filter *input;
21 union ixgbe_atr_input *mask;
22 u32 link_hdl;
23 unsigned long child_loc_map[32];
24};
25
26#define IXGBE_MAX_HW_ENTRIES 2045
27
28static inline int ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input,
29 union ixgbe_atr_input *mask,
30 u32 val, u32 m)
31{
32 input->filter.formatted.src_ip[0] = (__force __be32)val;
33 mask->formatted.src_ip[0] = (__force __be32)m;
34 return 0;
35}
36
37static inline int ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input,
38 union ixgbe_atr_input *mask,
39 u32 val, u32 m)
40{
41 input->filter.formatted.dst_ip[0] = (__force __be32)val;
42 mask->formatted.dst_ip[0] = (__force __be32)m;
43 return 0;
44}
45
46static struct ixgbe_mat_field ixgbe_ipv4_fields[] = {
47 { .off = 12, .val = ixgbe_mat_prgm_sip,
48 .type = IXGBE_ATR_FLOW_TYPE_IPV4},
49 { .off = 16, .val = ixgbe_mat_prgm_dip,
50 .type = IXGBE_ATR_FLOW_TYPE_IPV4},
51 { .val = NULL } /* terminal node */
52};
53
54static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input,
55 union ixgbe_atr_input *mask,
56 u32 val, u32 m)
57{
58 input->filter.formatted.src_port = (__force __be16)(val & 0xffff);
59 mask->formatted.src_port = (__force __be16)(m & 0xffff);
60 input->filter.formatted.dst_port = (__force __be16)(val >> 16);
61 mask->formatted.dst_port = (__force __be16)(m >> 16);
62
63 return 0;
64};
65
66static struct ixgbe_mat_field ixgbe_tcp_fields[] = {
67 {.off = 0, .val = ixgbe_mat_prgm_ports,
68 .type = IXGBE_ATR_FLOW_TYPE_TCPV4},
69 { .val = NULL } /* terminal node */
70};
71
72static struct ixgbe_mat_field ixgbe_udp_fields[] = {
73 {.off = 0, .val = ixgbe_mat_prgm_ports,
74 .type = IXGBE_ATR_FLOW_TYPE_UDPV4},
75 { .val = NULL } /* terminal node */
76};
77
78struct ixgbe_nexthdr {
79 /* offset, shift, and mask of position to next header */
80 unsigned int o;
81 u32 s;
82 u32 m;
83 /* match criteria to make this jump*/
84 unsigned int off;
85 u32 val;
86 u32 mask;
87 /* location of jump to make */
88 struct ixgbe_mat_field *jump;
89};
90
91static struct ixgbe_nexthdr ixgbe_ipv4_jumps[] = {
92 { .o = 0, .s = 6, .m = 0xf,
93 .off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields},
94 { .o = 0, .s = 6, .m = 0xf,
95 .off = 8, .val = 0x1100, .mask = 0xff00, .jump = ixgbe_udp_fields},
96 { .jump = NULL } /* terminal node */
97};
98#endif /* _IXGBE_MODEL_H_ */
1/*******************************************************************************
2 *
3 * Intel 10 Gigabit PCI Express Linux drive
4 * Copyright(c) 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _IXGBE_MODEL_H_
28#define _IXGBE_MODEL_H_
29
30#include "ixgbe.h"
31#include "ixgbe_type.h"
32
33struct ixgbe_mat_field {
34 unsigned int off;
35 int (*val)(struct ixgbe_fdir_filter *input,
36 union ixgbe_atr_input *mask,
37 u32 val, u32 m);
38 unsigned int type;
39};
40
41static inline int ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input,
42 union ixgbe_atr_input *mask,
43 u32 val, u32 m)
44{
45 input->filter.formatted.src_ip[0] = val;
46 mask->formatted.src_ip[0] = m;
47 return 0;
48}
49
50static inline int ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input,
51 union ixgbe_atr_input *mask,
52 u32 val, u32 m)
53{
54 input->filter.formatted.dst_ip[0] = val;
55 mask->formatted.dst_ip[0] = m;
56 return 0;
57}
58
59static struct ixgbe_mat_field ixgbe_ipv4_fields[] = {
60 { .off = 12, .val = ixgbe_mat_prgm_sip,
61 .type = IXGBE_ATR_FLOW_TYPE_IPV4},
62 { .off = 16, .val = ixgbe_mat_prgm_dip,
63 .type = IXGBE_ATR_FLOW_TYPE_IPV4},
64 { .val = NULL } /* terminal node */
65};
66
67static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input,
68 union ixgbe_atr_input *mask,
69 u32 val, u32 m)
70{
71 input->filter.formatted.src_port = val & 0xffff;
72 mask->formatted.src_port = m & 0xffff;
73 input->filter.formatted.dst_port = val >> 16;
74 mask->formatted.dst_port = m >> 16;
75
76 return 0;
77};
78
79static struct ixgbe_mat_field ixgbe_tcp_fields[] = {
80 {.off = 0, .val = ixgbe_mat_prgm_ports,
81 .type = IXGBE_ATR_FLOW_TYPE_TCPV4},
82 { .val = NULL } /* terminal node */
83};
84
85struct ixgbe_nexthdr {
86 /* offset, shift, and mask of position to next header */
87 unsigned int o;
88 u32 s;
89 u32 m;
90 /* match criteria to make this jump*/
91 unsigned int off;
92 u32 val;
93 u32 mask;
94 /* location of jump to make */
95 struct ixgbe_mat_field *jump;
96};
97
98static struct ixgbe_nexthdr ixgbe_ipv4_jumps[] = {
99 { .o = 0, .s = 6, .m = 0xf,
100 .off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields},
101 { .jump = NULL } /* terminal node */
102};
103#endif /* _IXGBE_MODEL_H_ */