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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e_type.h"
28#include "i40e_adminq.h"
29#include "i40e_prototype.h"
30#include "i40e_virtchnl.h"
31
32/**
33 * i40e_set_mac_type - Sets MAC type
34 * @hw: pointer to the HW structure
35 *
36 * This function sets the mac type of the adapter based on the
37 * vendor ID and device ID stored in the hw structure.
38 **/
39i40e_status i40e_set_mac_type(struct i40e_hw *hw)
40{
41 i40e_status status = 0;
42
43 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
44 switch (hw->device_id) {
45 case I40E_DEV_ID_SFP_XL710:
46 case I40E_DEV_ID_QEMU:
47 case I40E_DEV_ID_KX_B:
48 case I40E_DEV_ID_KX_C:
49 case I40E_DEV_ID_QSFP_A:
50 case I40E_DEV_ID_QSFP_B:
51 case I40E_DEV_ID_QSFP_C:
52 case I40E_DEV_ID_10G_BASE_T:
53 case I40E_DEV_ID_10G_BASE_T4:
54 case I40E_DEV_ID_20G_KR2:
55 case I40E_DEV_ID_20G_KR2_A:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_DEV_ID_SFP_X722:
59 case I40E_DEV_ID_1G_BASE_T_X722:
60 case I40E_DEV_ID_10G_BASE_T_X722:
61 hw->mac.type = I40E_MAC_X722;
62 break;
63 case I40E_DEV_ID_X722_VF:
64 case I40E_DEV_ID_X722_VF_HV:
65 hw->mac.type = I40E_MAC_X722_VF;
66 break;
67 case I40E_DEV_ID_VF:
68 case I40E_DEV_ID_VF_HV:
69 hw->mac.type = I40E_MAC_VF;
70 break;
71 default:
72 hw->mac.type = I40E_MAC_GENERIC;
73 break;
74 }
75 } else {
76 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
77 }
78
79 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
80 hw->mac.type, status);
81 return status;
82}
83
84/**
85 * i40evf_aq_str - convert AQ err code to a string
86 * @hw: pointer to the HW structure
87 * @aq_err: the AQ error code to convert
88 **/
89const char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
90{
91 switch (aq_err) {
92 case I40E_AQ_RC_OK:
93 return "OK";
94 case I40E_AQ_RC_EPERM:
95 return "I40E_AQ_RC_EPERM";
96 case I40E_AQ_RC_ENOENT:
97 return "I40E_AQ_RC_ENOENT";
98 case I40E_AQ_RC_ESRCH:
99 return "I40E_AQ_RC_ESRCH";
100 case I40E_AQ_RC_EINTR:
101 return "I40E_AQ_RC_EINTR";
102 case I40E_AQ_RC_EIO:
103 return "I40E_AQ_RC_EIO";
104 case I40E_AQ_RC_ENXIO:
105 return "I40E_AQ_RC_ENXIO";
106 case I40E_AQ_RC_E2BIG:
107 return "I40E_AQ_RC_E2BIG";
108 case I40E_AQ_RC_EAGAIN:
109 return "I40E_AQ_RC_EAGAIN";
110 case I40E_AQ_RC_ENOMEM:
111 return "I40E_AQ_RC_ENOMEM";
112 case I40E_AQ_RC_EACCES:
113 return "I40E_AQ_RC_EACCES";
114 case I40E_AQ_RC_EFAULT:
115 return "I40E_AQ_RC_EFAULT";
116 case I40E_AQ_RC_EBUSY:
117 return "I40E_AQ_RC_EBUSY";
118 case I40E_AQ_RC_EEXIST:
119 return "I40E_AQ_RC_EEXIST";
120 case I40E_AQ_RC_EINVAL:
121 return "I40E_AQ_RC_EINVAL";
122 case I40E_AQ_RC_ENOTTY:
123 return "I40E_AQ_RC_ENOTTY";
124 case I40E_AQ_RC_ENOSPC:
125 return "I40E_AQ_RC_ENOSPC";
126 case I40E_AQ_RC_ENOSYS:
127 return "I40E_AQ_RC_ENOSYS";
128 case I40E_AQ_RC_ERANGE:
129 return "I40E_AQ_RC_ERANGE";
130 case I40E_AQ_RC_EFLUSHED:
131 return "I40E_AQ_RC_EFLUSHED";
132 case I40E_AQ_RC_BAD_ADDR:
133 return "I40E_AQ_RC_BAD_ADDR";
134 case I40E_AQ_RC_EMODE:
135 return "I40E_AQ_RC_EMODE";
136 case I40E_AQ_RC_EFBIG:
137 return "I40E_AQ_RC_EFBIG";
138 }
139
140 snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);
141 return hw->err_str;
142}
143
144/**
145 * i40evf_stat_str - convert status err code to a string
146 * @hw: pointer to the HW structure
147 * @stat_err: the status error code to convert
148 **/
149const char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err)
150{
151 switch (stat_err) {
152 case 0:
153 return "OK";
154 case I40E_ERR_NVM:
155 return "I40E_ERR_NVM";
156 case I40E_ERR_NVM_CHECKSUM:
157 return "I40E_ERR_NVM_CHECKSUM";
158 case I40E_ERR_PHY:
159 return "I40E_ERR_PHY";
160 case I40E_ERR_CONFIG:
161 return "I40E_ERR_CONFIG";
162 case I40E_ERR_PARAM:
163 return "I40E_ERR_PARAM";
164 case I40E_ERR_MAC_TYPE:
165 return "I40E_ERR_MAC_TYPE";
166 case I40E_ERR_UNKNOWN_PHY:
167 return "I40E_ERR_UNKNOWN_PHY";
168 case I40E_ERR_LINK_SETUP:
169 return "I40E_ERR_LINK_SETUP";
170 case I40E_ERR_ADAPTER_STOPPED:
171 return "I40E_ERR_ADAPTER_STOPPED";
172 case I40E_ERR_INVALID_MAC_ADDR:
173 return "I40E_ERR_INVALID_MAC_ADDR";
174 case I40E_ERR_DEVICE_NOT_SUPPORTED:
175 return "I40E_ERR_DEVICE_NOT_SUPPORTED";
176 case I40E_ERR_MASTER_REQUESTS_PENDING:
177 return "I40E_ERR_MASTER_REQUESTS_PENDING";
178 case I40E_ERR_INVALID_LINK_SETTINGS:
179 return "I40E_ERR_INVALID_LINK_SETTINGS";
180 case I40E_ERR_AUTONEG_NOT_COMPLETE:
181 return "I40E_ERR_AUTONEG_NOT_COMPLETE";
182 case I40E_ERR_RESET_FAILED:
183 return "I40E_ERR_RESET_FAILED";
184 case I40E_ERR_SWFW_SYNC:
185 return "I40E_ERR_SWFW_SYNC";
186 case I40E_ERR_NO_AVAILABLE_VSI:
187 return "I40E_ERR_NO_AVAILABLE_VSI";
188 case I40E_ERR_NO_MEMORY:
189 return "I40E_ERR_NO_MEMORY";
190 case I40E_ERR_BAD_PTR:
191 return "I40E_ERR_BAD_PTR";
192 case I40E_ERR_RING_FULL:
193 return "I40E_ERR_RING_FULL";
194 case I40E_ERR_INVALID_PD_ID:
195 return "I40E_ERR_INVALID_PD_ID";
196 case I40E_ERR_INVALID_QP_ID:
197 return "I40E_ERR_INVALID_QP_ID";
198 case I40E_ERR_INVALID_CQ_ID:
199 return "I40E_ERR_INVALID_CQ_ID";
200 case I40E_ERR_INVALID_CEQ_ID:
201 return "I40E_ERR_INVALID_CEQ_ID";
202 case I40E_ERR_INVALID_AEQ_ID:
203 return "I40E_ERR_INVALID_AEQ_ID";
204 case I40E_ERR_INVALID_SIZE:
205 return "I40E_ERR_INVALID_SIZE";
206 case I40E_ERR_INVALID_ARP_INDEX:
207 return "I40E_ERR_INVALID_ARP_INDEX";
208 case I40E_ERR_INVALID_FPM_FUNC_ID:
209 return "I40E_ERR_INVALID_FPM_FUNC_ID";
210 case I40E_ERR_QP_INVALID_MSG_SIZE:
211 return "I40E_ERR_QP_INVALID_MSG_SIZE";
212 case I40E_ERR_QP_TOOMANY_WRS_POSTED:
213 return "I40E_ERR_QP_TOOMANY_WRS_POSTED";
214 case I40E_ERR_INVALID_FRAG_COUNT:
215 return "I40E_ERR_INVALID_FRAG_COUNT";
216 case I40E_ERR_QUEUE_EMPTY:
217 return "I40E_ERR_QUEUE_EMPTY";
218 case I40E_ERR_INVALID_ALIGNMENT:
219 return "I40E_ERR_INVALID_ALIGNMENT";
220 case I40E_ERR_FLUSHED_QUEUE:
221 return "I40E_ERR_FLUSHED_QUEUE";
222 case I40E_ERR_INVALID_PUSH_PAGE_INDEX:
223 return "I40E_ERR_INVALID_PUSH_PAGE_INDEX";
224 case I40E_ERR_INVALID_IMM_DATA_SIZE:
225 return "I40E_ERR_INVALID_IMM_DATA_SIZE";
226 case I40E_ERR_TIMEOUT:
227 return "I40E_ERR_TIMEOUT";
228 case I40E_ERR_OPCODE_MISMATCH:
229 return "I40E_ERR_OPCODE_MISMATCH";
230 case I40E_ERR_CQP_COMPL_ERROR:
231 return "I40E_ERR_CQP_COMPL_ERROR";
232 case I40E_ERR_INVALID_VF_ID:
233 return "I40E_ERR_INVALID_VF_ID";
234 case I40E_ERR_INVALID_HMCFN_ID:
235 return "I40E_ERR_INVALID_HMCFN_ID";
236 case I40E_ERR_BACKING_PAGE_ERROR:
237 return "I40E_ERR_BACKING_PAGE_ERROR";
238 case I40E_ERR_NO_PBLCHUNKS_AVAILABLE:
239 return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE";
240 case I40E_ERR_INVALID_PBLE_INDEX:
241 return "I40E_ERR_INVALID_PBLE_INDEX";
242 case I40E_ERR_INVALID_SD_INDEX:
243 return "I40E_ERR_INVALID_SD_INDEX";
244 case I40E_ERR_INVALID_PAGE_DESC_INDEX:
245 return "I40E_ERR_INVALID_PAGE_DESC_INDEX";
246 case I40E_ERR_INVALID_SD_TYPE:
247 return "I40E_ERR_INVALID_SD_TYPE";
248 case I40E_ERR_MEMCPY_FAILED:
249 return "I40E_ERR_MEMCPY_FAILED";
250 case I40E_ERR_INVALID_HMC_OBJ_INDEX:
251 return "I40E_ERR_INVALID_HMC_OBJ_INDEX";
252 case I40E_ERR_INVALID_HMC_OBJ_COUNT:
253 return "I40E_ERR_INVALID_HMC_OBJ_COUNT";
254 case I40E_ERR_INVALID_SRQ_ARM_LIMIT:
255 return "I40E_ERR_INVALID_SRQ_ARM_LIMIT";
256 case I40E_ERR_SRQ_ENABLED:
257 return "I40E_ERR_SRQ_ENABLED";
258 case I40E_ERR_ADMIN_QUEUE_ERROR:
259 return "I40E_ERR_ADMIN_QUEUE_ERROR";
260 case I40E_ERR_ADMIN_QUEUE_TIMEOUT:
261 return "I40E_ERR_ADMIN_QUEUE_TIMEOUT";
262 case I40E_ERR_BUF_TOO_SHORT:
263 return "I40E_ERR_BUF_TOO_SHORT";
264 case I40E_ERR_ADMIN_QUEUE_FULL:
265 return "I40E_ERR_ADMIN_QUEUE_FULL";
266 case I40E_ERR_ADMIN_QUEUE_NO_WORK:
267 return "I40E_ERR_ADMIN_QUEUE_NO_WORK";
268 case I40E_ERR_BAD_IWARP_CQE:
269 return "I40E_ERR_BAD_IWARP_CQE";
270 case I40E_ERR_NVM_BLANK_MODE:
271 return "I40E_ERR_NVM_BLANK_MODE";
272 case I40E_ERR_NOT_IMPLEMENTED:
273 return "I40E_ERR_NOT_IMPLEMENTED";
274 case I40E_ERR_PE_DOORBELL_NOT_ENABLED:
275 return "I40E_ERR_PE_DOORBELL_NOT_ENABLED";
276 case I40E_ERR_DIAG_TEST_FAILED:
277 return "I40E_ERR_DIAG_TEST_FAILED";
278 case I40E_ERR_NOT_READY:
279 return "I40E_ERR_NOT_READY";
280 case I40E_NOT_SUPPORTED:
281 return "I40E_NOT_SUPPORTED";
282 case I40E_ERR_FIRMWARE_API_VERSION:
283 return "I40E_ERR_FIRMWARE_API_VERSION";
284 }
285
286 snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);
287 return hw->err_str;
288}
289
290/**
291 * i40evf_debug_aq
292 * @hw: debug mask related to admin queue
293 * @mask: debug mask
294 * @desc: pointer to admin queue descriptor
295 * @buffer: pointer to command buffer
296 * @buf_len: max length of buffer
297 *
298 * Dumps debug log about adminq command with descriptor contents.
299 **/
300void i40evf_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
301 void *buffer, u16 buf_len)
302{
303 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
304 u16 len = le16_to_cpu(aq_desc->datalen);
305 u8 *buf = (u8 *)buffer;
306 u16 i = 0;
307
308 if ((!(mask & hw->debug_mask)) || (desc == NULL))
309 return;
310
311 i40e_debug(hw, mask,
312 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
313 le16_to_cpu(aq_desc->opcode),
314 le16_to_cpu(aq_desc->flags),
315 le16_to_cpu(aq_desc->datalen),
316 le16_to_cpu(aq_desc->retval));
317 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
318 le32_to_cpu(aq_desc->cookie_high),
319 le32_to_cpu(aq_desc->cookie_low));
320 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
321 le32_to_cpu(aq_desc->params.internal.param0),
322 le32_to_cpu(aq_desc->params.internal.param1));
323 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
324 le32_to_cpu(aq_desc->params.external.addr_high),
325 le32_to_cpu(aq_desc->params.external.addr_low));
326
327 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
328 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
329 if (buf_len < len)
330 len = buf_len;
331 /* write the full 16-byte chunks */
332 for (i = 0; i < (len - 16); i += 16)
333 i40e_debug(hw, mask, "\t0x%04X %16ph\n", i, buf + i);
334 /* write whatever's left over without overrunning the buffer */
335 if (i < len)
336 i40e_debug(hw, mask, "\t0x%04X %*ph\n",
337 i, len - i, buf + i);
338 }
339}
340
341/**
342 * i40evf_check_asq_alive
343 * @hw: pointer to the hw struct
344 *
345 * Returns true if Queue is enabled else false.
346 **/
347bool i40evf_check_asq_alive(struct i40e_hw *hw)
348{
349 if (hw->aq.asq.len)
350 return !!(rd32(hw, hw->aq.asq.len) &
351 I40E_VF_ATQLEN1_ATQENABLE_MASK);
352 else
353 return false;
354}
355
356/**
357 * i40evf_aq_queue_shutdown
358 * @hw: pointer to the hw struct
359 * @unloading: is the driver unloading itself
360 *
361 * Tell the Firmware that we're shutting down the AdminQ and whether
362 * or not the driver is unloading as well.
363 **/
364i40e_status i40evf_aq_queue_shutdown(struct i40e_hw *hw,
365 bool unloading)
366{
367 struct i40e_aq_desc desc;
368 struct i40e_aqc_queue_shutdown *cmd =
369 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
370 i40e_status status;
371
372 i40evf_fill_default_direct_cmd_desc(&desc,
373 i40e_aqc_opc_queue_shutdown);
374
375 if (unloading)
376 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
377 status = i40evf_asq_send_command(hw, &desc, NULL, 0, NULL);
378
379 return status;
380}
381
382/**
383 * i40e_aq_get_set_rss_lut
384 * @hw: pointer to the hardware structure
385 * @vsi_id: vsi fw index
386 * @pf_lut: for PF table set true, for VSI table set false
387 * @lut: pointer to the lut buffer provided by the caller
388 * @lut_size: size of the lut buffer
389 * @set: set true to set the table, false to get the table
390 *
391 * Internal function to get or set RSS look up table
392 **/
393static i40e_status i40e_aq_get_set_rss_lut(struct i40e_hw *hw,
394 u16 vsi_id, bool pf_lut,
395 u8 *lut, u16 lut_size,
396 bool set)
397{
398 i40e_status status;
399 struct i40e_aq_desc desc;
400 struct i40e_aqc_get_set_rss_lut *cmd_resp =
401 (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw;
402
403 if (set)
404 i40evf_fill_default_direct_cmd_desc(&desc,
405 i40e_aqc_opc_set_rss_lut);
406 else
407 i40evf_fill_default_direct_cmd_desc(&desc,
408 i40e_aqc_opc_get_rss_lut);
409
410 /* Indirect command */
411 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
412 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
413
414 cmd_resp->vsi_id =
415 cpu_to_le16((u16)((vsi_id <<
416 I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) &
417 I40E_AQC_SET_RSS_LUT_VSI_ID_MASK));
418 cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID);
419
420 if (pf_lut)
421 cmd_resp->flags |= cpu_to_le16((u16)
422 ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF <<
423 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
424 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
425 else
426 cmd_resp->flags |= cpu_to_le16((u16)
427 ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI <<
428 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) &
429 I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK));
430
431 status = i40evf_asq_send_command(hw, &desc, lut, lut_size, NULL);
432
433 return status;
434}
435
436/**
437 * i40evf_aq_get_rss_lut
438 * @hw: pointer to the hardware structure
439 * @vsi_id: vsi fw index
440 * @pf_lut: for PF table set true, for VSI table set false
441 * @lut: pointer to the lut buffer provided by the caller
442 * @lut_size: size of the lut buffer
443 *
444 * get the RSS lookup table, PF or VSI type
445 **/
446i40e_status i40evf_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,
447 bool pf_lut, u8 *lut, u16 lut_size)
448{
449 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,
450 false);
451}
452
453/**
454 * i40evf_aq_set_rss_lut
455 * @hw: pointer to the hardware structure
456 * @vsi_id: vsi fw index
457 * @pf_lut: for PF table set true, for VSI table set false
458 * @lut: pointer to the lut buffer provided by the caller
459 * @lut_size: size of the lut buffer
460 *
461 * set the RSS lookup table, PF or VSI type
462 **/
463i40e_status i40evf_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,
464 bool pf_lut, u8 *lut, u16 lut_size)
465{
466 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);
467}
468
469/**
470 * i40e_aq_get_set_rss_key
471 * @hw: pointer to the hw struct
472 * @vsi_id: vsi fw index
473 * @key: pointer to key info struct
474 * @set: set true to set the key, false to get the key
475 *
476 * get the RSS key per VSI
477 **/
478static i40e_status i40e_aq_get_set_rss_key(struct i40e_hw *hw,
479 u16 vsi_id,
480 struct i40e_aqc_get_set_rss_key_data *key,
481 bool set)
482{
483 i40e_status status;
484 struct i40e_aq_desc desc;
485 struct i40e_aqc_get_set_rss_key *cmd_resp =
486 (struct i40e_aqc_get_set_rss_key *)&desc.params.raw;
487 u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);
488
489 if (set)
490 i40evf_fill_default_direct_cmd_desc(&desc,
491 i40e_aqc_opc_set_rss_key);
492 else
493 i40evf_fill_default_direct_cmd_desc(&desc,
494 i40e_aqc_opc_get_rss_key);
495
496 /* Indirect command */
497 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
498 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
499
500 cmd_resp->vsi_id =
501 cpu_to_le16((u16)((vsi_id <<
502 I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) &
503 I40E_AQC_SET_RSS_KEY_VSI_ID_MASK));
504 cmd_resp->vsi_id |= cpu_to_le16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID);
505
506 status = i40evf_asq_send_command(hw, &desc, key, key_size, NULL);
507
508 return status;
509}
510
511/**
512 * i40evf_aq_get_rss_key
513 * @hw: pointer to the hw struct
514 * @vsi_id: vsi fw index
515 * @key: pointer to key info struct
516 *
517 **/
518i40e_status i40evf_aq_get_rss_key(struct i40e_hw *hw,
519 u16 vsi_id,
520 struct i40e_aqc_get_set_rss_key_data *key)
521{
522 return i40e_aq_get_set_rss_key(hw, vsi_id, key, false);
523}
524
525/**
526 * i40evf_aq_set_rss_key
527 * @hw: pointer to the hw struct
528 * @vsi_id: vsi fw index
529 * @key: pointer to key info struct
530 *
531 * set the RSS key per VSI
532 **/
533i40e_status i40evf_aq_set_rss_key(struct i40e_hw *hw,
534 u16 vsi_id,
535 struct i40e_aqc_get_set_rss_key_data *key)
536{
537 return i40e_aq_get_set_rss_key(hw, vsi_id, key, true);
538}
539
540
541/* The i40evf_ptype_lookup table is used to convert from the 8-bit ptype in the
542 * hardware to a bit-field that can be used by SW to more easily determine the
543 * packet type.
544 *
545 * Macros are used to shorten the table lines and make this table human
546 * readable.
547 *
548 * We store the PTYPE in the top byte of the bit field - this is just so that
549 * we can check that the table doesn't have a row missing, as the index into
550 * the table should be the PTYPE.
551 *
552 * Typical work flow:
553 *
554 * IF NOT i40evf_ptype_lookup[ptype].known
555 * THEN
556 * Packet is unknown
557 * ELSE IF i40evf_ptype_lookup[ptype].outer_ip == I40E_RX_PTYPE_OUTER_IP
558 * Use the rest of the fields to look at the tunnels, inner protocols, etc
559 * ELSE
560 * Use the enum i40e_rx_l2_ptype to decode the packet type
561 * ENDIF
562 */
563
564/* macro to make the table lines short */
565#define I40E_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\
566 { PTYPE, \
567 1, \
568 I40E_RX_PTYPE_OUTER_##OUTER_IP, \
569 I40E_RX_PTYPE_OUTER_##OUTER_IP_VER, \
570 I40E_RX_PTYPE_##OUTER_FRAG, \
571 I40E_RX_PTYPE_TUNNEL_##T, \
572 I40E_RX_PTYPE_TUNNEL_END_##TE, \
573 I40E_RX_PTYPE_##TEF, \
574 I40E_RX_PTYPE_INNER_PROT_##I, \
575 I40E_RX_PTYPE_PAYLOAD_LAYER_##PL }
576
577#define I40E_PTT_UNUSED_ENTRY(PTYPE) \
578 { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
579
580/* shorter macros makes the table fit but are terse */
581#define I40E_RX_PTYPE_NOF I40E_RX_PTYPE_NOT_FRAG
582#define I40E_RX_PTYPE_FRG I40E_RX_PTYPE_FRAG
583#define I40E_RX_PTYPE_INNER_PROT_TS I40E_RX_PTYPE_INNER_PROT_TIMESYNC
584
585/* Lookup table mapping the HW PTYPE to the bit field for decoding */
586struct i40e_rx_ptype_decoded i40evf_ptype_lookup[] = {
587 /* L2 Packet types */
588 I40E_PTT_UNUSED_ENTRY(0),
589 I40E_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
590 I40E_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, TS, PAY2),
591 I40E_PTT(3, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
592 I40E_PTT_UNUSED_ENTRY(4),
593 I40E_PTT_UNUSED_ENTRY(5),
594 I40E_PTT(6, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
595 I40E_PTT(7, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
596 I40E_PTT_UNUSED_ENTRY(8),
597 I40E_PTT_UNUSED_ENTRY(9),
598 I40E_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
599 I40E_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
600 I40E_PTT(12, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
601 I40E_PTT(13, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
602 I40E_PTT(14, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
603 I40E_PTT(15, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
604 I40E_PTT(16, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
605 I40E_PTT(17, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
606 I40E_PTT(18, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
607 I40E_PTT(19, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
608 I40E_PTT(20, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
609 I40E_PTT(21, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
610
611 /* Non Tunneled IPv4 */
612 I40E_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3),
613 I40E_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3),
614 I40E_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4),
615 I40E_PTT_UNUSED_ENTRY(25),
616 I40E_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4),
617 I40E_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4),
618 I40E_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4),
619
620 /* IPv4 --> IPv4 */
621 I40E_PTT(29, IP, IPV4, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
622 I40E_PTT(30, IP, IPV4, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
623 I40E_PTT(31, IP, IPV4, NOF, IP_IP, IPV4, NOF, UDP, PAY4),
624 I40E_PTT_UNUSED_ENTRY(32),
625 I40E_PTT(33, IP, IPV4, NOF, IP_IP, IPV4, NOF, TCP, PAY4),
626 I40E_PTT(34, IP, IPV4, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
627 I40E_PTT(35, IP, IPV4, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
628
629 /* IPv4 --> IPv6 */
630 I40E_PTT(36, IP, IPV4, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
631 I40E_PTT(37, IP, IPV4, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
632 I40E_PTT(38, IP, IPV4, NOF, IP_IP, IPV6, NOF, UDP, PAY4),
633 I40E_PTT_UNUSED_ENTRY(39),
634 I40E_PTT(40, IP, IPV4, NOF, IP_IP, IPV6, NOF, TCP, PAY4),
635 I40E_PTT(41, IP, IPV4, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
636 I40E_PTT(42, IP, IPV4, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
637
638 /* IPv4 --> GRE/NAT */
639 I40E_PTT(43, IP, IPV4, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
640
641 /* IPv4 --> GRE/NAT --> IPv4 */
642 I40E_PTT(44, IP, IPV4, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
643 I40E_PTT(45, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
644 I40E_PTT(46, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4),
645 I40E_PTT_UNUSED_ENTRY(47),
646 I40E_PTT(48, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4),
647 I40E_PTT(49, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
648 I40E_PTT(50, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
649
650 /* IPv4 --> GRE/NAT --> IPv6 */
651 I40E_PTT(51, IP, IPV4, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
652 I40E_PTT(52, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
653 I40E_PTT(53, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4),
654 I40E_PTT_UNUSED_ENTRY(54),
655 I40E_PTT(55, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4),
656 I40E_PTT(56, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
657 I40E_PTT(57, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
658
659 /* IPv4 --> GRE/NAT --> MAC */
660 I40E_PTT(58, IP, IPV4, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
661
662 /* IPv4 --> GRE/NAT --> MAC --> IPv4 */
663 I40E_PTT(59, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
664 I40E_PTT(60, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
665 I40E_PTT(61, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4),
666 I40E_PTT_UNUSED_ENTRY(62),
667 I40E_PTT(63, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4),
668 I40E_PTT(64, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
669 I40E_PTT(65, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
670
671 /* IPv4 --> GRE/NAT -> MAC --> IPv6 */
672 I40E_PTT(66, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
673 I40E_PTT(67, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
674 I40E_PTT(68, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4),
675 I40E_PTT_UNUSED_ENTRY(69),
676 I40E_PTT(70, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4),
677 I40E_PTT(71, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
678 I40E_PTT(72, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
679
680 /* IPv4 --> GRE/NAT --> MAC/VLAN */
681 I40E_PTT(73, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
682
683 /* IPv4 ---> GRE/NAT -> MAC/VLAN --> IPv4 */
684 I40E_PTT(74, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
685 I40E_PTT(75, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
686 I40E_PTT(76, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4),
687 I40E_PTT_UNUSED_ENTRY(77),
688 I40E_PTT(78, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4),
689 I40E_PTT(79, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
690 I40E_PTT(80, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
691
692 /* IPv4 -> GRE/NAT -> MAC/VLAN --> IPv6 */
693 I40E_PTT(81, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
694 I40E_PTT(82, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
695 I40E_PTT(83, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4),
696 I40E_PTT_UNUSED_ENTRY(84),
697 I40E_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
698 I40E_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
699 I40E_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
700
701 /* Non Tunneled IPv6 */
702 I40E_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3),
703 I40E_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3),
704 I40E_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3),
705 I40E_PTT_UNUSED_ENTRY(91),
706 I40E_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4),
707 I40E_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4),
708 I40E_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4),
709
710 /* IPv6 --> IPv4 */
711 I40E_PTT(95, IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3),
712 I40E_PTT(96, IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3),
713 I40E_PTT(97, IP, IPV6, NOF, IP_IP, IPV4, NOF, UDP, PAY4),
714 I40E_PTT_UNUSED_ENTRY(98),
715 I40E_PTT(99, IP, IPV6, NOF, IP_IP, IPV4, NOF, TCP, PAY4),
716 I40E_PTT(100, IP, IPV6, NOF, IP_IP, IPV4, NOF, SCTP, PAY4),
717 I40E_PTT(101, IP, IPV6, NOF, IP_IP, IPV4, NOF, ICMP, PAY4),
718
719 /* IPv6 --> IPv6 */
720 I40E_PTT(102, IP, IPV6, NOF, IP_IP, IPV6, FRG, NONE, PAY3),
721 I40E_PTT(103, IP, IPV6, NOF, IP_IP, IPV6, NOF, NONE, PAY3),
722 I40E_PTT(104, IP, IPV6, NOF, IP_IP, IPV6, NOF, UDP, PAY4),
723 I40E_PTT_UNUSED_ENTRY(105),
724 I40E_PTT(106, IP, IPV6, NOF, IP_IP, IPV6, NOF, TCP, PAY4),
725 I40E_PTT(107, IP, IPV6, NOF, IP_IP, IPV6, NOF, SCTP, PAY4),
726 I40E_PTT(108, IP, IPV6, NOF, IP_IP, IPV6, NOF, ICMP, PAY4),
727
728 /* IPv6 --> GRE/NAT */
729 I40E_PTT(109, IP, IPV6, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3),
730
731 /* IPv6 --> GRE/NAT -> IPv4 */
732 I40E_PTT(110, IP, IPV6, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3),
733 I40E_PTT(111, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3),
734 I40E_PTT(112, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4),
735 I40E_PTT_UNUSED_ENTRY(113),
736 I40E_PTT(114, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4),
737 I40E_PTT(115, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4),
738 I40E_PTT(116, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4),
739
740 /* IPv6 --> GRE/NAT -> IPv6 */
741 I40E_PTT(117, IP, IPV6, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3),
742 I40E_PTT(118, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3),
743 I40E_PTT(119, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4),
744 I40E_PTT_UNUSED_ENTRY(120),
745 I40E_PTT(121, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4),
746 I40E_PTT(122, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4),
747 I40E_PTT(123, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4),
748
749 /* IPv6 --> GRE/NAT -> MAC */
750 I40E_PTT(124, IP, IPV6, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3),
751
752 /* IPv6 --> GRE/NAT -> MAC -> IPv4 */
753 I40E_PTT(125, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3),
754 I40E_PTT(126, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3),
755 I40E_PTT(127, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4),
756 I40E_PTT_UNUSED_ENTRY(128),
757 I40E_PTT(129, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4),
758 I40E_PTT(130, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4),
759 I40E_PTT(131, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4),
760
761 /* IPv6 --> GRE/NAT -> MAC -> IPv6 */
762 I40E_PTT(132, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3),
763 I40E_PTT(133, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3),
764 I40E_PTT(134, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4),
765 I40E_PTT_UNUSED_ENTRY(135),
766 I40E_PTT(136, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4),
767 I40E_PTT(137, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4),
768 I40E_PTT(138, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4),
769
770 /* IPv6 --> GRE/NAT -> MAC/VLAN */
771 I40E_PTT(139, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3),
772
773 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv4 */
774 I40E_PTT(140, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3),
775 I40E_PTT(141, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3),
776 I40E_PTT(142, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4),
777 I40E_PTT_UNUSED_ENTRY(143),
778 I40E_PTT(144, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4),
779 I40E_PTT(145, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4),
780 I40E_PTT(146, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4),
781
782 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv6 */
783 I40E_PTT(147, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3),
784 I40E_PTT(148, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3),
785 I40E_PTT(149, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4),
786 I40E_PTT_UNUSED_ENTRY(150),
787 I40E_PTT(151, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4),
788 I40E_PTT(152, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4),
789 I40E_PTT(153, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4),
790
791 /* unused entries */
792 I40E_PTT_UNUSED_ENTRY(154),
793 I40E_PTT_UNUSED_ENTRY(155),
794 I40E_PTT_UNUSED_ENTRY(156),
795 I40E_PTT_UNUSED_ENTRY(157),
796 I40E_PTT_UNUSED_ENTRY(158),
797 I40E_PTT_UNUSED_ENTRY(159),
798
799 I40E_PTT_UNUSED_ENTRY(160),
800 I40E_PTT_UNUSED_ENTRY(161),
801 I40E_PTT_UNUSED_ENTRY(162),
802 I40E_PTT_UNUSED_ENTRY(163),
803 I40E_PTT_UNUSED_ENTRY(164),
804 I40E_PTT_UNUSED_ENTRY(165),
805 I40E_PTT_UNUSED_ENTRY(166),
806 I40E_PTT_UNUSED_ENTRY(167),
807 I40E_PTT_UNUSED_ENTRY(168),
808 I40E_PTT_UNUSED_ENTRY(169),
809
810 I40E_PTT_UNUSED_ENTRY(170),
811 I40E_PTT_UNUSED_ENTRY(171),
812 I40E_PTT_UNUSED_ENTRY(172),
813 I40E_PTT_UNUSED_ENTRY(173),
814 I40E_PTT_UNUSED_ENTRY(174),
815 I40E_PTT_UNUSED_ENTRY(175),
816 I40E_PTT_UNUSED_ENTRY(176),
817 I40E_PTT_UNUSED_ENTRY(177),
818 I40E_PTT_UNUSED_ENTRY(178),
819 I40E_PTT_UNUSED_ENTRY(179),
820
821 I40E_PTT_UNUSED_ENTRY(180),
822 I40E_PTT_UNUSED_ENTRY(181),
823 I40E_PTT_UNUSED_ENTRY(182),
824 I40E_PTT_UNUSED_ENTRY(183),
825 I40E_PTT_UNUSED_ENTRY(184),
826 I40E_PTT_UNUSED_ENTRY(185),
827 I40E_PTT_UNUSED_ENTRY(186),
828 I40E_PTT_UNUSED_ENTRY(187),
829 I40E_PTT_UNUSED_ENTRY(188),
830 I40E_PTT_UNUSED_ENTRY(189),
831
832 I40E_PTT_UNUSED_ENTRY(190),
833 I40E_PTT_UNUSED_ENTRY(191),
834 I40E_PTT_UNUSED_ENTRY(192),
835 I40E_PTT_UNUSED_ENTRY(193),
836 I40E_PTT_UNUSED_ENTRY(194),
837 I40E_PTT_UNUSED_ENTRY(195),
838 I40E_PTT_UNUSED_ENTRY(196),
839 I40E_PTT_UNUSED_ENTRY(197),
840 I40E_PTT_UNUSED_ENTRY(198),
841 I40E_PTT_UNUSED_ENTRY(199),
842
843 I40E_PTT_UNUSED_ENTRY(200),
844 I40E_PTT_UNUSED_ENTRY(201),
845 I40E_PTT_UNUSED_ENTRY(202),
846 I40E_PTT_UNUSED_ENTRY(203),
847 I40E_PTT_UNUSED_ENTRY(204),
848 I40E_PTT_UNUSED_ENTRY(205),
849 I40E_PTT_UNUSED_ENTRY(206),
850 I40E_PTT_UNUSED_ENTRY(207),
851 I40E_PTT_UNUSED_ENTRY(208),
852 I40E_PTT_UNUSED_ENTRY(209),
853
854 I40E_PTT_UNUSED_ENTRY(210),
855 I40E_PTT_UNUSED_ENTRY(211),
856 I40E_PTT_UNUSED_ENTRY(212),
857 I40E_PTT_UNUSED_ENTRY(213),
858 I40E_PTT_UNUSED_ENTRY(214),
859 I40E_PTT_UNUSED_ENTRY(215),
860 I40E_PTT_UNUSED_ENTRY(216),
861 I40E_PTT_UNUSED_ENTRY(217),
862 I40E_PTT_UNUSED_ENTRY(218),
863 I40E_PTT_UNUSED_ENTRY(219),
864
865 I40E_PTT_UNUSED_ENTRY(220),
866 I40E_PTT_UNUSED_ENTRY(221),
867 I40E_PTT_UNUSED_ENTRY(222),
868 I40E_PTT_UNUSED_ENTRY(223),
869 I40E_PTT_UNUSED_ENTRY(224),
870 I40E_PTT_UNUSED_ENTRY(225),
871 I40E_PTT_UNUSED_ENTRY(226),
872 I40E_PTT_UNUSED_ENTRY(227),
873 I40E_PTT_UNUSED_ENTRY(228),
874 I40E_PTT_UNUSED_ENTRY(229),
875
876 I40E_PTT_UNUSED_ENTRY(230),
877 I40E_PTT_UNUSED_ENTRY(231),
878 I40E_PTT_UNUSED_ENTRY(232),
879 I40E_PTT_UNUSED_ENTRY(233),
880 I40E_PTT_UNUSED_ENTRY(234),
881 I40E_PTT_UNUSED_ENTRY(235),
882 I40E_PTT_UNUSED_ENTRY(236),
883 I40E_PTT_UNUSED_ENTRY(237),
884 I40E_PTT_UNUSED_ENTRY(238),
885 I40E_PTT_UNUSED_ENTRY(239),
886
887 I40E_PTT_UNUSED_ENTRY(240),
888 I40E_PTT_UNUSED_ENTRY(241),
889 I40E_PTT_UNUSED_ENTRY(242),
890 I40E_PTT_UNUSED_ENTRY(243),
891 I40E_PTT_UNUSED_ENTRY(244),
892 I40E_PTT_UNUSED_ENTRY(245),
893 I40E_PTT_UNUSED_ENTRY(246),
894 I40E_PTT_UNUSED_ENTRY(247),
895 I40E_PTT_UNUSED_ENTRY(248),
896 I40E_PTT_UNUSED_ENTRY(249),
897
898 I40E_PTT_UNUSED_ENTRY(250),
899 I40E_PTT_UNUSED_ENTRY(251),
900 I40E_PTT_UNUSED_ENTRY(252),
901 I40E_PTT_UNUSED_ENTRY(253),
902 I40E_PTT_UNUSED_ENTRY(254),
903 I40E_PTT_UNUSED_ENTRY(255)
904};
905
906/**
907 * i40evf_aq_rx_ctl_read_register - use FW to read from an Rx control register
908 * @hw: pointer to the hw struct
909 * @reg_addr: register address
910 * @reg_val: ptr to register value
911 * @cmd_details: pointer to command details structure or NULL
912 *
913 * Use the firmware to read the Rx control register,
914 * especially useful if the Rx unit is under heavy pressure
915 **/
916i40e_status i40evf_aq_rx_ctl_read_register(struct i40e_hw *hw,
917 u32 reg_addr, u32 *reg_val,
918 struct i40e_asq_cmd_details *cmd_details)
919{
920 struct i40e_aq_desc desc;
921 struct i40e_aqc_rx_ctl_reg_read_write *cmd_resp =
922 (struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
923 i40e_status status;
924
925 if (!reg_val)
926 return I40E_ERR_PARAM;
927
928 i40evf_fill_default_direct_cmd_desc(&desc,
929 i40e_aqc_opc_rx_ctl_reg_read);
930
931 cmd_resp->address = cpu_to_le32(reg_addr);
932
933 status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
934
935 if (status == 0)
936 *reg_val = le32_to_cpu(cmd_resp->value);
937
938 return status;
939}
940
941/**
942 * i40evf_read_rx_ctl - read from an Rx control register
943 * @hw: pointer to the hw struct
944 * @reg_addr: register address
945 **/
946u32 i40evf_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
947{
948 i40e_status status = 0;
949 bool use_register;
950 int retry = 5;
951 u32 val = 0;
952
953 use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
954 if (!use_register) {
955do_retry:
956 status = i40evf_aq_rx_ctl_read_register(hw, reg_addr,
957 &val, NULL);
958 if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
959 usleep_range(1000, 2000);
960 retry--;
961 goto do_retry;
962 }
963 }
964
965 /* if the AQ access failed, try the old-fashioned way */
966 if (status || use_register)
967 val = rd32(hw, reg_addr);
968
969 return val;
970}
971
972/**
973 * i40evf_aq_rx_ctl_write_register
974 * @hw: pointer to the hw struct
975 * @reg_addr: register address
976 * @reg_val: register value
977 * @cmd_details: pointer to command details structure or NULL
978 *
979 * Use the firmware to write to an Rx control register,
980 * especially useful if the Rx unit is under heavy pressure
981 **/
982i40e_status i40evf_aq_rx_ctl_write_register(struct i40e_hw *hw,
983 u32 reg_addr, u32 reg_val,
984 struct i40e_asq_cmd_details *cmd_details)
985{
986 struct i40e_aq_desc desc;
987 struct i40e_aqc_rx_ctl_reg_read_write *cmd =
988 (struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
989 i40e_status status;
990
991 i40evf_fill_default_direct_cmd_desc(&desc,
992 i40e_aqc_opc_rx_ctl_reg_write);
993
994 cmd->address = cpu_to_le32(reg_addr);
995 cmd->value = cpu_to_le32(reg_val);
996
997 status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
998
999 return status;
1000}
1001
1002/**
1003 * i40evf_write_rx_ctl - write to an Rx control register
1004 * @hw: pointer to the hw struct
1005 * @reg_addr: register address
1006 * @reg_val: register value
1007 **/
1008void i40evf_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
1009{
1010 i40e_status status = 0;
1011 bool use_register;
1012 int retry = 5;
1013
1014 use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
1015 if (!use_register) {
1016do_retry:
1017 status = i40evf_aq_rx_ctl_write_register(hw, reg_addr,
1018 reg_val, NULL);
1019 if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
1020 usleep_range(1000, 2000);
1021 retry--;
1022 goto do_retry;
1023 }
1024 }
1025
1026 /* if the AQ access failed, try the old-fashioned way */
1027 if (status || use_register)
1028 wr32(hw, reg_addr, reg_val);
1029}
1030
1031/**
1032 * i40e_aq_send_msg_to_pf
1033 * @hw: pointer to the hardware structure
1034 * @v_opcode: opcodes for VF-PF communication
1035 * @v_retval: return error code
1036 * @msg: pointer to the msg buffer
1037 * @msglen: msg length
1038 * @cmd_details: pointer to command details
1039 *
1040 * Send message to PF driver using admin queue. By default, this message
1041 * is sent asynchronously, i.e. i40evf_asq_send_command() does not wait for
1042 * completion before returning.
1043 **/
1044i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
1045 enum i40e_virtchnl_ops v_opcode,
1046 i40e_status v_retval,
1047 u8 *msg, u16 msglen,
1048 struct i40e_asq_cmd_details *cmd_details)
1049{
1050 struct i40e_aq_desc desc;
1051 struct i40e_asq_cmd_details details;
1052 i40e_status status;
1053
1054 i40evf_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_pf);
1055 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1056 desc.cookie_high = cpu_to_le32(v_opcode);
1057 desc.cookie_low = cpu_to_le32(v_retval);
1058 if (msglen) {
1059 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF
1060 | I40E_AQ_FLAG_RD));
1061 if (msglen > I40E_AQ_LARGE_BUF)
1062 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1063 desc.datalen = cpu_to_le16(msglen);
1064 }
1065 if (!cmd_details) {
1066 memset(&details, 0, sizeof(details));
1067 details.async = true;
1068 cmd_details = &details;
1069 }
1070 status = i40evf_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1071 return status;
1072}
1073
1074/**
1075 * i40e_vf_parse_hw_config
1076 * @hw: pointer to the hardware structure
1077 * @msg: pointer to the virtual channel VF resource structure
1078 *
1079 * Given a VF resource message from the PF, populate the hw struct
1080 * with appropriate information.
1081 **/
1082void i40e_vf_parse_hw_config(struct i40e_hw *hw,
1083 struct i40e_virtchnl_vf_resource *msg)
1084{
1085 struct i40e_virtchnl_vsi_resource *vsi_res;
1086 int i;
1087
1088 vsi_res = &msg->vsi_res[0];
1089
1090 hw->dev_caps.num_vsis = msg->num_vsis;
1091 hw->dev_caps.num_rx_qp = msg->num_queue_pairs;
1092 hw->dev_caps.num_tx_qp = msg->num_queue_pairs;
1093 hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;
1094 hw->dev_caps.dcb = msg->vf_offload_flags &
1095 I40E_VIRTCHNL_VF_OFFLOAD_L2;
1096 hw->dev_caps.fcoe = (msg->vf_offload_flags &
1097 I40E_VIRTCHNL_VF_OFFLOAD_FCOE) ? 1 : 0;
1098 for (i = 0; i < msg->num_vsis; i++) {
1099 if (vsi_res->vsi_type == I40E_VSI_SRIOV) {
1100 ether_addr_copy(hw->mac.perm_addr,
1101 vsi_res->default_mac_addr);
1102 ether_addr_copy(hw->mac.addr,
1103 vsi_res->default_mac_addr);
1104 }
1105 vsi_res++;
1106 }
1107}
1108
1109/**
1110 * i40e_vf_reset
1111 * @hw: pointer to the hardware structure
1112 *
1113 * Send a VF_RESET message to the PF. Does not wait for response from PF
1114 * as none will be forthcoming. Immediately after calling this function,
1115 * the admin queue should be shut down and (optionally) reinitialized.
1116 **/
1117i40e_status i40e_vf_reset(struct i40e_hw *hw)
1118{
1119 return i40e_aq_send_msg_to_pf(hw, I40E_VIRTCHNL_OP_RESET_VF,
1120 0, NULL, 0, NULL);
1121}