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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for 93xx46 EEPROMs
4 *
5 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
11#include <linux/kernel.h>
12#include <linux/log2.h>
13#include <linux/module.h>
14#include <linux/mutex.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/of_gpio.h>
18#include <linux/slab.h>
19#include <linux/spi/spi.h>
20#include <linux/nvmem-provider.h>
21#include <linux/eeprom_93xx46.h>
22
23#define OP_START 0x4
24#define OP_WRITE (OP_START | 0x1)
25#define OP_READ (OP_START | 0x2)
26#define ADDR_EWDS 0x00
27#define ADDR_ERAL 0x20
28#define ADDR_EWEN 0x30
29
30struct eeprom_93xx46_devtype_data {
31 unsigned int quirks;
32 unsigned char flags;
33};
34
35static const struct eeprom_93xx46_devtype_data at93c46_data = {
36 .flags = EE_SIZE1K,
37};
38
39static const struct eeprom_93xx46_devtype_data at93c56_data = {
40 .flags = EE_SIZE2K,
41};
42
43static const struct eeprom_93xx46_devtype_data at93c66_data = {
44 .flags = EE_SIZE4K,
45};
46
47static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
48 .flags = EE_SIZE1K,
49 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
50 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
51};
52
53static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
54 .flags = EE_SIZE1K,
55 .quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
56};
57
58struct eeprom_93xx46_dev {
59 struct spi_device *spi;
60 struct eeprom_93xx46_platform_data *pdata;
61 struct mutex lock;
62 struct nvmem_config nvmem_config;
63 struct nvmem_device *nvmem;
64 int addrlen;
65 int size;
66};
67
68static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
69{
70 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
71}
72
73static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
74{
75 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
76}
77
78static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
79{
80 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
81}
82
83static int eeprom_93xx46_read(void *priv, unsigned int off,
84 void *val, size_t count)
85{
86 struct eeprom_93xx46_dev *edev = priv;
87 char *buf = val;
88 int err = 0;
89 int bits;
90
91 if (unlikely(off >= edev->size))
92 return 0;
93 if ((off + count) > edev->size)
94 count = edev->size - off;
95 if (unlikely(!count))
96 return count;
97
98 mutex_lock(&edev->lock);
99
100 if (edev->pdata->prepare)
101 edev->pdata->prepare(edev);
102
103 /* The opcode in front of the address is three bits. */
104 bits = edev->addrlen + 3;
105
106 while (count) {
107 struct spi_message m;
108 struct spi_transfer t[2] = { { 0 } };
109 u16 cmd_addr = OP_READ << edev->addrlen;
110 size_t nbytes = count;
111
112 if (edev->pdata->flags & EE_ADDR8) {
113 cmd_addr |= off;
114 if (has_quirk_single_word_read(edev))
115 nbytes = 1;
116 } else {
117 cmd_addr |= (off >> 1);
118 if (has_quirk_single_word_read(edev))
119 nbytes = 2;
120 }
121
122 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
123 cmd_addr, edev->spi->max_speed_hz);
124
125 if (has_quirk_extra_read_cycle(edev)) {
126 cmd_addr <<= 1;
127 bits += 1;
128 }
129
130 spi_message_init(&m);
131
132 t[0].tx_buf = (char *)&cmd_addr;
133 t[0].len = 2;
134 t[0].bits_per_word = bits;
135 spi_message_add_tail(&t[0], &m);
136
137 t[1].rx_buf = buf;
138 t[1].len = count;
139 t[1].bits_per_word = 8;
140 spi_message_add_tail(&t[1], &m);
141
142 err = spi_sync(edev->spi, &m);
143 /* have to wait at least Tcsl ns */
144 ndelay(250);
145
146 if (err) {
147 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
148 nbytes, (int)off, err);
149 break;
150 }
151
152 buf += nbytes;
153 off += nbytes;
154 count -= nbytes;
155 }
156
157 if (edev->pdata->finish)
158 edev->pdata->finish(edev);
159
160 mutex_unlock(&edev->lock);
161
162 return err;
163}
164
165static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
166{
167 struct spi_message m;
168 struct spi_transfer t;
169 int bits, ret;
170 u16 cmd_addr;
171
172 /* The opcode in front of the address is three bits. */
173 bits = edev->addrlen + 3;
174
175 cmd_addr = OP_START << edev->addrlen;
176 if (edev->pdata->flags & EE_ADDR8)
177 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
178 else
179 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
180
181 if (has_quirk_instruction_length(edev)) {
182 cmd_addr <<= 2;
183 bits += 2;
184 }
185
186 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
187 is_on ? "en" : "ds", cmd_addr, bits);
188
189 spi_message_init(&m);
190 memset(&t, 0, sizeof(t));
191
192 t.tx_buf = &cmd_addr;
193 t.len = 2;
194 t.bits_per_word = bits;
195 spi_message_add_tail(&t, &m);
196
197 mutex_lock(&edev->lock);
198
199 if (edev->pdata->prepare)
200 edev->pdata->prepare(edev);
201
202 ret = spi_sync(edev->spi, &m);
203 /* have to wait at least Tcsl ns */
204 ndelay(250);
205 if (ret)
206 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
207 is_on ? "en" : "dis", ret);
208
209 if (edev->pdata->finish)
210 edev->pdata->finish(edev);
211
212 mutex_unlock(&edev->lock);
213 return ret;
214}
215
216static ssize_t
217eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
218 const char *buf, unsigned off)
219{
220 struct spi_message m;
221 struct spi_transfer t[2];
222 int bits, data_len, ret;
223 u16 cmd_addr;
224
225 if (unlikely(off >= edev->size))
226 return -EINVAL;
227
228 /* The opcode in front of the address is three bits. */
229 bits = edev->addrlen + 3;
230
231 cmd_addr = OP_WRITE << edev->addrlen;
232
233 if (edev->pdata->flags & EE_ADDR8) {
234 cmd_addr |= off;
235 data_len = 1;
236 } else {
237 cmd_addr |= (off >> 1);
238 data_len = 2;
239 }
240
241 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
242
243 spi_message_init(&m);
244 memset(t, 0, sizeof(t));
245
246 t[0].tx_buf = (char *)&cmd_addr;
247 t[0].len = 2;
248 t[0].bits_per_word = bits;
249 spi_message_add_tail(&t[0], &m);
250
251 t[1].tx_buf = buf;
252 t[1].len = data_len;
253 t[1].bits_per_word = 8;
254 spi_message_add_tail(&t[1], &m);
255
256 ret = spi_sync(edev->spi, &m);
257 /* have to wait program cycle time Twc ms */
258 mdelay(6);
259 return ret;
260}
261
262static int eeprom_93xx46_write(void *priv, unsigned int off,
263 void *val, size_t count)
264{
265 struct eeprom_93xx46_dev *edev = priv;
266 char *buf = val;
267 int i, ret, step = 1;
268
269 if (unlikely(off >= edev->size))
270 return -EFBIG;
271 if ((off + count) > edev->size)
272 count = edev->size - off;
273 if (unlikely(!count))
274 return count;
275
276 /* only write even number of bytes on 16-bit devices */
277 if (edev->pdata->flags & EE_ADDR16) {
278 step = 2;
279 count &= ~1;
280 }
281
282 /* erase/write enable */
283 ret = eeprom_93xx46_ew(edev, 1);
284 if (ret)
285 return ret;
286
287 mutex_lock(&edev->lock);
288
289 if (edev->pdata->prepare)
290 edev->pdata->prepare(edev);
291
292 for (i = 0; i < count; i += step) {
293 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
294 if (ret) {
295 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
296 (int)off + i, ret);
297 break;
298 }
299 }
300
301 if (edev->pdata->finish)
302 edev->pdata->finish(edev);
303
304 mutex_unlock(&edev->lock);
305
306 /* erase/write disable */
307 eeprom_93xx46_ew(edev, 0);
308 return ret;
309}
310
311static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
312{
313 struct eeprom_93xx46_platform_data *pd = edev->pdata;
314 struct spi_message m;
315 struct spi_transfer t;
316 int bits, ret;
317 u16 cmd_addr;
318
319 /* The opcode in front of the address is three bits. */
320 bits = edev->addrlen + 3;
321
322 cmd_addr = OP_START << edev->addrlen;
323 if (edev->pdata->flags & EE_ADDR8)
324 cmd_addr |= ADDR_ERAL << 1;
325 else
326 cmd_addr |= ADDR_ERAL;
327
328 if (has_quirk_instruction_length(edev)) {
329 cmd_addr <<= 2;
330 bits += 2;
331 }
332
333 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
334
335 spi_message_init(&m);
336 memset(&t, 0, sizeof(t));
337
338 t.tx_buf = &cmd_addr;
339 t.len = 2;
340 t.bits_per_word = bits;
341 spi_message_add_tail(&t, &m);
342
343 mutex_lock(&edev->lock);
344
345 if (edev->pdata->prepare)
346 edev->pdata->prepare(edev);
347
348 ret = spi_sync(edev->spi, &m);
349 if (ret)
350 dev_err(&edev->spi->dev, "erase error %d\n", ret);
351 /* have to wait erase cycle time Tec ms */
352 mdelay(6);
353
354 if (pd->finish)
355 pd->finish(edev);
356
357 mutex_unlock(&edev->lock);
358 return ret;
359}
360
361static ssize_t eeprom_93xx46_store_erase(struct device *dev,
362 struct device_attribute *attr,
363 const char *buf, size_t count)
364{
365 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
366 int erase = 0, ret;
367
368 sscanf(buf, "%d", &erase);
369 if (erase) {
370 ret = eeprom_93xx46_ew(edev, 1);
371 if (ret)
372 return ret;
373 ret = eeprom_93xx46_eral(edev);
374 if (ret)
375 return ret;
376 ret = eeprom_93xx46_ew(edev, 0);
377 if (ret)
378 return ret;
379 }
380 return count;
381}
382static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
383
384static void select_assert(void *context)
385{
386 struct eeprom_93xx46_dev *edev = context;
387
388 gpiod_set_value_cansleep(edev->pdata->select, 1);
389}
390
391static void select_deassert(void *context)
392{
393 struct eeprom_93xx46_dev *edev = context;
394
395 gpiod_set_value_cansleep(edev->pdata->select, 0);
396}
397
398static const struct of_device_id eeprom_93xx46_of_table[] = {
399 { .compatible = "eeprom-93xx46", .data = &at93c46_data, },
400 { .compatible = "atmel,at93c46", .data = &at93c46_data, },
401 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
402 { .compatible = "atmel,at93c56", .data = &at93c56_data, },
403 { .compatible = "atmel,at93c66", .data = &at93c66_data, },
404 { .compatible = "microchip,93lc46b", .data = µchip_93lc46b_data, },
405 {}
406};
407MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
408
409static const struct spi_device_id eeprom_93xx46_spi_ids[] = {
410 { .name = "eeprom-93xx46",
411 .driver_data = (kernel_ulong_t)&at93c46_data, },
412 { .name = "at93c46",
413 .driver_data = (kernel_ulong_t)&at93c46_data, },
414 { .name = "at93c46d",
415 .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, },
416 { .name = "at93c56",
417 .driver_data = (kernel_ulong_t)&at93c56_data, },
418 { .name = "at93c66",
419 .driver_data = (kernel_ulong_t)&at93c66_data, },
420 { .name = "93lc46b",
421 .driver_data = (kernel_ulong_t)µchip_93lc46b_data, },
422 {}
423};
424MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids);
425
426static int eeprom_93xx46_probe_dt(struct spi_device *spi)
427{
428 const struct of_device_id *of_id =
429 of_match_device(eeprom_93xx46_of_table, &spi->dev);
430 struct device_node *np = spi->dev.of_node;
431 struct eeprom_93xx46_platform_data *pd;
432 u32 tmp;
433 int ret;
434
435 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
436 if (!pd)
437 return -ENOMEM;
438
439 ret = of_property_read_u32(np, "data-size", &tmp);
440 if (ret < 0) {
441 dev_err(&spi->dev, "data-size property not found\n");
442 return ret;
443 }
444
445 if (tmp == 8) {
446 pd->flags |= EE_ADDR8;
447 } else if (tmp == 16) {
448 pd->flags |= EE_ADDR16;
449 } else {
450 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
451 return -EINVAL;
452 }
453
454 if (of_property_read_bool(np, "read-only"))
455 pd->flags |= EE_READONLY;
456
457 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
458 GPIOD_OUT_LOW);
459 if (IS_ERR(pd->select))
460 return PTR_ERR(pd->select);
461
462 pd->prepare = select_assert;
463 pd->finish = select_deassert;
464 gpiod_direction_output(pd->select, 0);
465
466 if (of_id->data) {
467 const struct eeprom_93xx46_devtype_data *data = of_id->data;
468
469 pd->quirks = data->quirks;
470 pd->flags |= data->flags;
471 }
472
473 spi->dev.platform_data = pd;
474
475 return 0;
476}
477
478static int eeprom_93xx46_probe(struct spi_device *spi)
479{
480 struct eeprom_93xx46_platform_data *pd;
481 struct eeprom_93xx46_dev *edev;
482 int err;
483
484 if (spi->dev.of_node) {
485 err = eeprom_93xx46_probe_dt(spi);
486 if (err < 0)
487 return err;
488 }
489
490 pd = spi->dev.platform_data;
491 if (!pd) {
492 dev_err(&spi->dev, "missing platform data\n");
493 return -ENODEV;
494 }
495
496 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
497 if (!edev)
498 return -ENOMEM;
499
500 if (pd->flags & EE_SIZE1K)
501 edev->size = 128;
502 else if (pd->flags & EE_SIZE2K)
503 edev->size = 256;
504 else if (pd->flags & EE_SIZE4K)
505 edev->size = 512;
506 else {
507 dev_err(&spi->dev, "unspecified size\n");
508 return -EINVAL;
509 }
510
511 if (pd->flags & EE_ADDR8)
512 edev->addrlen = ilog2(edev->size);
513 else if (pd->flags & EE_ADDR16)
514 edev->addrlen = ilog2(edev->size) - 1;
515 else {
516 dev_err(&spi->dev, "unspecified address type\n");
517 return -EINVAL;
518 }
519
520 mutex_init(&edev->lock);
521
522 edev->spi = spi;
523 edev->pdata = pd;
524
525 edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
526 edev->nvmem_config.name = dev_name(&spi->dev);
527 edev->nvmem_config.dev = &spi->dev;
528 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
529 edev->nvmem_config.root_only = true;
530 edev->nvmem_config.owner = THIS_MODULE;
531 edev->nvmem_config.compat = true;
532 edev->nvmem_config.base_dev = &spi->dev;
533 edev->nvmem_config.reg_read = eeprom_93xx46_read;
534 edev->nvmem_config.reg_write = eeprom_93xx46_write;
535 edev->nvmem_config.priv = edev;
536 edev->nvmem_config.stride = 4;
537 edev->nvmem_config.word_size = 1;
538 edev->nvmem_config.size = edev->size;
539
540 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
541 if (IS_ERR(edev->nvmem))
542 return PTR_ERR(edev->nvmem);
543
544 dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n",
545 (pd->flags & EE_ADDR8) ? 8 : 16,
546 edev->size,
547 (pd->flags & EE_READONLY) ? "(readonly)" : "");
548
549 if (!(pd->flags & EE_READONLY)) {
550 if (device_create_file(&spi->dev, &dev_attr_erase))
551 dev_err(&spi->dev, "can't create erase interface\n");
552 }
553
554 spi_set_drvdata(spi, edev);
555 return 0;
556}
557
558static void eeprom_93xx46_remove(struct spi_device *spi)
559{
560 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
561
562 if (!(edev->pdata->flags & EE_READONLY))
563 device_remove_file(&spi->dev, &dev_attr_erase);
564}
565
566static struct spi_driver eeprom_93xx46_driver = {
567 .driver = {
568 .name = "93xx46",
569 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
570 },
571 .probe = eeprom_93xx46_probe,
572 .remove = eeprom_93xx46_remove,
573 .id_table = eeprom_93xx46_spi_ids,
574};
575
576module_spi_driver(eeprom_93xx46_driver);
577
578MODULE_LICENSE("GPL");
579MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
580MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
581MODULE_ALIAS("spi:93xx46");
582MODULE_ALIAS("spi:eeprom-93xx46");
583MODULE_ALIAS("spi:93lc46b");
1/*
2 * Driver for 93xx46 EEPROMs
3 *
4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/device.h>
13#include <linux/gpio/consumer.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/of_gpio.h>
20#include <linux/slab.h>
21#include <linux/spi/spi.h>
22#include <linux/nvmem-provider.h>
23#include <linux/regmap.h>
24#include <linux/eeprom_93xx46.h>
25
26#define OP_START 0x4
27#define OP_WRITE (OP_START | 0x1)
28#define OP_READ (OP_START | 0x2)
29#define ADDR_EWDS 0x00
30#define ADDR_ERAL 0x20
31#define ADDR_EWEN 0x30
32
33struct eeprom_93xx46_devtype_data {
34 unsigned int quirks;
35};
36
37static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
38 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
39 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
40};
41
42struct eeprom_93xx46_dev {
43 struct spi_device *spi;
44 struct eeprom_93xx46_platform_data *pdata;
45 struct mutex lock;
46 struct regmap_config regmap_config;
47 struct nvmem_config nvmem_config;
48 struct nvmem_device *nvmem;
49 int addrlen;
50 int size;
51};
52
53static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
54{
55 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
56}
57
58static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
59{
60 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
61}
62
63static ssize_t
64eeprom_93xx46_read(struct eeprom_93xx46_dev *edev, char *buf,
65 unsigned off, size_t count)
66{
67 ssize_t ret = 0;
68
69 if (unlikely(off >= edev->size))
70 return 0;
71 if ((off + count) > edev->size)
72 count = edev->size - off;
73 if (unlikely(!count))
74 return count;
75
76 mutex_lock(&edev->lock);
77
78 if (edev->pdata->prepare)
79 edev->pdata->prepare(edev);
80
81 while (count) {
82 struct spi_message m;
83 struct spi_transfer t[2] = { { 0 } };
84 u16 cmd_addr = OP_READ << edev->addrlen;
85 size_t nbytes = count;
86 int bits;
87 int err;
88
89 if (edev->addrlen == 7) {
90 cmd_addr |= off & 0x7f;
91 bits = 10;
92 if (has_quirk_single_word_read(edev))
93 nbytes = 1;
94 } else {
95 cmd_addr |= (off >> 1) & 0x3f;
96 bits = 9;
97 if (has_quirk_single_word_read(edev))
98 nbytes = 2;
99 }
100
101 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
102 cmd_addr, edev->spi->max_speed_hz);
103
104 spi_message_init(&m);
105
106 t[0].tx_buf = (char *)&cmd_addr;
107 t[0].len = 2;
108 t[0].bits_per_word = bits;
109 spi_message_add_tail(&t[0], &m);
110
111 t[1].rx_buf = buf;
112 t[1].len = count;
113 t[1].bits_per_word = 8;
114 spi_message_add_tail(&t[1], &m);
115
116 err = spi_sync(edev->spi, &m);
117 /* have to wait at least Tcsl ns */
118 ndelay(250);
119
120 if (err) {
121 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
122 nbytes, (int)off, err);
123 ret = err;
124 break;
125 }
126
127 buf += nbytes;
128 off += nbytes;
129 count -= nbytes;
130 ret += nbytes;
131 }
132
133 if (edev->pdata->finish)
134 edev->pdata->finish(edev);
135
136 mutex_unlock(&edev->lock);
137 return ret;
138}
139
140static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
141{
142 struct spi_message m;
143 struct spi_transfer t;
144 int bits, ret;
145 u16 cmd_addr;
146
147 cmd_addr = OP_START << edev->addrlen;
148 if (edev->addrlen == 7) {
149 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
150 bits = 10;
151 } else {
152 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
153 bits = 9;
154 }
155
156 if (has_quirk_instruction_length(edev)) {
157 cmd_addr <<= 2;
158 bits += 2;
159 }
160
161 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
162 is_on ? "en" : "ds", cmd_addr, bits);
163
164 spi_message_init(&m);
165 memset(&t, 0, sizeof(t));
166
167 t.tx_buf = &cmd_addr;
168 t.len = 2;
169 t.bits_per_word = bits;
170 spi_message_add_tail(&t, &m);
171
172 mutex_lock(&edev->lock);
173
174 if (edev->pdata->prepare)
175 edev->pdata->prepare(edev);
176
177 ret = spi_sync(edev->spi, &m);
178 /* have to wait at least Tcsl ns */
179 ndelay(250);
180 if (ret)
181 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
182 is_on ? "en" : "dis", ret);
183
184 if (edev->pdata->finish)
185 edev->pdata->finish(edev);
186
187 mutex_unlock(&edev->lock);
188 return ret;
189}
190
191static ssize_t
192eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
193 const char *buf, unsigned off)
194{
195 struct spi_message m;
196 struct spi_transfer t[2];
197 int bits, data_len, ret;
198 u16 cmd_addr;
199
200 cmd_addr = OP_WRITE << edev->addrlen;
201
202 if (edev->addrlen == 7) {
203 cmd_addr |= off & 0x7f;
204 bits = 10;
205 data_len = 1;
206 } else {
207 cmd_addr |= (off >> 1) & 0x3f;
208 bits = 9;
209 data_len = 2;
210 }
211
212 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
213
214 spi_message_init(&m);
215 memset(t, 0, sizeof(t));
216
217 t[0].tx_buf = (char *)&cmd_addr;
218 t[0].len = 2;
219 t[0].bits_per_word = bits;
220 spi_message_add_tail(&t[0], &m);
221
222 t[1].tx_buf = buf;
223 t[1].len = data_len;
224 t[1].bits_per_word = 8;
225 spi_message_add_tail(&t[1], &m);
226
227 ret = spi_sync(edev->spi, &m);
228 /* have to wait program cycle time Twc ms */
229 mdelay(6);
230 return ret;
231}
232
233static ssize_t
234eeprom_93xx46_write(struct eeprom_93xx46_dev *edev, const char *buf,
235 loff_t off, size_t count)
236{
237 int i, ret, step = 1;
238
239 if (unlikely(off >= edev->size))
240 return -EFBIG;
241 if ((off + count) > edev->size)
242 count = edev->size - off;
243 if (unlikely(!count))
244 return count;
245
246 /* only write even number of bytes on 16-bit devices */
247 if (edev->addrlen == 6) {
248 step = 2;
249 count &= ~1;
250 }
251
252 /* erase/write enable */
253 ret = eeprom_93xx46_ew(edev, 1);
254 if (ret)
255 return ret;
256
257 mutex_lock(&edev->lock);
258
259 if (edev->pdata->prepare)
260 edev->pdata->prepare(edev);
261
262 for (i = 0; i < count; i += step) {
263 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
264 if (ret) {
265 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
266 (int)off + i, ret);
267 break;
268 }
269 }
270
271 if (edev->pdata->finish)
272 edev->pdata->finish(edev);
273
274 mutex_unlock(&edev->lock);
275
276 /* erase/write disable */
277 eeprom_93xx46_ew(edev, 0);
278 return ret ? : count;
279}
280
281/*
282 * Provide a regmap interface, which is registered with the NVMEM
283 * framework
284*/
285static int eeprom_93xx46_regmap_read(void *context, const void *reg,
286 size_t reg_size, void *val,
287 size_t val_size)
288{
289 struct eeprom_93xx46_dev *eeprom_93xx46 = context;
290 off_t offset = *(u32 *)reg;
291 int err;
292
293 err = eeprom_93xx46_read(eeprom_93xx46, val, offset, val_size);
294 if (err)
295 return err;
296 return 0;
297}
298
299static int eeprom_93xx46_regmap_write(void *context, const void *data,
300 size_t count)
301{
302 struct eeprom_93xx46_dev *eeprom_93xx46 = context;
303 const char *buf;
304 u32 offset;
305 size_t len;
306 int err;
307
308 memcpy(&offset, data, sizeof(offset));
309 buf = (const char *)data + sizeof(offset);
310 len = count - sizeof(offset);
311
312 err = eeprom_93xx46_write(eeprom_93xx46, buf, offset, len);
313 if (err)
314 return err;
315 return 0;
316}
317
318static const struct regmap_bus eeprom_93xx46_regmap_bus = {
319 .read = eeprom_93xx46_regmap_read,
320 .write = eeprom_93xx46_regmap_write,
321 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
322};
323
324static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
325{
326 struct eeprom_93xx46_platform_data *pd = edev->pdata;
327 struct spi_message m;
328 struct spi_transfer t;
329 int bits, ret;
330 u16 cmd_addr;
331
332 cmd_addr = OP_START << edev->addrlen;
333 if (edev->addrlen == 7) {
334 cmd_addr |= ADDR_ERAL << 1;
335 bits = 10;
336 } else {
337 cmd_addr |= ADDR_ERAL;
338 bits = 9;
339 }
340
341 if (has_quirk_instruction_length(edev)) {
342 cmd_addr <<= 2;
343 bits += 2;
344 }
345
346 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
347
348 spi_message_init(&m);
349 memset(&t, 0, sizeof(t));
350
351 t.tx_buf = &cmd_addr;
352 t.len = 2;
353 t.bits_per_word = bits;
354 spi_message_add_tail(&t, &m);
355
356 mutex_lock(&edev->lock);
357
358 if (edev->pdata->prepare)
359 edev->pdata->prepare(edev);
360
361 ret = spi_sync(edev->spi, &m);
362 if (ret)
363 dev_err(&edev->spi->dev, "erase error %d\n", ret);
364 /* have to wait erase cycle time Tec ms */
365 mdelay(6);
366
367 if (pd->finish)
368 pd->finish(edev);
369
370 mutex_unlock(&edev->lock);
371 return ret;
372}
373
374static ssize_t eeprom_93xx46_store_erase(struct device *dev,
375 struct device_attribute *attr,
376 const char *buf, size_t count)
377{
378 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
379 int erase = 0, ret;
380
381 sscanf(buf, "%d", &erase);
382 if (erase) {
383 ret = eeprom_93xx46_ew(edev, 1);
384 if (ret)
385 return ret;
386 ret = eeprom_93xx46_eral(edev);
387 if (ret)
388 return ret;
389 ret = eeprom_93xx46_ew(edev, 0);
390 if (ret)
391 return ret;
392 }
393 return count;
394}
395static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
396
397static void select_assert(void *context)
398{
399 struct eeprom_93xx46_dev *edev = context;
400
401 gpiod_set_value_cansleep(edev->pdata->select, 1);
402}
403
404static void select_deassert(void *context)
405{
406 struct eeprom_93xx46_dev *edev = context;
407
408 gpiod_set_value_cansleep(edev->pdata->select, 0);
409}
410
411static const struct of_device_id eeprom_93xx46_of_table[] = {
412 { .compatible = "eeprom-93xx46", },
413 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
414 {}
415};
416MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
417
418static int eeprom_93xx46_probe_dt(struct spi_device *spi)
419{
420 const struct of_device_id *of_id =
421 of_match_device(eeprom_93xx46_of_table, &spi->dev);
422 struct device_node *np = spi->dev.of_node;
423 struct eeprom_93xx46_platform_data *pd;
424 u32 tmp;
425 int gpio;
426 enum of_gpio_flags of_flags;
427 int ret;
428
429 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
430 if (!pd)
431 return -ENOMEM;
432
433 ret = of_property_read_u32(np, "data-size", &tmp);
434 if (ret < 0) {
435 dev_err(&spi->dev, "data-size property not found\n");
436 return ret;
437 }
438
439 if (tmp == 8) {
440 pd->flags |= EE_ADDR8;
441 } else if (tmp == 16) {
442 pd->flags |= EE_ADDR16;
443 } else {
444 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
445 return -EINVAL;
446 }
447
448 if (of_property_read_bool(np, "read-only"))
449 pd->flags |= EE_READONLY;
450
451 gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
452 if (gpio_is_valid(gpio)) {
453 unsigned long flags =
454 of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;
455
456 ret = devm_gpio_request_one(&spi->dev, gpio, flags,
457 "eeprom_93xx46_select");
458 if (ret)
459 return ret;
460
461 pd->select = gpio_to_desc(gpio);
462 pd->prepare = select_assert;
463 pd->finish = select_deassert;
464
465 gpiod_direction_output(pd->select, 0);
466 }
467
468 if (of_id->data) {
469 const struct eeprom_93xx46_devtype_data *data = of_id->data;
470
471 pd->quirks = data->quirks;
472 }
473
474 spi->dev.platform_data = pd;
475
476 return 0;
477}
478
479static int eeprom_93xx46_probe(struct spi_device *spi)
480{
481 struct eeprom_93xx46_platform_data *pd;
482 struct eeprom_93xx46_dev *edev;
483 struct regmap *regmap;
484 int err;
485
486 if (spi->dev.of_node) {
487 err = eeprom_93xx46_probe_dt(spi);
488 if (err < 0)
489 return err;
490 }
491
492 pd = spi->dev.platform_data;
493 if (!pd) {
494 dev_err(&spi->dev, "missing platform data\n");
495 return -ENODEV;
496 }
497
498 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
499 if (!edev)
500 return -ENOMEM;
501
502 if (pd->flags & EE_ADDR8)
503 edev->addrlen = 7;
504 else if (pd->flags & EE_ADDR16)
505 edev->addrlen = 6;
506 else {
507 dev_err(&spi->dev, "unspecified address type\n");
508 err = -EINVAL;
509 goto fail;
510 }
511
512 mutex_init(&edev->lock);
513
514 edev->spi = spi_dev_get(spi);
515 edev->pdata = pd;
516
517 edev->size = 128;
518
519 edev->regmap_config.reg_bits = 32;
520 edev->regmap_config.val_bits = 8;
521 edev->regmap_config.reg_stride = 1;
522 edev->regmap_config.max_register = edev->size - 1;
523
524 regmap = devm_regmap_init(&spi->dev, &eeprom_93xx46_regmap_bus, edev,
525 &edev->regmap_config);
526 if (IS_ERR(regmap)) {
527 dev_err(&spi->dev, "regmap init failed\n");
528 err = PTR_ERR(regmap);
529 goto fail;
530 }
531
532 edev->nvmem_config.name = dev_name(&spi->dev);
533 edev->nvmem_config.dev = &spi->dev;
534 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
535 edev->nvmem_config.root_only = true;
536 edev->nvmem_config.owner = THIS_MODULE;
537 edev->nvmem_config.compat = true;
538 edev->nvmem_config.base_dev = &spi->dev;
539
540 edev->nvmem = nvmem_register(&edev->nvmem_config);
541 if (IS_ERR(edev->nvmem)) {
542 err = PTR_ERR(edev->nvmem);
543 goto fail;
544 }
545
546 dev_info(&spi->dev, "%d-bit eeprom %s\n",
547 (pd->flags & EE_ADDR8) ? 8 : 16,
548 (pd->flags & EE_READONLY) ? "(readonly)" : "");
549
550 if (!(pd->flags & EE_READONLY)) {
551 if (device_create_file(&spi->dev, &dev_attr_erase))
552 dev_err(&spi->dev, "can't create erase interface\n");
553 }
554
555 spi_set_drvdata(spi, edev);
556 return 0;
557fail:
558 kfree(edev);
559 return err;
560}
561
562static int eeprom_93xx46_remove(struct spi_device *spi)
563{
564 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
565
566 nvmem_unregister(edev->nvmem);
567
568 if (!(edev->pdata->flags & EE_READONLY))
569 device_remove_file(&spi->dev, &dev_attr_erase);
570
571 kfree(edev);
572 return 0;
573}
574
575static struct spi_driver eeprom_93xx46_driver = {
576 .driver = {
577 .name = "93xx46",
578 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
579 },
580 .probe = eeprom_93xx46_probe,
581 .remove = eeprom_93xx46_remove,
582};
583
584module_spi_driver(eeprom_93xx46_driver);
585
586MODULE_LICENSE("GPL");
587MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
588MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
589MODULE_ALIAS("spi:93xx46");