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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/property.h>
25#include <linux/regmap.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28
29/* Address pointer is 16 bit. */
30#define AT24_FLAG_ADDR16 BIT(7)
31/* sysfs-entry will be read-only. */
32#define AT24_FLAG_READONLY BIT(6)
33/* sysfs-entry will be world-readable. */
34#define AT24_FLAG_IRUGO BIT(5)
35/* Take always 8 addresses (24c00). */
36#define AT24_FLAG_TAKE8ADDR BIT(4)
37/* Factory-programmed serial number. */
38#define AT24_FLAG_SERIAL BIT(3)
39/* Factory-programmed mac address. */
40#define AT24_FLAG_MAC BIT(2)
41/* Does not auto-rollover reads to the next slave address. */
42#define AT24_FLAG_NO_RDROL BIT(1)
43
44/*
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
50 *
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
56 *
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
60 *
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
64 * a bootloader.
65 *
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
70 */
71
72struct at24_data {
73 /*
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
76 */
77 struct mutex lock;
78
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
82
83 u32 byte_len;
84 u16 page_size;
85 u8 flags;
86
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
90
91 /*
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
93 * them for us.
94 */
95 u8 bank_addr_shift;
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
97};
98
99/*
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
105 *
106 * This value is forced to be a power of two so that writes align on pages.
107 */
108static unsigned int at24_io_limit = 128;
109module_param_named(io_limit, at24_io_limit, uint, 0);
110MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
111
112/*
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
115 */
116static unsigned int at24_write_timeout = 25;
117module_param_named(write_timeout, at24_write_timeout, uint, 0);
118MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
119
120struct at24_chip_data {
121 u32 byte_len;
122 u8 flags;
123 u8 bank_addr_shift;
124 void (*read_post)(unsigned int off, char *buf, size_t count);
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
136 }
137
138#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
142 }
143
144static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
145{
146 int i;
147
148 if (capable(CAP_SYS_ADMIN))
149 return;
150
151 /*
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
156 */
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
160 buf[i] = 0;
161 }
162}
163
164/* needs 8 addresses as A0-A2 are ignored */
165AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166/* old variants can't be handled with this generic entry! */
167AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177/* spd is a 24c02 in memory DIMMs */
178AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
179 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
180/* 24c02_vaio is a 24c02 on some Sony laptops */
181AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
182 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
183 at24_read_post_vaio);
184AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
185AT24_CHIP_DATA(at24_data_24cs04, 16,
186 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
187/* 24rf08 quirk is handled at i2c-core */
188AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
189AT24_CHIP_DATA(at24_data_24cs08, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
192AT24_CHIP_DATA(at24_data_24cs16, 16,
193 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
194AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
195/* M24C32-D Additional Write lockable page (M24C32-D order codes) */
196AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
197AT24_CHIP_DATA(at24_data_24cs32, 16,
198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
199AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
200/* M24C64-D Additional Write lockable page (M24C64-D order codes) */
201AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
202AT24_CHIP_DATA(at24_data_24cs64, 16,
203 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
204AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
205AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
206AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
207AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
208AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
209AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
210/* identical to 24c08 ? */
211AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
212
213static const struct i2c_device_id at24_ids[] = {
214 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
215 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
216 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
217 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
218 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
219 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
220 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
221 { "spd", (kernel_ulong_t)&at24_data_spd },
222 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
223 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
224 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
225 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
226 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
227 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
228 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
229 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
230 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
231 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
232 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
233 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
234 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
235 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
236 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
237 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
238 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
239 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
240 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
241 { "at24", 0 },
242 { /* END OF LIST */ }
243};
244MODULE_DEVICE_TABLE(i2c, at24_ids);
245
246static const struct of_device_id __maybe_unused at24_of_match[] = {
247 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
248 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
249 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
250 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
251 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
252 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
253 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
254 { .compatible = "atmel,spd", .data = &at24_data_spd },
255 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
256 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
257 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
258 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
259 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
260 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
261 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
262 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
263 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
264 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
265 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
266 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
267 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
268 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
269 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
270 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
271 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
272 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
273 { /* END OF LIST */ },
274};
275MODULE_DEVICE_TABLE(of, at24_of_match);
276
277static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
278 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
279 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
280 { /* END OF LIST */ }
281};
282MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
283
284/*
285 * This routine supports chips which consume multiple I2C addresses. It
286 * computes the addressing information to be used for a given r/w request.
287 * Assumes that sanity checks for offset happened at sysfs-layer.
288 *
289 * Slave address and byte offset derive from the offset. Always
290 * set the byte address; on a multi-master board, another master
291 * may have changed the chip's "current" address pointer.
292 */
293static struct regmap *at24_translate_offset(struct at24_data *at24,
294 unsigned int *offset)
295{
296 unsigned int i;
297
298 if (at24->flags & AT24_FLAG_ADDR16) {
299 i = *offset >> 16;
300 *offset &= 0xffff;
301 } else {
302 i = *offset >> 8;
303 *offset &= 0xff;
304 }
305
306 return at24->client_regmaps[i];
307}
308
309static struct device *at24_base_client_dev(struct at24_data *at24)
310{
311 return regmap_get_device(at24->client_regmaps[0]);
312}
313
314static size_t at24_adjust_read_count(struct at24_data *at24,
315 unsigned int offset, size_t count)
316{
317 unsigned int bits;
318 size_t remainder;
319
320 /*
321 * In case of multi-address chips that don't rollover reads to
322 * the next slave address: truncate the count to the slave boundary,
323 * so that the read never straddles slaves.
324 */
325 if (at24->flags & AT24_FLAG_NO_RDROL) {
326 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
327 remainder = BIT(bits) - offset;
328 if (count > remainder)
329 count = remainder;
330 }
331
332 if (count > at24_io_limit)
333 count = at24_io_limit;
334
335 return count;
336}
337
338static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
339 unsigned int offset, size_t count)
340{
341 unsigned long timeout, read_time;
342 struct regmap *regmap;
343 int ret;
344
345 regmap = at24_translate_offset(at24, &offset);
346 count = at24_adjust_read_count(at24, offset, count);
347
348 /* adjust offset for mac and serial read ops */
349 offset += at24->offset_adj;
350
351 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
352 do {
353 /*
354 * The timestamp shall be taken before the actual operation
355 * to avoid a premature timeout in case of high CPU load.
356 */
357 read_time = jiffies;
358
359 ret = regmap_bulk_read(regmap, offset, buf, count);
360 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
361 count, offset, ret, jiffies);
362 if (!ret)
363 return count;
364
365 usleep_range(1000, 1500);
366 } while (time_before(read_time, timeout));
367
368 return -ETIMEDOUT;
369}
370
371/*
372 * Note that if the hardware write-protect pin is pulled high, the whole
373 * chip is normally write protected. But there are plenty of product
374 * variants here, including OTP fuses and partial chip protect.
375 *
376 * We only use page mode writes; the alternative is sloooow. These routines
377 * write at most one page.
378 */
379
380static size_t at24_adjust_write_count(struct at24_data *at24,
381 unsigned int offset, size_t count)
382{
383 unsigned int next_page;
384
385 /* write_max is at most a page */
386 if (count > at24->write_max)
387 count = at24->write_max;
388
389 /* Never roll over backwards, to the start of this page */
390 next_page = roundup(offset + 1, at24->page_size);
391 if (offset + count > next_page)
392 count = next_page - offset;
393
394 return count;
395}
396
397static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
398 unsigned int offset, size_t count)
399{
400 unsigned long timeout, write_time;
401 struct regmap *regmap;
402 int ret;
403
404 regmap = at24_translate_offset(at24, &offset);
405 count = at24_adjust_write_count(at24, offset, count);
406 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
407
408 do {
409 /*
410 * The timestamp shall be taken before the actual operation
411 * to avoid a premature timeout in case of high CPU load.
412 */
413 write_time = jiffies;
414
415 ret = regmap_bulk_write(regmap, offset, buf, count);
416 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
417 count, offset, ret, jiffies);
418 if (!ret)
419 return count;
420
421 usleep_range(1000, 1500);
422 } while (time_before(write_time, timeout));
423
424 return -ETIMEDOUT;
425}
426
427static int at24_read(void *priv, unsigned int off, void *val, size_t count)
428{
429 struct at24_data *at24;
430 struct device *dev;
431 char *buf = val;
432 int i, ret;
433
434 at24 = priv;
435 dev = at24_base_client_dev(at24);
436
437 if (unlikely(!count))
438 return count;
439
440 if (off + count > at24->byte_len)
441 return -EINVAL;
442
443 ret = pm_runtime_resume_and_get(dev);
444 if (ret)
445 return ret;
446 /*
447 * Read data from chip, protecting against concurrent updates
448 * from this host, but not from other I2C masters.
449 */
450 mutex_lock(&at24->lock);
451
452 for (i = 0; count; i += ret, count -= ret) {
453 ret = at24_regmap_read(at24, buf + i, off + i, count);
454 if (ret < 0) {
455 mutex_unlock(&at24->lock);
456 pm_runtime_put(dev);
457 return ret;
458 }
459 }
460
461 mutex_unlock(&at24->lock);
462
463 pm_runtime_put(dev);
464
465 if (unlikely(at24->read_post))
466 at24->read_post(off, buf, i);
467
468 return 0;
469}
470
471static int at24_write(void *priv, unsigned int off, void *val, size_t count)
472{
473 struct at24_data *at24;
474 struct device *dev;
475 char *buf = val;
476 int ret;
477
478 at24 = priv;
479 dev = at24_base_client_dev(at24);
480
481 if (unlikely(!count))
482 return -EINVAL;
483
484 if (off + count > at24->byte_len)
485 return -EINVAL;
486
487 ret = pm_runtime_resume_and_get(dev);
488 if (ret)
489 return ret;
490 /*
491 * Write data to chip, protecting against concurrent updates
492 * from this host, but not from other I2C masters.
493 */
494 mutex_lock(&at24->lock);
495
496 while (count) {
497 ret = at24_regmap_write(at24, buf, off, count);
498 if (ret < 0) {
499 mutex_unlock(&at24->lock);
500 pm_runtime_put(dev);
501 return ret;
502 }
503 buf += ret;
504 off += ret;
505 count -= ret;
506 }
507
508 mutex_unlock(&at24->lock);
509
510 pm_runtime_put(dev);
511
512 return 0;
513}
514
515static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
516 struct i2c_client *base_client,
517 struct regmap_config *regmap_config)
518{
519 struct i2c_client *dummy_client;
520 struct regmap *regmap;
521
522 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
523 base_client->adapter,
524 base_client->addr +
525 (index << at24->bank_addr_shift));
526 if (IS_ERR(dummy_client))
527 return PTR_ERR(dummy_client);
528
529 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
530 if (IS_ERR(regmap))
531 return PTR_ERR(regmap);
532
533 at24->client_regmaps[index] = regmap;
534
535 return 0;
536}
537
538static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
539{
540 if (flags & AT24_FLAG_MAC) {
541 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
542 return 0xa0 - byte_len;
543 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
544 /*
545 * For 16 bit address pointers, the word address must contain
546 * a '10' sequence in bits 11 and 10 regardless of the
547 * intended position of the address pointer.
548 */
549 return 0x0800;
550 } else if (flags & AT24_FLAG_SERIAL) {
551 /*
552 * Otherwise the word address must begin with a '10' sequence,
553 * regardless of the intended address.
554 */
555 return 0x0080;
556 } else {
557 return 0;
558 }
559}
560
561static void at24_probe_temp_sensor(struct i2c_client *client)
562{
563 struct at24_data *at24 = i2c_get_clientdata(client);
564 struct i2c_board_info info = { .type = "jc42" };
565 int ret;
566 u8 val;
567
568 /*
569 * Byte 2 has value 11 for DDR3, earlier versions don't
570 * support the thermal sensor present flag
571 */
572 ret = at24_read(at24, 2, &val, 1);
573 if (ret || val != 11)
574 return;
575
576 /* Byte 32, bit 7 is set if temp sensor is present */
577 ret = at24_read(at24, 32, &val, 1);
578 if (ret || !(val & BIT(7)))
579 return;
580
581 info.addr = 0x18 | (client->addr & 7);
582
583 i2c_new_client_device(client->adapter, &info);
584}
585
586static int at24_probe(struct i2c_client *client)
587{
588 struct regmap_config regmap_config = { };
589 struct nvmem_config nvmem_config = { };
590 u32 byte_len, page_size, flags, addrw;
591 const struct at24_chip_data *cdata;
592 struct device *dev = &client->dev;
593 bool i2c_fn_i2c, i2c_fn_block;
594 unsigned int i, num_addresses;
595 struct at24_data *at24;
596 bool full_power;
597 struct regmap *regmap;
598 bool writable;
599 u8 test_byte;
600 int err;
601
602 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
603 i2c_fn_block = i2c_check_functionality(client->adapter,
604 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
605
606 cdata = i2c_get_match_data(client);
607 if (!cdata)
608 return -ENODEV;
609
610 err = device_property_read_u32(dev, "pagesize", &page_size);
611 if (err)
612 /*
613 * This is slow, but we can't know all eeproms, so we better
614 * play safe. Specifying custom eeprom-types via device tree
615 * or properties is recommended anyhow.
616 */
617 page_size = 1;
618
619 flags = cdata->flags;
620 if (device_property_present(dev, "read-only"))
621 flags |= AT24_FLAG_READONLY;
622 if (device_property_present(dev, "no-read-rollover"))
623 flags |= AT24_FLAG_NO_RDROL;
624
625 err = device_property_read_u32(dev, "address-width", &addrw);
626 if (!err) {
627 switch (addrw) {
628 case 8:
629 if (flags & AT24_FLAG_ADDR16)
630 dev_warn(dev,
631 "Override address width to be 8, while default is 16\n");
632 flags &= ~AT24_FLAG_ADDR16;
633 break;
634 case 16:
635 flags |= AT24_FLAG_ADDR16;
636 break;
637 default:
638 dev_warn(dev, "Bad \"address-width\" property: %u\n",
639 addrw);
640 }
641 }
642
643 err = device_property_read_u32(dev, "size", &byte_len);
644 if (err)
645 byte_len = cdata->byte_len;
646
647 if (!i2c_fn_i2c && !i2c_fn_block)
648 page_size = 1;
649
650 if (!page_size) {
651 dev_err(dev, "page_size must not be 0!\n");
652 return -EINVAL;
653 }
654
655 if (!is_power_of_2(page_size))
656 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
657
658 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
659 if (err) {
660 if (flags & AT24_FLAG_TAKE8ADDR)
661 num_addresses = 8;
662 else
663 num_addresses = DIV_ROUND_UP(byte_len,
664 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
665 }
666
667 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
668 dev_err(dev,
669 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
670 return -EINVAL;
671 }
672
673 regmap_config.val_bits = 8;
674 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
675 regmap_config.disable_locking = true;
676
677 regmap = devm_regmap_init_i2c(client, ®map_config);
678 if (IS_ERR(regmap))
679 return PTR_ERR(regmap);
680
681 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
682 GFP_KERNEL);
683 if (!at24)
684 return -ENOMEM;
685
686 mutex_init(&at24->lock);
687 at24->byte_len = byte_len;
688 at24->page_size = page_size;
689 at24->flags = flags;
690 at24->read_post = cdata->read_post;
691 at24->bank_addr_shift = cdata->bank_addr_shift;
692 at24->num_addresses = num_addresses;
693 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
694 at24->client_regmaps[0] = regmap;
695
696 at24->vcc_reg = devm_regulator_get(dev, "vcc");
697 if (IS_ERR(at24->vcc_reg))
698 return PTR_ERR(at24->vcc_reg);
699
700 writable = !(flags & AT24_FLAG_READONLY);
701 if (writable) {
702 at24->write_max = min_t(unsigned int,
703 page_size, at24_io_limit);
704 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
705 at24->write_max = I2C_SMBUS_BLOCK_MAX;
706 }
707
708 /* use dummy devices for multiple-address chips */
709 for (i = 1; i < num_addresses; i++) {
710 err = at24_make_dummy_client(at24, i, client, ®map_config);
711 if (err)
712 return err;
713 }
714
715 /*
716 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
717 * label property is set as some platform can have multiple eeproms
718 * with same label and we can not register each of those with same
719 * label. Failing to register those eeproms trigger cascade failure
720 * on such platform.
721 */
722 nvmem_config.id = NVMEM_DEVID_AUTO;
723
724 if (device_property_present(dev, "label")) {
725 err = device_property_read_string(dev, "label",
726 &nvmem_config.name);
727 if (err)
728 return err;
729 } else {
730 nvmem_config.name = dev_name(dev);
731 }
732
733 nvmem_config.type = NVMEM_TYPE_EEPROM;
734 nvmem_config.dev = dev;
735 nvmem_config.read_only = !writable;
736 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
737 nvmem_config.owner = THIS_MODULE;
738 nvmem_config.compat = true;
739 nvmem_config.base_dev = dev;
740 nvmem_config.reg_read = at24_read;
741 nvmem_config.reg_write = at24_write;
742 nvmem_config.priv = at24;
743 nvmem_config.stride = 1;
744 nvmem_config.word_size = 1;
745 nvmem_config.size = byte_len;
746
747 i2c_set_clientdata(client, at24);
748
749 full_power = acpi_dev_state_d0(&client->dev);
750 if (full_power) {
751 err = regulator_enable(at24->vcc_reg);
752 if (err) {
753 dev_err(dev, "Failed to enable vcc regulator\n");
754 return err;
755 }
756
757 pm_runtime_set_active(dev);
758 }
759 pm_runtime_enable(dev);
760
761 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
762 if (IS_ERR(at24->nvmem)) {
763 pm_runtime_disable(dev);
764 if (!pm_runtime_status_suspended(dev))
765 regulator_disable(at24->vcc_reg);
766 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
767 "failed to register nvmem\n");
768 }
769
770 /*
771 * Perform a one-byte test read to verify that the chip is functional,
772 * unless powering on the device is to be avoided during probe (i.e.
773 * it's powered off right now).
774 */
775 if (full_power) {
776 err = at24_read(at24, 0, &test_byte, 1);
777 if (err) {
778 pm_runtime_disable(dev);
779 if (!pm_runtime_status_suspended(dev))
780 regulator_disable(at24->vcc_reg);
781 return -ENODEV;
782 }
783 }
784
785 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
786 if (cdata == &at24_data_spd)
787 at24_probe_temp_sensor(client);
788
789 pm_runtime_idle(dev);
790
791 if (writable)
792 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
793 byte_len, client->name, at24->write_max);
794 else
795 dev_info(dev, "%u byte %s EEPROM, read-only\n",
796 byte_len, client->name);
797
798 return 0;
799}
800
801static void at24_remove(struct i2c_client *client)
802{
803 struct at24_data *at24 = i2c_get_clientdata(client);
804
805 pm_runtime_disable(&client->dev);
806 if (acpi_dev_state_d0(&client->dev)) {
807 if (!pm_runtime_status_suspended(&client->dev))
808 regulator_disable(at24->vcc_reg);
809 pm_runtime_set_suspended(&client->dev);
810 }
811}
812
813static int __maybe_unused at24_suspend(struct device *dev)
814{
815 struct i2c_client *client = to_i2c_client(dev);
816 struct at24_data *at24 = i2c_get_clientdata(client);
817
818 return regulator_disable(at24->vcc_reg);
819}
820
821static int __maybe_unused at24_resume(struct device *dev)
822{
823 struct i2c_client *client = to_i2c_client(dev);
824 struct at24_data *at24 = i2c_get_clientdata(client);
825
826 return regulator_enable(at24->vcc_reg);
827}
828
829static const struct dev_pm_ops at24_pm_ops = {
830 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
831 pm_runtime_force_resume)
832 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
833};
834
835static struct i2c_driver at24_driver = {
836 .driver = {
837 .name = "at24",
838 .pm = &at24_pm_ops,
839 .of_match_table = of_match_ptr(at24_of_match),
840 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
841 },
842 .probe = at24_probe,
843 .remove = at24_remove,
844 .id_table = at24_ids,
845 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
846};
847
848static int __init at24_init(void)
849{
850 if (!at24_io_limit) {
851 pr_err("at24: at24_io_limit must not be 0!\n");
852 return -EINVAL;
853 }
854
855 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
856 return i2c_add_driver(&at24_driver);
857}
858module_init(at24_init);
859
860static void __exit at24_exit(void)
861{
862 i2c_del_driver(&at24_driver);
863}
864module_exit(at24_exit);
865
866MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
867MODULE_AUTHOR("David Brownell and Wolfram Sang");
868MODULE_LICENSE("GPL");
1/*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/mutex.h>
18#include <linux/mod_devicetable.h>
19#include <linux/log2.h>
20#include <linux/bitops.h>
21#include <linux/jiffies.h>
22#include <linux/of.h>
23#include <linux/acpi.h>
24#include <linux/i2c.h>
25#include <linux/nvmem-provider.h>
26#include <linux/regmap.h>
27#include <linux/platform_data/at24.h>
28
29/*
30 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
31 * Differences between different vendor product lines (like Atmel AT24C or
32 * MicroChip 24LC, etc) won't much matter for typical read/write access.
33 * There are also I2C RAM chips, likewise interchangeable. One example
34 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
35 *
36 * However, misconfiguration can lose data. "Set 16-bit memory address"
37 * to a part with 8-bit addressing will overwrite data. Writing with too
38 * big a page size also loses data. And it's not safe to assume that the
39 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
40 * uses 0x51, for just one example.
41 *
42 * Accordingly, explicit board-specific configuration data should be used
43 * in almost all cases. (One partial exception is an SMBus used to access
44 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
45 *
46 * So this driver uses "new style" I2C driver binding, expecting to be
47 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
48 * similar kernel-resident tables; or, configuration data coming from
49 * a bootloader.
50 *
51 * Other than binding model, current differences from "eeprom" driver are
52 * that this one handles write access and isn't restricted to 24c02 devices.
53 * It also handles larger devices (32 kbit and up) with two-byte addresses,
54 * which won't work on pure SMBus systems.
55 */
56
57struct at24_data {
58 struct at24_platform_data chip;
59 int use_smbus;
60 int use_smbus_write;
61
62 /*
63 * Lock protects against activities from other Linux tasks,
64 * but not from changes by other I2C masters.
65 */
66 struct mutex lock;
67
68 u8 *writebuf;
69 unsigned write_max;
70 unsigned num_addresses;
71
72 struct regmap_config regmap_config;
73 struct nvmem_config nvmem_config;
74 struct nvmem_device *nvmem;
75
76 /*
77 * Some chips tie up multiple I2C addresses; dummy devices reserve
78 * them for us, and we'll use them with SMBus calls.
79 */
80 struct i2c_client *client[];
81};
82
83/*
84 * This parameter is to help this driver avoid blocking other drivers out
85 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
86 * clock, one 256 byte read takes about 1/43 second which is excessive;
87 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
88 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
89 *
90 * This value is forced to be a power of two so that writes align on pages.
91 */
92static unsigned io_limit = 128;
93module_param(io_limit, uint, 0);
94MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
95
96/*
97 * Specs often allow 5 msec for a page write, sometimes 20 msec;
98 * it's important to recover from write timeouts.
99 */
100static unsigned write_timeout = 25;
101module_param(write_timeout, uint, 0);
102MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
103
104#define AT24_SIZE_BYTELEN 5
105#define AT24_SIZE_FLAGS 8
106
107#define AT24_BITMASK(x) (BIT(x) - 1)
108
109/* create non-zero magic value for given eeprom parameters */
110#define AT24_DEVICE_MAGIC(_len, _flags) \
111 ((1 << AT24_SIZE_FLAGS | (_flags)) \
112 << AT24_SIZE_BYTELEN | ilog2(_len))
113
114static const struct i2c_device_id at24_ids[] = {
115 /* needs 8 addresses as A0-A2 are ignored */
116 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
117 /* old variants can't be handled with this generic entry! */
118 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
119 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
120 /* spd is a 24c02 in memory DIMMs */
121 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
122 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
123 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
124 /* 24rf08 quirk is handled at i2c-core */
125 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
126 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
127 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
128 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
129 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
130 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
131 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
132 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
133 { "at24", 0 },
134 { /* END OF LIST */ }
135};
136MODULE_DEVICE_TABLE(i2c, at24_ids);
137
138static const struct acpi_device_id at24_acpi_ids[] = {
139 { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
140 { }
141};
142MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
143
144/*-------------------------------------------------------------------------*/
145
146/*
147 * This routine supports chips which consume multiple I2C addresses. It
148 * computes the addressing information to be used for a given r/w request.
149 * Assumes that sanity checks for offset happened at sysfs-layer.
150 */
151static struct i2c_client *at24_translate_offset(struct at24_data *at24,
152 unsigned *offset)
153{
154 unsigned i;
155
156 if (at24->chip.flags & AT24_FLAG_ADDR16) {
157 i = *offset >> 16;
158 *offset &= 0xffff;
159 } else {
160 i = *offset >> 8;
161 *offset &= 0xff;
162 }
163
164 return at24->client[i];
165}
166
167static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
168 unsigned offset, size_t count)
169{
170 struct i2c_msg msg[2];
171 u8 msgbuf[2];
172 struct i2c_client *client;
173 unsigned long timeout, read_time;
174 int status, i;
175
176 memset(msg, 0, sizeof(msg));
177
178 /*
179 * REVISIT some multi-address chips don't rollover page reads to
180 * the next slave address, so we may need to truncate the count.
181 * Those chips might need another quirk flag.
182 *
183 * If the real hardware used four adjacent 24c02 chips and that
184 * were misconfigured as one 24c08, that would be a similar effect:
185 * one "eeprom" file not four, but larger reads would fail when
186 * they crossed certain pages.
187 */
188
189 /*
190 * Slave address and byte offset derive from the offset. Always
191 * set the byte address; on a multi-master board, another master
192 * may have changed the chip's "current" address pointer.
193 */
194 client = at24_translate_offset(at24, &offset);
195
196 if (count > io_limit)
197 count = io_limit;
198
199 if (at24->use_smbus) {
200 /* Smaller eeproms can work given some SMBus extension calls */
201 if (count > I2C_SMBUS_BLOCK_MAX)
202 count = I2C_SMBUS_BLOCK_MAX;
203 } else {
204 /*
205 * When we have a better choice than SMBus calls, use a
206 * combined I2C message. Write address; then read up to
207 * io_limit data bytes. Note that read page rollover helps us
208 * here (unlike writes). msgbuf is u8 and will cast to our
209 * needs.
210 */
211 i = 0;
212 if (at24->chip.flags & AT24_FLAG_ADDR16)
213 msgbuf[i++] = offset >> 8;
214 msgbuf[i++] = offset;
215
216 msg[0].addr = client->addr;
217 msg[0].buf = msgbuf;
218 msg[0].len = i;
219
220 msg[1].addr = client->addr;
221 msg[1].flags = I2C_M_RD;
222 msg[1].buf = buf;
223 msg[1].len = count;
224 }
225
226 /*
227 * Reads fail if the previous write didn't complete yet. We may
228 * loop a few times until this one succeeds, waiting at least
229 * long enough for one entire page write to work.
230 */
231 timeout = jiffies + msecs_to_jiffies(write_timeout);
232 do {
233 read_time = jiffies;
234 if (at24->use_smbus) {
235 status = i2c_smbus_read_i2c_block_data_or_emulated(client, offset,
236 count, buf);
237 } else {
238 status = i2c_transfer(client->adapter, msg, 2);
239 if (status == 2)
240 status = count;
241 }
242 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
243 count, offset, status, jiffies);
244
245 if (status == count)
246 return count;
247
248 /* REVISIT: at HZ=100, this is sloooow */
249 msleep(1);
250 } while (time_before(read_time, timeout));
251
252 return -ETIMEDOUT;
253}
254
255static ssize_t at24_read(struct at24_data *at24,
256 char *buf, loff_t off, size_t count)
257{
258 ssize_t retval = 0;
259
260 if (unlikely(!count))
261 return count;
262
263 /*
264 * Read data from chip, protecting against concurrent updates
265 * from this host, but not from other I2C masters.
266 */
267 mutex_lock(&at24->lock);
268
269 while (count) {
270 ssize_t status;
271
272 status = at24_eeprom_read(at24, buf, off, count);
273 if (status <= 0) {
274 if (retval == 0)
275 retval = status;
276 break;
277 }
278 buf += status;
279 off += status;
280 count -= status;
281 retval += status;
282 }
283
284 mutex_unlock(&at24->lock);
285
286 return retval;
287}
288
289/*
290 * Note that if the hardware write-protect pin is pulled high, the whole
291 * chip is normally write protected. But there are plenty of product
292 * variants here, including OTP fuses and partial chip protect.
293 *
294 * We only use page mode writes; the alternative is sloooow. This routine
295 * writes at most one page.
296 */
297static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
298 unsigned offset, size_t count)
299{
300 struct i2c_client *client;
301 struct i2c_msg msg;
302 ssize_t status = 0;
303 unsigned long timeout, write_time;
304 unsigned next_page;
305
306 /* Get corresponding I2C address and adjust offset */
307 client = at24_translate_offset(at24, &offset);
308
309 /* write_max is at most a page */
310 if (count > at24->write_max)
311 count = at24->write_max;
312
313 /* Never roll over backwards, to the start of this page */
314 next_page = roundup(offset + 1, at24->chip.page_size);
315 if (offset + count > next_page)
316 count = next_page - offset;
317
318 /* If we'll use I2C calls for I/O, set up the message */
319 if (!at24->use_smbus) {
320 int i = 0;
321
322 msg.addr = client->addr;
323 msg.flags = 0;
324
325 /* msg.buf is u8 and casts will mask the values */
326 msg.buf = at24->writebuf;
327 if (at24->chip.flags & AT24_FLAG_ADDR16)
328 msg.buf[i++] = offset >> 8;
329
330 msg.buf[i++] = offset;
331 memcpy(&msg.buf[i], buf, count);
332 msg.len = i + count;
333 }
334
335 /*
336 * Writes fail if the previous one didn't complete yet. We may
337 * loop a few times until this one succeeds, waiting at least
338 * long enough for one entire page write to work.
339 */
340 timeout = jiffies + msecs_to_jiffies(write_timeout);
341 do {
342 write_time = jiffies;
343 if (at24->use_smbus_write) {
344 switch (at24->use_smbus_write) {
345 case I2C_SMBUS_I2C_BLOCK_DATA:
346 status = i2c_smbus_write_i2c_block_data(client,
347 offset, count, buf);
348 break;
349 case I2C_SMBUS_BYTE_DATA:
350 status = i2c_smbus_write_byte_data(client,
351 offset, buf[0]);
352 break;
353 }
354
355 if (status == 0)
356 status = count;
357 } else {
358 status = i2c_transfer(client->adapter, &msg, 1);
359 if (status == 1)
360 status = count;
361 }
362 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
363 count, offset, status, jiffies);
364
365 if (status == count)
366 return count;
367
368 /* REVISIT: at HZ=100, this is sloooow */
369 msleep(1);
370 } while (time_before(write_time, timeout));
371
372 return -ETIMEDOUT;
373}
374
375static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
376 size_t count)
377{
378 ssize_t retval = 0;
379
380 if (unlikely(!count))
381 return count;
382
383 /*
384 * Write data to chip, protecting against concurrent updates
385 * from this host, but not from other I2C masters.
386 */
387 mutex_lock(&at24->lock);
388
389 while (count) {
390 ssize_t status;
391
392 status = at24_eeprom_write(at24, buf, off, count);
393 if (status <= 0) {
394 if (retval == 0)
395 retval = status;
396 break;
397 }
398 buf += status;
399 off += status;
400 count -= status;
401 retval += status;
402 }
403
404 mutex_unlock(&at24->lock);
405
406 return retval;
407}
408
409/*-------------------------------------------------------------------------*/
410
411/*
412 * Provide a regmap interface, which is registered with the NVMEM
413 * framework
414*/
415static int at24_regmap_read(void *context, const void *reg, size_t reg_size,
416 void *val, size_t val_size)
417{
418 struct at24_data *at24 = context;
419 off_t offset = *(u32 *)reg;
420 int err;
421
422 err = at24_read(at24, val, offset, val_size);
423 if (err)
424 return err;
425 return 0;
426}
427
428static int at24_regmap_write(void *context, const void *data, size_t count)
429{
430 struct at24_data *at24 = context;
431 const char *buf;
432 u32 offset;
433 size_t len;
434 int err;
435
436 memcpy(&offset, data, sizeof(offset));
437 buf = (const char *)data + sizeof(offset);
438 len = count - sizeof(offset);
439
440 err = at24_write(at24, buf, offset, len);
441 if (err)
442 return err;
443 return 0;
444}
445
446static const struct regmap_bus at24_regmap_bus = {
447 .read = at24_regmap_read,
448 .write = at24_regmap_write,
449 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
450};
451
452/*-------------------------------------------------------------------------*/
453
454#ifdef CONFIG_OF
455static void at24_get_ofdata(struct i2c_client *client,
456 struct at24_platform_data *chip)
457{
458 const __be32 *val;
459 struct device_node *node = client->dev.of_node;
460
461 if (node) {
462 if (of_get_property(node, "read-only", NULL))
463 chip->flags |= AT24_FLAG_READONLY;
464 val = of_get_property(node, "pagesize", NULL);
465 if (val)
466 chip->page_size = be32_to_cpup(val);
467 }
468}
469#else
470static void at24_get_ofdata(struct i2c_client *client,
471 struct at24_platform_data *chip)
472{ }
473#endif /* CONFIG_OF */
474
475static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
476{
477 struct at24_platform_data chip;
478 kernel_ulong_t magic = 0;
479 bool writable;
480 int use_smbus = 0;
481 int use_smbus_write = 0;
482 struct at24_data *at24;
483 int err;
484 unsigned i, num_addresses;
485 struct regmap *regmap;
486
487 if (client->dev.platform_data) {
488 chip = *(struct at24_platform_data *)client->dev.platform_data;
489 } else {
490 if (id) {
491 magic = id->driver_data;
492 } else {
493 const struct acpi_device_id *aid;
494
495 aid = acpi_match_device(at24_acpi_ids, &client->dev);
496 if (aid)
497 magic = aid->driver_data;
498 }
499 if (!magic)
500 return -ENODEV;
501
502 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
503 magic >>= AT24_SIZE_BYTELEN;
504 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
505 /*
506 * This is slow, but we can't know all eeproms, so we better
507 * play safe. Specifying custom eeprom-types via platform_data
508 * is recommended anyhow.
509 */
510 chip.page_size = 1;
511
512 /* update chipdata if OF is present */
513 at24_get_ofdata(client, &chip);
514
515 chip.setup = NULL;
516 chip.context = NULL;
517 }
518
519 if (!is_power_of_2(chip.byte_len))
520 dev_warn(&client->dev,
521 "byte_len looks suspicious (no power of 2)!\n");
522 if (!chip.page_size) {
523 dev_err(&client->dev, "page_size must not be 0!\n");
524 return -EINVAL;
525 }
526 if (!is_power_of_2(chip.page_size))
527 dev_warn(&client->dev,
528 "page_size looks suspicious (no power of 2)!\n");
529
530 /* Use I2C operations unless we're stuck with SMBus extensions. */
531 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
532 if (chip.flags & AT24_FLAG_ADDR16)
533 return -EPFNOSUPPORT;
534
535 if (i2c_check_functionality(client->adapter,
536 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
537 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
538 } else if (i2c_check_functionality(client->adapter,
539 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
540 use_smbus = I2C_SMBUS_WORD_DATA;
541 } else if (i2c_check_functionality(client->adapter,
542 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
543 use_smbus = I2C_SMBUS_BYTE_DATA;
544 } else {
545 return -EPFNOSUPPORT;
546 }
547 }
548
549 /* Use I2C operations unless we're stuck with SMBus extensions. */
550 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
551 if (i2c_check_functionality(client->adapter,
552 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
553 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
554 } else if (i2c_check_functionality(client->adapter,
555 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
556 use_smbus_write = I2C_SMBUS_BYTE_DATA;
557 chip.page_size = 1;
558 }
559 }
560
561 if (chip.flags & AT24_FLAG_TAKE8ADDR)
562 num_addresses = 8;
563 else
564 num_addresses = DIV_ROUND_UP(chip.byte_len,
565 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
566
567 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
568 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
569 if (!at24)
570 return -ENOMEM;
571
572 mutex_init(&at24->lock);
573 at24->use_smbus = use_smbus;
574 at24->use_smbus_write = use_smbus_write;
575 at24->chip = chip;
576 at24->num_addresses = num_addresses;
577
578 writable = !(chip.flags & AT24_FLAG_READONLY);
579 if (writable) {
580 if (!use_smbus || use_smbus_write) {
581
582 unsigned write_max = chip.page_size;
583
584 if (write_max > io_limit)
585 write_max = io_limit;
586 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
587 write_max = I2C_SMBUS_BLOCK_MAX;
588 at24->write_max = write_max;
589
590 /* buffer (data + address at the beginning) */
591 at24->writebuf = devm_kzalloc(&client->dev,
592 write_max + 2, GFP_KERNEL);
593 if (!at24->writebuf)
594 return -ENOMEM;
595 } else {
596 dev_warn(&client->dev,
597 "cannot write due to controller restrictions.");
598 }
599 }
600
601 at24->client[0] = client;
602
603 /* use dummy devices for multiple-address chips */
604 for (i = 1; i < num_addresses; i++) {
605 at24->client[i] = i2c_new_dummy(client->adapter,
606 client->addr + i);
607 if (!at24->client[i]) {
608 dev_err(&client->dev, "address 0x%02x unavailable\n",
609 client->addr + i);
610 err = -EADDRINUSE;
611 goto err_clients;
612 }
613 }
614
615 at24->regmap_config.reg_bits = 32;
616 at24->regmap_config.val_bits = 8;
617 at24->regmap_config.reg_stride = 1;
618 at24->regmap_config.max_register = chip.byte_len - 1;
619
620 regmap = devm_regmap_init(&client->dev, &at24_regmap_bus, at24,
621 &at24->regmap_config);
622 if (IS_ERR(regmap)) {
623 dev_err(&client->dev, "regmap init failed\n");
624 err = PTR_ERR(regmap);
625 goto err_clients;
626 }
627
628 at24->nvmem_config.name = dev_name(&client->dev);
629 at24->nvmem_config.dev = &client->dev;
630 at24->nvmem_config.read_only = !writable;
631 at24->nvmem_config.root_only = true;
632 at24->nvmem_config.owner = THIS_MODULE;
633 at24->nvmem_config.compat = true;
634 at24->nvmem_config.base_dev = &client->dev;
635
636 at24->nvmem = nvmem_register(&at24->nvmem_config);
637
638 if (IS_ERR(at24->nvmem)) {
639 err = PTR_ERR(at24->nvmem);
640 goto err_clients;
641 }
642
643 i2c_set_clientdata(client, at24);
644
645 dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
646 chip.byte_len, client->name,
647 writable ? "writable" : "read-only", at24->write_max);
648 if (use_smbus == I2C_SMBUS_WORD_DATA ||
649 use_smbus == I2C_SMBUS_BYTE_DATA) {
650 dev_notice(&client->dev, "Falling back to %s reads, "
651 "performance will suffer\n", use_smbus ==
652 I2C_SMBUS_WORD_DATA ? "word" : "byte");
653 }
654
655 /* export data to kernel code */
656 if (chip.setup)
657 chip.setup(at24->nvmem, chip.context);
658
659 return 0;
660
661err_clients:
662 for (i = 1; i < num_addresses; i++)
663 if (at24->client[i])
664 i2c_unregister_device(at24->client[i]);
665
666 return err;
667}
668
669static int at24_remove(struct i2c_client *client)
670{
671 struct at24_data *at24;
672 int i;
673
674 at24 = i2c_get_clientdata(client);
675
676 nvmem_unregister(at24->nvmem);
677
678 for (i = 1; i < at24->num_addresses; i++)
679 i2c_unregister_device(at24->client[i]);
680
681 return 0;
682}
683
684/*-------------------------------------------------------------------------*/
685
686static struct i2c_driver at24_driver = {
687 .driver = {
688 .name = "at24",
689 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
690 },
691 .probe = at24_probe,
692 .remove = at24_remove,
693 .id_table = at24_ids,
694};
695
696static int __init at24_init(void)
697{
698 if (!io_limit) {
699 pr_err("at24: io_limit must not be 0!\n");
700 return -EINVAL;
701 }
702
703 io_limit = rounddown_pow_of_two(io_limit);
704 return i2c_add_driver(&at24_driver);
705}
706module_init(at24_init);
707
708static void __exit at24_exit(void)
709{
710 i2c_del_driver(&at24_driver);
711}
712module_exit(at24_exit);
713
714MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
715MODULE_AUTHOR("David Brownell and Wolfram Sang");
716MODULE_LICENSE("GPL");