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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * TI Touch Screen / ADC MFD driver
4 *
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <linux/module.h>
9#include <linux/slab.h>
10#include <linux/err.h>
11#include <linux/io.h>
12#include <linux/clk.h>
13#include <linux/regmap.h>
14#include <linux/mfd/core.h>
15#include <linux/pm_runtime.h>
16#include <linux/of.h>
17#include <linux/platform_device.h>
18#include <linux/sched.h>
19
20#include <linux/mfd/ti_am335x_tscadc.h>
21
22static const struct regmap_config tscadc_regmap_config = {
23 .name = "ti_tscadc",
24 .reg_bits = 32,
25 .reg_stride = 4,
26 .val_bits = 32,
27};
28
29void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
30{
31 unsigned long flags;
32
33 spin_lock_irqsave(&tscadc->reg_lock, flags);
34 tscadc->reg_se_cache |= val;
35 if (tscadc->adc_waiting)
36 wake_up(&tscadc->reg_se_wait);
37 else if (!tscadc->adc_in_use)
38 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
39
40 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
41}
42EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
43
44static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
45{
46 DEFINE_WAIT(wait);
47 u32 reg;
48
49 regmap_read(tscadc->regmap, REG_ADCFSM, ®);
50 if (reg & SEQ_STATUS) {
51 tscadc->adc_waiting = true;
52 prepare_to_wait(&tscadc->reg_se_wait, &wait,
53 TASK_UNINTERRUPTIBLE);
54 spin_unlock_irq(&tscadc->reg_lock);
55
56 schedule();
57
58 spin_lock_irq(&tscadc->reg_lock);
59 finish_wait(&tscadc->reg_se_wait, &wait);
60
61 /*
62 * Sequencer should either be idle or
63 * busy applying the charge step.
64 */
65 regmap_read(tscadc->regmap, REG_ADCFSM, ®);
66 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
67 tscadc->adc_waiting = false;
68 }
69 tscadc->adc_in_use = true;
70}
71
72void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
73{
74 spin_lock_irq(&tscadc->reg_lock);
75 am335x_tscadc_need_adc(tscadc);
76
77 regmap_write(tscadc->regmap, REG_SE, val);
78 spin_unlock_irq(&tscadc->reg_lock);
79}
80EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
81
82void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
83{
84 unsigned long flags;
85
86 spin_lock_irqsave(&tscadc->reg_lock, flags);
87 tscadc->adc_in_use = false;
88 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
89 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
90}
91EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
92
93void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
94{
95 unsigned long flags;
96
97 spin_lock_irqsave(&tscadc->reg_lock, flags);
98 tscadc->reg_se_cache &= ~val;
99 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
100 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
101}
102EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
103
104static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
105{
106 unsigned int idleconfig;
107
108 idleconfig = STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM;
109 if (ti_adc_with_touchscreen(tscadc))
110 idleconfig |= STEPCONFIG_YNN | STEPCONFIG_YPN;
111
112 regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
113}
114
115static int ti_tscadc_probe(struct platform_device *pdev)
116{
117 struct ti_tscadc_dev *tscadc;
118 struct resource *res;
119 struct clk *clk;
120 struct device_node *node;
121 struct mfd_cell *cell;
122 struct property *prop;
123 const __be32 *cur;
124 bool use_tsc = false, use_mag = false;
125 u32 val;
126 int err;
127 int tscmag_wires = 0, adc_channels = 0, cell_idx = 0, total_channels;
128 int readouts = 0, mag_tracks = 0;
129
130 /* Allocate memory for device */
131 tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
132 if (!tscadc)
133 return -ENOMEM;
134
135 tscadc->dev = &pdev->dev;
136
137 if (!pdev->dev.of_node) {
138 dev_err(&pdev->dev, "Could not find valid DT data.\n");
139 return -EINVAL;
140 }
141
142 tscadc->data = of_device_get_match_data(&pdev->dev);
143
144 if (ti_adc_with_touchscreen(tscadc)) {
145 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
146 of_property_read_u32(node, "ti,wires", &tscmag_wires);
147 err = of_property_read_u32(node, "ti,coordinate-readouts",
148 &readouts);
149 if (err < 0)
150 of_property_read_u32(node, "ti,coordiante-readouts",
151 &readouts);
152
153 of_node_put(node);
154
155 if (tscmag_wires)
156 use_tsc = true;
157 } else {
158 /*
159 * When adding support for the magnetic stripe reader, here is
160 * the place to look for the number of tracks used from device
161 * tree. Let's default to 0 for now.
162 */
163 mag_tracks = 0;
164 tscmag_wires = mag_tracks * 2;
165 if (tscmag_wires)
166 use_mag = true;
167 }
168
169 node = of_get_child_by_name(pdev->dev.of_node, "adc");
170 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
171 adc_channels++;
172 if (val > 7) {
173 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
174 val);
175 of_node_put(node);
176 return -EINVAL;
177 }
178 }
179
180 of_node_put(node);
181
182 total_channels = tscmag_wires + adc_channels;
183 if (total_channels > 8) {
184 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
185 return -EINVAL;
186 }
187
188 if (total_channels == 0) {
189 dev_err(&pdev->dev, "Need at least one channel.\n");
190 return -EINVAL;
191 }
192
193 if (use_tsc && (readouts * 2 + 2 + adc_channels > 16)) {
194 dev_err(&pdev->dev, "Too many step configurations requested\n");
195 return -EINVAL;
196 }
197
198 err = platform_get_irq(pdev, 0);
199 if (err < 0)
200 return err;
201 else
202 tscadc->irq = err;
203
204 tscadc->tscadc_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
205 if (IS_ERR(tscadc->tscadc_base))
206 return PTR_ERR(tscadc->tscadc_base);
207
208 tscadc->tscadc_phys_base = res->start;
209 tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
210 tscadc->tscadc_base,
211 &tscadc_regmap_config);
212 if (IS_ERR(tscadc->regmap)) {
213 dev_err(&pdev->dev, "regmap init failed\n");
214 return PTR_ERR(tscadc->regmap);
215 }
216
217 spin_lock_init(&tscadc->reg_lock);
218 init_waitqueue_head(&tscadc->reg_se_wait);
219
220 pm_runtime_enable(&pdev->dev);
221 pm_runtime_get_sync(&pdev->dev);
222
223 /*
224 * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK.
225 * ADCs produce a 12-bit sample every 15 ADC_CLK cycles.
226 * am33xx ADCs expect to capture 200ksps.
227 * am47xx ADCs expect to capture 867ksps.
228 * We need ADC clocks respectively running at 3MHz and 13MHz.
229 * These frequencies are valid since TSC_ADC_SS controller design
230 * assumes the OCP clock is at least 6x faster than the ADC clock.
231 */
232 clk = devm_clk_get(&pdev->dev, NULL);
233 if (IS_ERR(clk)) {
234 dev_err(&pdev->dev, "failed to get fck\n");
235 err = PTR_ERR(clk);
236 goto err_disable_clk;
237 }
238
239 tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;
240 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
241
242 /*
243 * Set the control register bits. tscadc->ctrl stores the configuration
244 * of the CTRL register but not the subsystem enable bit which must be
245 * added manually when timely.
246 */
247 tscadc->ctrl = CNTRLREG_STEPID;
248 if (ti_adc_with_touchscreen(tscadc)) {
249 tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT;
250 if (use_tsc) {
251 tscadc->ctrl |= CNTRLREG_TSC_ENB;
252 if (tscmag_wires == 5)
253 tscadc->ctrl |= CNTRLREG_TSC_5WIRE;
254 else
255 tscadc->ctrl |= CNTRLREG_TSC_4WIRE;
256 }
257 } else {
258 tscadc->ctrl |= CNTRLREG_MAG_PREAMP_PWRDOWN |
259 CNTRLREG_MAG_PREAMP_BYPASS;
260 }
261 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
262
263 tscadc_idle_config(tscadc);
264
265 /* Enable the TSC module enable bit */
266 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
267
268 /* TSC or MAG Cell */
269 if (use_tsc || use_mag) {
270 cell = &tscadc->cells[cell_idx++];
271 cell->name = tscadc->data->secondary_feature_name;
272 cell->of_compatible = tscadc->data->secondary_feature_compatible;
273 cell->platform_data = &tscadc;
274 cell->pdata_size = sizeof(tscadc);
275 }
276
277 /* ADC Cell */
278 if (adc_channels > 0) {
279 cell = &tscadc->cells[cell_idx++];
280 cell->name = tscadc->data->adc_feature_name;
281 cell->of_compatible = tscadc->data->adc_feature_compatible;
282 cell->platform_data = &tscadc;
283 cell->pdata_size = sizeof(tscadc);
284 }
285
286 err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
287 tscadc->cells, cell_idx, NULL, 0, NULL);
288 if (err < 0)
289 goto err_disable_clk;
290
291 platform_set_drvdata(pdev, tscadc);
292 return 0;
293
294err_disable_clk:
295 pm_runtime_put_sync(&pdev->dev);
296 pm_runtime_disable(&pdev->dev);
297
298 return err;
299}
300
301static void ti_tscadc_remove(struct platform_device *pdev)
302{
303 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
304
305 regmap_write(tscadc->regmap, REG_SE, 0x00);
306
307 pm_runtime_put_sync(&pdev->dev);
308 pm_runtime_disable(&pdev->dev);
309
310 mfd_remove_devices(tscadc->dev);
311}
312
313static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
314{
315 return device_may_wakeup(dev);
316}
317
318static int __maybe_unused tscadc_suspend(struct device *dev)
319{
320 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
321
322 regmap_write(tscadc->regmap, REG_SE, 0x00);
323 if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
324 u32 ctrl;
325
326 regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
327 ctrl &= ~(CNTRLREG_POWERDOWN);
328 ctrl |= CNTRLREG_SSENB;
329 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
330 }
331 pm_runtime_put_sync(dev);
332
333 return 0;
334}
335
336static int __maybe_unused tscadc_resume(struct device *dev)
337{
338 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
339
340 pm_runtime_get_sync(dev);
341
342 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
343 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
344 tscadc_idle_config(tscadc);
345 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
346
347 return 0;
348}
349
350static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
351
352static const struct ti_tscadc_data tscdata = {
353 .adc_feature_name = "TI-am335x-adc",
354 .adc_feature_compatible = "ti,am3359-adc",
355 .secondary_feature_name = "TI-am335x-tsc",
356 .secondary_feature_compatible = "ti,am3359-tsc",
357 .target_clk_rate = TSC_ADC_CLK,
358};
359
360static const struct ti_tscadc_data magdata = {
361 .adc_feature_name = "TI-am43xx-adc",
362 .adc_feature_compatible = "ti,am4372-adc",
363 .secondary_feature_name = "TI-am43xx-mag",
364 .secondary_feature_compatible = "ti,am4372-mag",
365 .target_clk_rate = MAG_ADC_CLK,
366};
367
368static const struct of_device_id ti_tscadc_dt_ids[] = {
369 { .compatible = "ti,am3359-tscadc", .data = &tscdata },
370 { .compatible = "ti,am4372-magadc", .data = &magdata },
371 { }
372};
373MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
374
375static struct platform_driver ti_tscadc_driver = {
376 .driver = {
377 .name = "ti_am3359-tscadc",
378 .pm = &tscadc_pm_ops,
379 .of_match_table = ti_tscadc_dt_ids,
380 },
381 .probe = ti_tscadc_probe,
382 .remove_new = ti_tscadc_remove,
383
384};
385
386module_platform_driver(ti_tscadc_driver);
387
388MODULE_DESCRIPTION("TI touchscreen/magnetic stripe reader/ADC MFD controller driver");
389MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
390MODULE_LICENSE("GPL");
1/*
2 * TI Touch Screen / ADC MFD driver
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
17#include <linux/slab.h>
18#include <linux/err.h>
19#include <linux/io.h>
20#include <linux/clk.h>
21#include <linux/regmap.h>
22#include <linux/mfd/core.h>
23#include <linux/pm_runtime.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/sched.h>
27
28#include <linux/mfd/ti_am335x_tscadc.h>
29
30static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
31{
32 unsigned int val;
33
34 regmap_read(tsadc->regmap_tscadc, reg, &val);
35 return val;
36}
37
38static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
39 unsigned int val)
40{
41 regmap_write(tsadc->regmap_tscadc, reg, val);
42}
43
44static const struct regmap_config tscadc_regmap_config = {
45 .name = "ti_tscadc",
46 .reg_bits = 32,
47 .reg_stride = 4,
48 .val_bits = 32,
49};
50
51void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val)
52{
53 unsigned long flags;
54
55 spin_lock_irqsave(&tsadc->reg_lock, flags);
56 tsadc->reg_se_cache |= val;
57 if (tsadc->adc_waiting)
58 wake_up(&tsadc->reg_se_wait);
59 else if (!tsadc->adc_in_use)
60 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
61
62 spin_unlock_irqrestore(&tsadc->reg_lock, flags);
63}
64EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
65
66static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc)
67{
68 DEFINE_WAIT(wait);
69 u32 reg;
70
71 reg = tscadc_readl(tsadc, REG_ADCFSM);
72 if (reg & SEQ_STATUS) {
73 tsadc->adc_waiting = true;
74 prepare_to_wait(&tsadc->reg_se_wait, &wait,
75 TASK_UNINTERRUPTIBLE);
76 spin_unlock_irq(&tsadc->reg_lock);
77
78 schedule();
79
80 spin_lock_irq(&tsadc->reg_lock);
81 finish_wait(&tsadc->reg_se_wait, &wait);
82
83 /*
84 * Sequencer should either be idle or
85 * busy applying the charge step.
86 */
87 reg = tscadc_readl(tsadc, REG_ADCFSM);
88 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
89 tsadc->adc_waiting = false;
90 }
91 tsadc->adc_in_use = true;
92}
93
94void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val)
95{
96 spin_lock_irq(&tsadc->reg_lock);
97 am335x_tscadc_need_adc(tsadc);
98
99 tscadc_writel(tsadc, REG_SE, val);
100 spin_unlock_irq(&tsadc->reg_lock);
101}
102EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
103
104void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc)
105{
106 unsigned long flags;
107
108 spin_lock_irqsave(&tsadc->reg_lock, flags);
109 tsadc->adc_in_use = false;
110 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
111 spin_unlock_irqrestore(&tsadc->reg_lock, flags);
112}
113EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
114
115void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
116{
117 unsigned long flags;
118
119 spin_lock_irqsave(&tsadc->reg_lock, flags);
120 tsadc->reg_se_cache &= ~val;
121 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
122 spin_unlock_irqrestore(&tsadc->reg_lock, flags);
123}
124EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
125
126static void tscadc_idle_config(struct ti_tscadc_dev *config)
127{
128 unsigned int idleconfig;
129
130 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
131 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
132
133 tscadc_writel(config, REG_IDLECONFIG, idleconfig);
134}
135
136static int ti_tscadc_probe(struct platform_device *pdev)
137{
138 struct ti_tscadc_dev *tscadc;
139 struct resource *res;
140 struct clk *clk;
141 struct device_node *node = pdev->dev.of_node;
142 struct mfd_cell *cell;
143 struct property *prop;
144 const __be32 *cur;
145 u32 val;
146 int err, ctrl;
147 int clock_rate;
148 int tsc_wires = 0, adc_channels = 0, total_channels;
149 int readouts = 0;
150
151 if (!pdev->dev.of_node) {
152 dev_err(&pdev->dev, "Could not find valid DT data.\n");
153 return -EINVAL;
154 }
155
156 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
157 of_property_read_u32(node, "ti,wires", &tsc_wires);
158 of_property_read_u32(node, "ti,coordiante-readouts", &readouts);
159
160 node = of_get_child_by_name(pdev->dev.of_node, "adc");
161 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
162 adc_channels++;
163 if (val > 7) {
164 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
165 val);
166 return -EINVAL;
167 }
168 }
169 total_channels = tsc_wires + adc_channels;
170 if (total_channels > 8) {
171 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
172 return -EINVAL;
173 }
174 if (total_channels == 0) {
175 dev_err(&pdev->dev, "Need atleast one channel.\n");
176 return -EINVAL;
177 }
178
179 if (readouts * 2 + 2 + adc_channels > 16) {
180 dev_err(&pdev->dev, "Too many step configurations requested\n");
181 return -EINVAL;
182 }
183
184 /* Allocate memory for device */
185 tscadc = devm_kzalloc(&pdev->dev,
186 sizeof(struct ti_tscadc_dev), GFP_KERNEL);
187 if (!tscadc) {
188 dev_err(&pdev->dev, "failed to allocate memory.\n");
189 return -ENOMEM;
190 }
191 tscadc->dev = &pdev->dev;
192
193 err = platform_get_irq(pdev, 0);
194 if (err < 0) {
195 dev_err(&pdev->dev, "no irq ID is specified.\n");
196 goto ret;
197 } else
198 tscadc->irq = err;
199
200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res);
202 if (IS_ERR(tscadc->tscadc_base))
203 return PTR_ERR(tscadc->tscadc_base);
204
205 tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
206 tscadc->tscadc_base, &tscadc_regmap_config);
207 if (IS_ERR(tscadc->regmap_tscadc)) {
208 dev_err(&pdev->dev, "regmap init failed\n");
209 err = PTR_ERR(tscadc->regmap_tscadc);
210 goto ret;
211 }
212
213 spin_lock_init(&tscadc->reg_lock);
214 init_waitqueue_head(&tscadc->reg_se_wait);
215
216 pm_runtime_enable(&pdev->dev);
217 pm_runtime_get_sync(&pdev->dev);
218
219 /*
220 * The TSC_ADC_Subsystem has 2 clock domains
221 * OCP_CLK and ADC_CLK.
222 * The ADC clock is expected to run at target of 3MHz,
223 * and expected to capture 12-bit data at a rate of 200 KSPS.
224 * The TSC_ADC_SS controller design assumes the OCP clock is
225 * at least 6x faster than the ADC clock.
226 */
227 clk = clk_get(&pdev->dev, "adc_tsc_fck");
228 if (IS_ERR(clk)) {
229 dev_err(&pdev->dev, "failed to get TSC fck\n");
230 err = PTR_ERR(clk);
231 goto err_disable_clk;
232 }
233 clock_rate = clk_get_rate(clk);
234 clk_put(clk);
235 tscadc->clk_div = clock_rate / ADC_CLK;
236
237 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
238 tscadc->clk_div--;
239 tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div);
240
241 /* Set the control register bits */
242 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
243 tscadc_writel(tscadc, REG_CTRL, ctrl);
244
245 /* Set register bits for Idle Config Mode */
246 if (tsc_wires > 0) {
247 tscadc->tsc_wires = tsc_wires;
248 if (tsc_wires == 5)
249 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
250 else
251 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
252 tscadc_idle_config(tscadc);
253 }
254
255 /* Enable the TSC module enable bit */
256 ctrl |= CNTRLREG_TSCSSENB;
257 tscadc_writel(tscadc, REG_CTRL, ctrl);
258
259 tscadc->used_cells = 0;
260 tscadc->tsc_cell = -1;
261 tscadc->adc_cell = -1;
262
263 /* TSC Cell */
264 if (tsc_wires > 0) {
265 tscadc->tsc_cell = tscadc->used_cells;
266 cell = &tscadc->cells[tscadc->used_cells++];
267 cell->name = "TI-am335x-tsc";
268 cell->of_compatible = "ti,am3359-tsc";
269 cell->platform_data = &tscadc;
270 cell->pdata_size = sizeof(tscadc);
271 }
272
273 /* ADC Cell */
274 if (adc_channels > 0) {
275 tscadc->adc_cell = tscadc->used_cells;
276 cell = &tscadc->cells[tscadc->used_cells++];
277 cell->name = "TI-am335x-adc";
278 cell->of_compatible = "ti,am3359-adc";
279 cell->platform_data = &tscadc;
280 cell->pdata_size = sizeof(tscadc);
281 }
282
283 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
284 tscadc->used_cells, NULL, 0, NULL);
285 if (err < 0)
286 goto err_disable_clk;
287
288 device_init_wakeup(&pdev->dev, true);
289 platform_set_drvdata(pdev, tscadc);
290 return 0;
291
292err_disable_clk:
293 pm_runtime_put_sync(&pdev->dev);
294 pm_runtime_disable(&pdev->dev);
295ret:
296 return err;
297}
298
299static int ti_tscadc_remove(struct platform_device *pdev)
300{
301 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
302
303 tscadc_writel(tscadc, REG_SE, 0x00);
304
305 pm_runtime_put_sync(&pdev->dev);
306 pm_runtime_disable(&pdev->dev);
307
308 mfd_remove_devices(tscadc->dev);
309
310 return 0;
311}
312
313#ifdef CONFIG_PM
314static int tscadc_suspend(struct device *dev)
315{
316 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
317
318 tscadc_writel(tscadc_dev, REG_SE, 0x00);
319 pm_runtime_put_sync(dev);
320
321 return 0;
322}
323
324static int tscadc_resume(struct device *dev)
325{
326 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
327 u32 ctrl;
328
329 pm_runtime_get_sync(dev);
330
331 /* context restore */
332 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
333 tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
334
335 if (tscadc_dev->tsc_cell != -1) {
336 if (tscadc_dev->tsc_wires == 5)
337 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
338 else
339 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
340 tscadc_idle_config(tscadc_dev);
341 }
342 ctrl |= CNTRLREG_TSCSSENB;
343 tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
344
345 tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div);
346
347 return 0;
348}
349
350static const struct dev_pm_ops tscadc_pm_ops = {
351 .suspend = tscadc_suspend,
352 .resume = tscadc_resume,
353};
354#define TSCADC_PM_OPS (&tscadc_pm_ops)
355#else
356#define TSCADC_PM_OPS NULL
357#endif
358
359static const struct of_device_id ti_tscadc_dt_ids[] = {
360 { .compatible = "ti,am3359-tscadc", },
361 { }
362};
363MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
364
365static struct platform_driver ti_tscadc_driver = {
366 .driver = {
367 .name = "ti_am3359-tscadc",
368 .pm = TSCADC_PM_OPS,
369 .of_match_table = ti_tscadc_dt_ids,
370 },
371 .probe = ti_tscadc_probe,
372 .remove = ti_tscadc_remove,
373
374};
375
376module_platform_driver(ti_tscadc_driver);
377
378MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
379MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
380MODULE_LICENSE("GPL");