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1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2/*
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
4 * Copyright 2017-2018 NXP
5 */
6#ifndef _DPSECI_H_
7#define _DPSECI_H_
8
9/*
10 * Data Path SEC Interface API
11 * Contains initialization APIs and runtime control APIs for DPSECI
12 */
13
14struct fsl_mc_io;
15
16/**
17 * General DPSECI macros
18 */
19
20/**
21 * Maximum number of Tx/Rx queues per DPSECI object
22 */
23#define DPSECI_MAX_QUEUE_NUM 16
24
25/**
26 * All queues considered; see dpseci_set_rx_queue()
27 */
28#define DPSECI_ALL_QUEUES (u8)(-1)
29
30int dpseci_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int dpseci_id,
31 u16 *token);
32
33int dpseci_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
34
35/**
36 * Enable the Congestion Group support
37 */
38#define DPSECI_OPT_HAS_CG 0x000020
39
40/**
41 * struct dpseci_cfg - Structure representing DPSECI configuration
42 * @options: Any combination of the following flags:
43 * DPSECI_OPT_HAS_CG
44 * @num_tx_queues: num of queues towards the SEC
45 * @num_rx_queues: num of queues back from the SEC
46 * @priorities: Priorities for the SEC hardware processing;
47 * each place in the array is the priority of the tx queue
48 * towards the SEC;
49 * valid priorities are configured with values 1-8;
50 */
51struct dpseci_cfg {
52 u32 options;
53 u8 num_tx_queues;
54 u8 num_rx_queues;
55 u8 priorities[DPSECI_MAX_QUEUE_NUM];
56};
57
58int dpseci_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
59
60int dpseci_disable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
61
62int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token);
63
64int dpseci_is_enabled(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
65 int *en);
66
67/**
68 * struct dpseci_attr - Structure representing DPSECI attributes
69 * @id: DPSECI object ID
70 * @num_tx_queues: number of queues towards the SEC
71 * @num_rx_queues: number of queues back from the SEC
72 * @options: any combination of the following flags:
73 * DPSECI_OPT_HAS_CG
74 */
75struct dpseci_attr {
76 int id;
77 u8 num_tx_queues;
78 u8 num_rx_queues;
79 u32 options;
80};
81
82int dpseci_get_attributes(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
83 struct dpseci_attr *attr);
84
85/**
86 * enum dpseci_dest - DPSECI destination types
87 * @DPSECI_DEST_NONE: Unassigned destination; The queue is set in parked mode
88 * and does not generate FQDAN notifications; user is expected to dequeue
89 * from the queue based on polling or other user-defined method
90 * @DPSECI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN
91 * notifications to the specified DPIO; user is expected to dequeue from
92 * the queue only after notification is received
93 * @DPSECI_DEST_DPCON: The queue is set in schedule mode and does not generate
94 * FQDAN notifications, but is connected to the specified DPCON object;
95 * user is expected to dequeue from the DPCON channel
96 */
97enum dpseci_dest {
98 DPSECI_DEST_NONE = 0,
99 DPSECI_DEST_DPIO,
100 DPSECI_DEST_DPCON
101};
102
103/**
104 * struct dpseci_dest_cfg - Structure representing DPSECI destination parameters
105 * @dest_type: Destination type
106 * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
107 * @priority: Priority selection within the DPIO or DPCON channel; valid values
108 * are 0-1 or 0-7, depending on the number of priorities in that channel;
109 * not relevant for 'DPSECI_DEST_NONE' option
110 */
111struct dpseci_dest_cfg {
112 enum dpseci_dest dest_type;
113 int dest_id;
114 u8 priority;
115};
116
117/**
118 * DPSECI queue modification options
119 */
120
121/**
122 * Select to modify the user's context associated with the queue
123 */
124#define DPSECI_QUEUE_OPT_USER_CTX 0x00000001
125
126/**
127 * Select to modify the queue's destination
128 */
129#define DPSECI_QUEUE_OPT_DEST 0x00000002
130
131/**
132 * Select to modify the queue's order preservation
133 */
134#define DPSECI_QUEUE_OPT_ORDER_PRESERVATION 0x00000004
135
136/**
137 * struct dpseci_rx_queue_cfg - DPSECI RX queue configuration
138 * @options: Flags representing the suggested modifications to the queue;
139 * Use any combination of 'DPSECI_QUEUE_OPT_<X>' flags
140 * @order_preservation_en: order preservation configuration for the rx queue
141 * valid only if 'DPSECI_QUEUE_OPT_ORDER_PRESERVATION' is contained in 'options'
142 * @user_ctx: User context value provided in the frame descriptor of each
143 * dequeued frame; valid only if 'DPSECI_QUEUE_OPT_USER_CTX' is contained
144 * in 'options'
145 * @dest_cfg: Queue destination parameters; valid only if
146 * 'DPSECI_QUEUE_OPT_DEST' is contained in 'options'
147 */
148struct dpseci_rx_queue_cfg {
149 u32 options;
150 int order_preservation_en;
151 u64 user_ctx;
152 struct dpseci_dest_cfg dest_cfg;
153};
154
155int dpseci_set_rx_queue(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
156 u8 queue, const struct dpseci_rx_queue_cfg *cfg);
157
158/**
159 * struct dpseci_rx_queue_attr - Structure representing attributes of Rx queues
160 * @user_ctx: User context value provided in the frame descriptor of each
161 * dequeued frame
162 * @order_preservation_en: Status of the order preservation configuration on the
163 * queue
164 * @dest_cfg: Queue destination configuration
165 * @fqid: Virtual FQID value to be used for dequeue operations
166 */
167struct dpseci_rx_queue_attr {
168 u64 user_ctx;
169 int order_preservation_en;
170 struct dpseci_dest_cfg dest_cfg;
171 u32 fqid;
172};
173
174int dpseci_get_rx_queue(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
175 u8 queue, struct dpseci_rx_queue_attr *attr);
176
177/**
178 * struct dpseci_tx_queue_attr - Structure representing attributes of Tx queues
179 * @fqid: Virtual FQID to be used for sending frames to SEC hardware
180 * @priority: SEC hardware processing priority for the queue
181 */
182struct dpseci_tx_queue_attr {
183 u32 fqid;
184 u8 priority;
185};
186
187int dpseci_get_tx_queue(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
188 u8 queue, struct dpseci_tx_queue_attr *attr);
189
190/**
191 * struct dpseci_sec_attr - Structure representing attributes of the SEC
192 * hardware accelerator
193 * @ip_id: ID for SEC
194 * @major_rev: Major revision number for SEC
195 * @minor_rev: Minor revision number for SEC
196 * @era: SEC Era
197 * @deco_num: The number of copies of the DECO that are implemented in this
198 * version of SEC
199 * @zuc_auth_acc_num: The number of copies of ZUCA that are implemented in this
200 * version of SEC
201 * @zuc_enc_acc_num: The number of copies of ZUCE that are implemented in this
202 * version of SEC
203 * @snow_f8_acc_num: The number of copies of the SNOW-f8 module that are
204 * implemented in this version of SEC
205 * @snow_f9_acc_num: The number of copies of the SNOW-f9 module that are
206 * implemented in this version of SEC
207 * @crc_acc_num: The number of copies of the CRC module that are implemented in
208 * this version of SEC
209 * @pk_acc_num: The number of copies of the Public Key module that are
210 * implemented in this version of SEC
211 * @kasumi_acc_num: The number of copies of the Kasumi module that are
212 * implemented in this version of SEC
213 * @rng_acc_num: The number of copies of the Random Number Generator that are
214 * implemented in this version of SEC
215 * @md_acc_num: The number of copies of the MDHA (Hashing module) that are
216 * implemented in this version of SEC
217 * @arc4_acc_num: The number of copies of the ARC4 module that are implemented
218 * in this version of SEC
219 * @des_acc_num: The number of copies of the DES module that are implemented in
220 * this version of SEC
221 * @aes_acc_num: The number of copies of the AES module that are implemented in
222 * this version of SEC
223 * @ccha_acc_num: The number of copies of the ChaCha20 module that are
224 * implemented in this version of SEC.
225 * @ptha_acc_num: The number of copies of the Poly1305 module that are
226 * implemented in this version of SEC.
227 **/
228struct dpseci_sec_attr {
229 u16 ip_id;
230 u8 major_rev;
231 u8 minor_rev;
232 u8 era;
233 u8 deco_num;
234 u8 zuc_auth_acc_num;
235 u8 zuc_enc_acc_num;
236 u8 snow_f8_acc_num;
237 u8 snow_f9_acc_num;
238 u8 crc_acc_num;
239 u8 pk_acc_num;
240 u8 kasumi_acc_num;
241 u8 rng_acc_num;
242 u8 md_acc_num;
243 u8 arc4_acc_num;
244 u8 des_acc_num;
245 u8 aes_acc_num;
246 u8 ccha_acc_num;
247 u8 ptha_acc_num;
248};
249
250int dpseci_get_sec_attr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token,
251 struct dpseci_sec_attr *attr);
252
253int dpseci_get_api_version(struct fsl_mc_io *mc_io, u32 cmd_flags,
254 u16 *major_ver, u16 *minor_ver);
255
256/**
257 * enum dpseci_congestion_unit - DPSECI congestion units
258 * @DPSECI_CONGESTION_UNIT_BYTES: bytes units
259 * @DPSECI_CONGESTION_UNIT_FRAMES: frames units
260 */
261enum dpseci_congestion_unit {
262 DPSECI_CONGESTION_UNIT_BYTES = 0,
263 DPSECI_CONGESTION_UNIT_FRAMES
264};
265
266/**
267 * CSCN message is written to message_iova once entering a
268 * congestion state (see 'threshold_entry')
269 */
270#define DPSECI_CGN_MODE_WRITE_MEM_ON_ENTER 0x00000001
271
272/**
273 * CSCN message is written to message_iova once exiting a
274 * congestion state (see 'threshold_exit')
275 */
276#define DPSECI_CGN_MODE_WRITE_MEM_ON_EXIT 0x00000002
277
278/**
279 * CSCN write will attempt to allocate into a cache (coherent write);
280 * valid only if 'DPSECI_CGN_MODE_WRITE_MEM_<X>' is selected
281 */
282#define DPSECI_CGN_MODE_COHERENT_WRITE 0x00000004
283
284/**
285 * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' CSCN message is sent to
286 * DPIO/DPCON's WQ channel once entering a congestion state
287 * (see 'threshold_entry')
288 */
289#define DPSECI_CGN_MODE_NOTIFY_DEST_ON_ENTER 0x00000008
290
291/**
292 * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' CSCN message is sent to
293 * DPIO/DPCON's WQ channel once exiting a congestion state
294 * (see 'threshold_exit')
295 */
296#define DPSECI_CGN_MODE_NOTIFY_DEST_ON_EXIT 0x00000010
297
298/**
299 * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' when the CSCN is written
300 * to the sw-portal's DQRR, the DQRI interrupt is asserted immediately
301 * (if enabled)
302 */
303#define DPSECI_CGN_MODE_INTR_COALESCING_DISABLED 0x00000020
304
305/**
306 * struct dpseci_congestion_notification_cfg - congestion notification
307 * configuration
308 * @units: units type
309 * @threshold_entry: above this threshold we enter a congestion state.
310 * set it to '0' to disable it
311 * @threshold_exit: below this threshold we exit the congestion state.
312 * @message_ctx: The context that will be part of the CSCN message
313 * @message_iova: I/O virtual address (must be in DMA-able memory),
314 * must be 16B aligned;
315 * @dest_cfg: CSCN can be send to either DPIO or DPCON WQ channel
316 * @notification_mode: Mask of available options; use 'DPSECI_CGN_MODE_<X>'
317 * values
318 */
319struct dpseci_congestion_notification_cfg {
320 enum dpseci_congestion_unit units;
321 u32 threshold_entry;
322 u32 threshold_exit;
323 u64 message_ctx;
324 u64 message_iova;
325 struct dpseci_dest_cfg dest_cfg;
326 u16 notification_mode;
327};
328
329int dpseci_set_congestion_notification(struct fsl_mc_io *mc_io, u32 cmd_flags,
330 u16 token, const struct dpseci_congestion_notification_cfg *cfg);
331
332int dpseci_get_congestion_notification(struct fsl_mc_io *mc_io, u32 cmd_flags,
333 u16 token, struct dpseci_congestion_notification_cfg *cfg);
334
335#endif /* _DPSECI_H_ */