1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 1999, 2000, 01, 02, 03 by Ralf Baechle
 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 8 * Copyright (C) 2001 Kanoj Sarcar
 9 */
10#ifndef __ASM_MACH_IP27_IRQ_H
11#define __ASM_MACH_IP27_IRQ_H
12
 
 
 
 
 
13#define NR_IRQS 256
14
15#include <asm/mach-generic/irq.h>
16
17#define IP27_HUB_PEND0_IRQ	(MIPS_CPU_IRQ_BASE + 2)
18#define IP27_HUB_PEND1_IRQ	(MIPS_CPU_IRQ_BASE + 3)
19#define IP27_RT_TIMER_IRQ	(MIPS_CPU_IRQ_BASE + 4)
20
21#define IP27_HUB_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 8)
22#define IP27_HUB_IRQ_COUNT	128
23
24#endif /* __ASM_MACH_IP27_IRQ_H */

 1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 1999, 2000, 01, 02, 03 by Ralf Baechle
 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 8 * Copyright (C) 2001 Kanoj Sarcar
 9 */
10#ifndef __ASM_MACH_IP27_IRQ_H
11#define __ASM_MACH_IP27_IRQ_H
12
13/*
14 * A hardwired interrupt number is completely stupid for this system - a
15 * large configuration might have thousands if not tenthousands of
16 * interrupts.
17 */
18#define NR_IRQS 256
19
20#include_next <irq.h>
 
 
 
 
 
 
 
21
22#endif /* __ASM_MACH_IP27_IRQ_H */