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1# SPDX-License-Identifier: GPL-2.0
2comment "Processor Type"
3
4choice
5 prompt "CPU family support"
6 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU
8 help
9 The Freescale (was Motorola) M68K family of processors implements
10 the full 68000 processor instruction set.
11 The Freescale ColdFire family of processors is a modern derivative
12 of the 68000 processor family. They are mainly targeted at embedded
13 applications, and are all System-On-Chip (SOC) devices, as opposed
14 to stand alone CPUs. They implement a subset of the original 68000
15 processor instruction set.
16 If you anticipate running this kernel on a computer with a classic
17 MC68xxx processor, select M68KCLASSIC.
18 If you anticipate running this kernel on a computer with a ColdFire
19 processor, select COLDFIRE.
20
21config M68KCLASSIC
22 bool "Classic M68K CPU family support"
23 select HAVE_ARCH_PFN_VALID
24
25config COLDFIRE
26 bool "Coldfire CPU family support"
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_CAS
29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM
31 select GPIOLIB
32 select HAVE_LEGACY_CLK
33
34endchoice
35
36if M68KCLASSIC
37
38config M68000
39 def_bool y
40 depends on !MMU
41 select CPU_HAS_NO_BITFIELDS
42 select CPU_HAS_NO_CAS
43 select CPU_HAS_NO_MULDIV64
44 select CPU_HAS_NO_UNALIGNED
45 select GENERIC_CSUM
46 select CPU_NO_EFFICIENT_FFS
47 select HAVE_ARCH_HASH
48 select LEGACY_TIMER_TICK
49 help
50 The Freescale (was Motorola) 68000 CPU is the first generation of
51 the well known M68K family of processors. The CPU core as well as
52 being available as a stand alone CPU was also used in many
53 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
54 a paging MMU.
55
56config M68020
57 bool "68020 support"
58 depends on MMU
59 select FPU
60 select CPU_HAS_ADDRESS_SPACES
61 help
62 If you anticipate running this kernel on a computer with a MC68020
63 processor, say Y. Otherwise, say N. Note that the 68020 requires a
64 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
65 Sun 3, which provides its own version.
66
67config M68030
68 bool "68030 support"
69 depends on MMU && !MMU_SUN3
70 select FPU
71 select CPU_HAS_ADDRESS_SPACES
72 help
73 If you anticipate running this kernel on a computer with a MC68030
74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
75 work, as it does not include an MMU (Memory Management Unit).
76
77config M68040
78 bool "68040 support"
79 depends on MMU && !MMU_SUN3
80 select FPU
81 select CPU_HAS_ADDRESS_SPACES
82 help
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
86 Management Unit).
87
88config M68060
89 bool "68060 support"
90 depends on MMU && !MMU_SUN3
91 select FPU
92 select CPU_HAS_ADDRESS_SPACES
93 help
94 If you anticipate running this kernel on a computer with a MC68060
95 processor, say Y. Otherwise, say N.
96
97config M68328
98 bool
99 depends on !MMU
100 select M68000
101 help
102 Motorola 68328 processor support.
103
104config M68EZ328
105 bool
106 depends on !MMU
107 select M68000
108 help
109 Motorola 68EX328 processor support.
110
111config M68VZ328
112 bool
113 depends on !MMU
114 select M68000
115 help
116 Motorola 68VZ328 processor support.
117
118endif # M68KCLASSIC
119
120if COLDFIRE
121
122choice
123 prompt "ColdFire SoC type"
124 default M520x
125 help
126 Select the type of ColdFire System-on-Chip (SoC) that you want
127 to build for.
128
129config M5206
130 bool "MCF5206"
131 depends on !MMU
132 select COLDFIRE_SW_A7
133 select COLDFIRE_TIMERS
134 select HAVE_MBAR
135 select CPU_NO_EFFICIENT_FFS
136 help
137 Motorola ColdFire 5206 processor support.
138
139config M5206e
140 bool "MCF5206e"
141 depends on !MMU
142 select COLDFIRE_SW_A7
143 select COLDFIRE_TIMERS
144 select HAVE_MBAR
145 select CPU_NO_EFFICIENT_FFS
146 help
147 Motorola ColdFire 5206e processor support.
148
149config M520x
150 bool "MCF520x"
151 depends on !MMU
152 select COLDFIRE_PIT_TIMER
153 select HAVE_CACHE_SPLIT
154 help
155 Freescale Coldfire 5207/5208 processor support.
156
157config M523x
158 bool "MCF523x"
159 depends on !MMU
160 select COLDFIRE_PIT_TIMER
161 select HAVE_CACHE_SPLIT
162 select HAVE_IPSBAR
163 help
164 Freescale Coldfire 5230/1/2/4/5 processor support
165
166config M5249
167 bool "MCF5249"
168 depends on !MMU
169 select COLDFIRE_SW_A7
170 select COLDFIRE_TIMERS
171 select HAVE_MBAR
172 select CPU_NO_EFFICIENT_FFS
173 help
174 Motorola ColdFire 5249 processor support.
175
176config M525x
177 bool "MCF525x"
178 depends on !MMU
179 select COLDFIRE_SW_A7
180 select COLDFIRE_TIMERS
181 select HAVE_MBAR
182 select CPU_NO_EFFICIENT_FFS
183 help
184 Freescale (Motorola) Coldfire 5251/5253 processor support.
185
186config M5271
187 bool "MCF5271"
188 depends on !MMU
189 select COLDFIRE_PIT_TIMER
190 select M527x
191 select HAVE_CACHE_SPLIT
192 select HAVE_IPSBAR
193 help
194 Freescale (Motorola) ColdFire 5270/5271 processor support.
195
196config M5272
197 bool "MCF5272"
198 depends on !MMU
199 select COLDFIRE_SW_A7
200 select COLDFIRE_TIMERS
201 select HAVE_MBAR
202 select CPU_NO_EFFICIENT_FFS
203 help
204 Motorola ColdFire 5272 processor support.
205
206config M5275
207 bool "MCF5275"
208 depends on !MMU
209 select COLDFIRE_PIT_TIMER
210 select M527x
211 select HAVE_CACHE_SPLIT
212 select HAVE_IPSBAR
213 help
214 Freescale (Motorola) ColdFire 5274/5275 processor support.
215
216config M528x
217 bool "MCF528x"
218 depends on !MMU
219 select COLDFIRE_PIT_TIMER
220 select HAVE_CACHE_SPLIT
221 select HAVE_IPSBAR
222 help
223 Motorola ColdFire 5280/5282 processor support.
224
225config M5307
226 bool "MCF5307"
227 depends on !MMU
228 select COLDFIRE_TIMERS
229 select COLDFIRE_SW_A7
230 select HAVE_CACHE_CB
231 select HAVE_MBAR
232 select CPU_NO_EFFICIENT_FFS
233 help
234 Motorola ColdFire 5307 processor support.
235
236config M532x
237 bool "MCF532x"
238 depends on !MMU
239 select COLDFIRE_TIMERS
240 select M53xx
241 select HAVE_CACHE_CB
242 help
243 Freescale (Motorola) ColdFire 532x processor support.
244
245config M537x
246 bool "MCF537x"
247 depends on !MMU
248 select COLDFIRE_TIMERS
249 select M53xx
250 select HAVE_CACHE_CB
251 help
252 Freescale ColdFire 537x processor support.
253
254config M5407
255 bool "MCF5407"
256 depends on !MMU
257 select COLDFIRE_SW_A7
258 select COLDFIRE_TIMERS
259 select HAVE_CACHE_CB
260 select HAVE_MBAR
261 select CPU_NO_EFFICIENT_FFS
262 help
263 Motorola ColdFire 5407 processor support.
264
265config M547x
266 bool "MCF547x"
267 select M54xx
268 select COLDFIRE_SLTIMERS
269 select MMU_COLDFIRE if MMU
270 select FPU if MMU
271 select HAVE_CACHE_CB
272 select HAVE_MBAR
273 select CPU_NO_EFFICIENT_FFS
274 help
275 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
276
277config M548x
278 bool "MCF548x"
279 select COLDFIRE_SLTIMERS
280 select MMU_COLDFIRE if MMU
281 select FPU if MMU
282 select M54xx
283 select HAVE_CACHE_CB
284 select HAVE_MBAR
285 select CPU_NO_EFFICIENT_FFS
286 help
287 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
288
289config M5441x
290 bool "MCF5441x"
291 select COLDFIRE_PIT_TIMER
292 select MMU_COLDFIRE if MMU
293 select HAVE_CACHE_CB
294 help
295 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
296
297endchoice
298
299config M527x
300 bool
301
302config M53xx
303 bool
304
305config M54xx
306 select HAVE_PCI
307 bool
308
309config COLDFIRE_PIT_TIMER
310 bool
311
312config COLDFIRE_TIMERS
313 bool
314 select LEGACY_TIMER_TICK
315
316config COLDFIRE_SLTIMERS
317 bool
318 select LEGACY_TIMER_TICK
319
320endif # COLDFIRE
321
322comment "Processor Specific Options"
323
324config M68KFPU_EMU
325 bool "Math emulation support"
326 depends on M68KCLASSIC && FPU
327 help
328 At some point in the future, this will cause floating-point math
329 instructions to be emulated by the kernel on machines that lack a
330 floating-point math coprocessor. Thrill-seekers and chronically
331 sleep-deprived psychotic hacker types can say Y now, everyone else
332 should probably wait a while.
333
334config M68KFPU_EMU_EXTRAPREC
335 bool "Math emulation extra precision"
336 depends on M68KFPU_EMU
337 help
338 The fpu uses normally a few bit more during calculations for
339 correct rounding, the emulator can (often) do the same but this
340 extra calculation can cost quite some time, so you can disable
341 it here. The emulator will then "only" calculate with a 64 bit
342 mantissa and round slightly incorrect, what is more than enough
343 for normal usage.
344
345config M68KFPU_EMU_ONLY
346 bool "Math emulation only kernel"
347 depends on M68KFPU_EMU
348 help
349 This option prevents any floating-point instructions from being
350 compiled into the kernel, thereby the kernel doesn't save any
351 floating point context anymore during task switches, so this
352 kernel will only be usable on machines without a floating-point
353 math coprocessor. This makes the kernel a bit faster as no tests
354 needs to be executed whether a floating-point instruction in the
355 kernel should be executed or not.
356
357config ADVANCED
358 bool "Advanced configuration options"
359 depends on MMU
360 help
361 This gives you access to some advanced options for the CPU. The
362 defaults should be fine for most users, but these options may make
363 it possible for you to improve performance somewhat if you know what
364 you are doing.
365
366 Note that the answer to this question won't directly affect the
367 kernel: saying N will just cause the configurator to skip all
368 the questions about these options.
369
370 Most users should say N to this question.
371
372config RMW_INSNS
373 bool "Use read-modify-write instructions"
374 depends on ADVANCED && !CPU_HAS_NO_CAS
375 help
376 This allows to use certain instructions that work with indivisible
377 read-modify-write bus cycles. While this is faster than the
378 workaround of disabling interrupts, it can conflict with DMA
379 ( = direct memory access) on many Amiga systems, and it is also said
380 to destabilize other machines. It is very likely that this will
381 cause serious problems on any Amiga or Atari Medusa if set. The only
382 configuration where it should work are 68030-based Ataris, where it
383 apparently improves performance. But you've been warned! Unless you
384 really know what you are doing, say N. Try Y only if you're quite
385 adventurous.
386
387config SINGLE_MEMORY_CHUNK
388 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
389 depends on MMU
390 default y if SUN3 || MMU_COLDFIRE
391 help
392 Ignore all but the first contiguous chunk of physical memory for VM
393 purposes. This will save a few bytes kernel size and may speed up
394 some operations.
395 When this option os set to N, you may want to lower "Maximum zone
396 order" to save memory that could be wasted for unused memory map.
397 Say N if not sure.
398
399config ARCH_FORCE_MAX_ORDER
400 int "Order of maximal physically contiguous allocations" if ADVANCED
401 depends on !SINGLE_MEMORY_CHUNK
402 default "10"
403 help
404 The kernel page allocator limits the size of maximal physically
405 contiguous allocations. The limit is called MAX_PAGE_ORDER and it
406 defines the maximal power of two of number of pages that can be
407 allocated as a single contiguous block. This option allows
408 overriding the default setting when ability to allocate very
409 large blocks of physically contiguous memory is required.
410
411 For systems that have holes in their physical address space this
412 value also defines the minimal size of the hole that allows
413 freeing unused memory map.
414
415 Don't change if unsure.
416
417config 060_WRITETHROUGH
418 bool "Use write-through caching for 68060 supervisor accesses"
419 depends on ADVANCED && M68060
420 help
421 The 68060 generally uses copyback caching of recently accessed data.
422 Copyback caching means that memory writes will be held in an on-chip
423 cache and only written back to memory some time later. Saying Y
424 here will force supervisor (kernel) accesses to use writethrough
425 caching. Writethrough caching means that data is written to memory
426 straight away, so that cache and memory data always agree.
427 Writethrough caching is less efficient, but is needed for some
428 drivers on 68060 based systems where the 68060 bus snooping signal
429 is hardwired on. The 53c710 SCSI driver is known to suffer from
430 this problem.
431
432config M68K_L2_CACHE
433 bool
434 depends on MAC
435 default y
436
437config CPU_HAS_NO_BITFIELDS
438 bool
439
440config CPU_HAS_NO_CAS
441 bool
442
443config CPU_HAS_NO_MULDIV64
444 bool
445
446config CPU_HAS_NO_UNALIGNED
447 bool
448
449config CPU_HAS_ADDRESS_SPACES
450 bool
451 select ALTERNATE_USER_ADDRESS_SPACE
452
453config FPU
454 bool
455
456config COLDFIRE_SW_A7
457 bool
458
459config HAVE_CACHE_SPLIT
460 bool
461
462config HAVE_CACHE_CB
463 bool
464
465config HAVE_MBAR
466 bool
467
468config HAVE_IPSBAR
469 bool
470
471config CLOCK_FREQ
472 int "Set the core clock frequency"
473 default "25000000" if M5206
474 default "54000000" if M5206e
475 default "166666666" if M520x
476 default "140000000" if M5249
477 default "150000000" if M527x || M523x
478 default "90000000" if M5307
479 default "50000000" if M5407
480 default "266000000" if M54xx
481 default "66666666"
482 depends on COLDFIRE
483 help
484 Define the CPU clock frequency in use. This is the core clock
485 frequency, it may or may not be the same as the external clock
486 crystal fitted to your board. Some processors have an internal
487 PLL and can have their frequency programmed at run time, others
488 use internal dividers. In general the kernel won't setup a PLL
489 if it is fitted (there are some exceptions). This value will be
490 specific to the exact CPU that you are using.
491
492config OLDMASK
493 bool "Old mask 5307 (1H55J) silicon"
494 depends on M5307
495 help
496 Build support for the older revision ColdFire 5307 silicon.
497 Specifically this is the 1H55J mask revision.
498
499if HAVE_CACHE_SPLIT
500choice
501 prompt "Split Cache Configuration"
502 default CACHE_I
503
504config CACHE_I
505 bool "Instruction"
506 help
507 Use all of the ColdFire CPU cache memory as an instruction cache.
508
509config CACHE_D
510 bool "Data"
511 help
512 Use all of the ColdFire CPU cache memory as a data cache.
513
514config CACHE_BOTH
515 bool "Both"
516 help
517 Split the ColdFire CPU cache, and use half as an instruction cache
518 and half as a data cache.
519endchoice
520endif # HAVE_CACHE_SPLIT
521
522if HAVE_CACHE_CB
523choice
524 prompt "Data cache mode"
525 default CACHE_WRITETHRU
526
527config CACHE_WRITETHRU
528 bool "Write-through"
529 help
530 The ColdFire CPU cache is set into Write-through mode.
531
532config CACHE_COPYBACK
533 bool "Copy-back"
534 help
535 The ColdFire CPU cache is set into Copy-back mode.
536endchoice
537endif # HAVE_CACHE_CB
538
539# Coldfire cores that do not have a data cache configured can do coherent DMA.
540config COLDFIRE_COHERENT_DMA
541 bool
542 default y
543 depends on COLDFIRE
544 depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH
545
546config M68K_NONCOHERENT_DMA
547 bool
548 default y
549 depends on HAS_DMA && !COLDFIRE_COHERENT_DMA
1comment "Processor Type"
2
3choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
10 The Freescale ColdFire family of processors is a modern derivative
11 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23config COLDFIRE
24 bool "Coldfire CPU family support"
25 select ARCH_REQUIRE_GPIOLIB
26 select ARCH_HAVE_CUSTOM_GPIO_H
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_MULDIV64
29 select GENERIC_CSUM
30 select HAVE_CLK
31
32endchoice
33
34if M68KCLASSIC
35
36config M68000
37 bool "MC68000"
38 depends on !MMU
39 select CPU_HAS_NO_BITFIELDS
40 select CPU_HAS_NO_MULDIV64
41 select CPU_HAS_NO_UNALIGNED
42 select GENERIC_CSUM
43 help
44 The Freescale (was Motorola) 68000 CPU is the first generation of
45 the well known M68K family of processors. The CPU core as well as
46 being available as a stand alone CPU was also used in many
47 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
48 a paging MMU.
49
50config MCPU32
51 bool
52 select CPU_HAS_NO_BITFIELDS
53 select CPU_HAS_NO_UNALIGNED
54 help
55 The Freescale (was then Motorola) CPU32 is a CPU core that is
56 based on the 68020 processor. For the most part it is used in
57 System-On-Chip parts, and does not contain a paging MMU.
58
59config M68020
60 bool "68020 support"
61 depends on MMU
62 select CPU_HAS_ADDRESS_SPACES
63 help
64 If you anticipate running this kernel on a computer with a MC68020
65 processor, say Y. Otherwise, say N. Note that the 68020 requires a
66 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
67 Sun 3, which provides its own version.
68
69config M68030
70 bool "68030 support"
71 depends on MMU && !MMU_SUN3
72 select CPU_HAS_ADDRESS_SPACES
73 help
74 If you anticipate running this kernel on a computer with a MC68030
75 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
76 work, as it does not include an MMU (Memory Management Unit).
77
78config M68040
79 bool "68040 support"
80 depends on MMU && !MMU_SUN3
81 select CPU_HAS_ADDRESS_SPACES
82 help
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
86 Management Unit).
87
88config M68060
89 bool "68060 support"
90 depends on MMU && !MMU_SUN3
91 select CPU_HAS_ADDRESS_SPACES
92 help
93 If you anticipate running this kernel on a computer with a MC68060
94 processor, say Y. Otherwise, say N.
95
96config M68328
97 bool "MC68328"
98 depends on !MMU
99 select M68000
100 help
101 Motorola 68328 processor support.
102
103config M68EZ328
104 bool "MC68EZ328"
105 depends on !MMU
106 select M68000
107 help
108 Motorola 68EX328 processor support.
109
110config M68VZ328
111 bool "MC68VZ328"
112 depends on !MMU
113 select M68000
114 help
115 Motorola 68VZ328 processor support.
116
117endif # M68KCLASSIC
118
119if COLDFIRE
120
121choice
122 prompt "ColdFire SoC type"
123 default M520x
124 help
125 Select the type of ColdFire System-on-Chip (SoC) that you want
126 to build for.
127
128config M5206
129 bool "MCF5206"
130 depends on !MMU
131 select COLDFIRE_SW_A7
132 select HAVE_MBAR
133 help
134 Motorola ColdFire 5206 processor support.
135
136config M5206e
137 bool "MCF5206e"
138 depends on !MMU
139 select COLDFIRE_SW_A7
140 select HAVE_MBAR
141 help
142 Motorola ColdFire 5206e processor support.
143
144config M520x
145 bool "MCF520x"
146 depends on !MMU
147 select GENERIC_CLOCKEVENTS
148 select HAVE_CACHE_SPLIT
149 help
150 Freescale Coldfire 5207/5208 processor support.
151
152config M523x
153 bool "MCF523x"
154 depends on !MMU
155 select GENERIC_CLOCKEVENTS
156 select HAVE_CACHE_SPLIT
157 select HAVE_IPSBAR
158 help
159 Freescale Coldfire 5230/1/2/4/5 processor support
160
161config M5249
162 bool "MCF5249"
163 depends on !MMU
164 select COLDFIRE_SW_A7
165 select HAVE_MBAR
166 help
167 Motorola ColdFire 5249 processor support.
168
169config M525x
170 bool "MCF525x"
171 depends on !MMU
172 select COLDFIRE_SW_A7
173 select HAVE_MBAR
174 help
175 Freescale (Motorola) Coldfire 5251/5253 processor support.
176
177config M5271
178 bool "MCF5271"
179 depends on !MMU
180 select M527x
181 select HAVE_CACHE_SPLIT
182 select HAVE_IPSBAR
183 select GENERIC_CLOCKEVENTS
184 help
185 Freescale (Motorola) ColdFire 5270/5271 processor support.
186
187config M5272
188 bool "MCF5272"
189 depends on !MMU
190 select COLDFIRE_SW_A7
191 select HAVE_MBAR
192 help
193 Motorola ColdFire 5272 processor support.
194
195config M5275
196 bool "MCF5275"
197 depends on !MMU
198 select M527x
199 select HAVE_CACHE_SPLIT
200 select HAVE_IPSBAR
201 select GENERIC_CLOCKEVENTS
202 help
203 Freescale (Motorola) ColdFire 5274/5275 processor support.
204
205config M528x
206 bool "MCF528x"
207 depends on !MMU
208 select GENERIC_CLOCKEVENTS
209 select HAVE_CACHE_SPLIT
210 select HAVE_IPSBAR
211 help
212 Motorola ColdFire 5280/5282 processor support.
213
214config M5307
215 bool "MCF5307"
216 depends on !MMU
217 select COLDFIRE_SW_A7
218 select HAVE_CACHE_CB
219 select HAVE_MBAR
220 help
221 Motorola ColdFire 5307 processor support.
222
223config M532x
224 bool "MCF532x"
225 depends on !MMU
226 select M53xx
227 select HAVE_CACHE_CB
228 help
229 Freescale (Motorola) ColdFire 532x processor support.
230
231config M537x
232 bool "MCF537x"
233 depends on !MMU
234 select M53xx
235 select HAVE_CACHE_CB
236 help
237 Freescale ColdFire 537x processor support.
238
239config M5407
240 bool "MCF5407"
241 depends on !MMU
242 select COLDFIRE_SW_A7
243 select HAVE_CACHE_CB
244 select HAVE_MBAR
245 help
246 Motorola ColdFire 5407 processor support.
247
248config M547x
249 bool "MCF547x"
250 select M54xx
251 select MMU_COLDFIRE if MMU
252 select HAVE_CACHE_CB
253 select HAVE_MBAR
254 help
255 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
256
257config M548x
258 bool "MCF548x"
259 select MMU_COLDFIRE if MMU
260 select M54xx
261 select HAVE_CACHE_CB
262 select HAVE_MBAR
263 help
264 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
265
266config M5441x
267 bool "MCF5441x"
268 depends on !MMU
269 select GENERIC_CLOCKEVENTS
270 select HAVE_CACHE_CB
271 help
272 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
273
274endchoice
275
276config M527x
277 bool
278
279config M53xx
280 bool
281
282config M54xx
283 bool
284
285endif # COLDFIRE
286
287
288comment "Processor Specific Options"
289
290config M68KFPU_EMU
291 bool "Math emulation support"
292 depends on MMU
293 help
294 At some point in the future, this will cause floating-point math
295 instructions to be emulated by the kernel on machines that lack a
296 floating-point math coprocessor. Thrill-seekers and chronically
297 sleep-deprived psychotic hacker types can say Y now, everyone else
298 should probably wait a while.
299
300config M68KFPU_EMU_EXTRAPREC
301 bool "Math emulation extra precision"
302 depends on M68KFPU_EMU
303 help
304 The fpu uses normally a few bit more during calculations for
305 correct rounding, the emulator can (often) do the same but this
306 extra calculation can cost quite some time, so you can disable
307 it here. The emulator will then "only" calculate with a 64 bit
308 mantissa and round slightly incorrect, what is more than enough
309 for normal usage.
310
311config M68KFPU_EMU_ONLY
312 bool "Math emulation only kernel"
313 depends on M68KFPU_EMU
314 help
315 This option prevents any floating-point instructions from being
316 compiled into the kernel, thereby the kernel doesn't save any
317 floating point context anymore during task switches, so this
318 kernel will only be usable on machines without a floating-point
319 math coprocessor. This makes the kernel a bit faster as no tests
320 needs to be executed whether a floating-point instruction in the
321 kernel should be executed or not.
322
323config ADVANCED
324 bool "Advanced configuration options"
325 depends on MMU
326 ---help---
327 This gives you access to some advanced options for the CPU. The
328 defaults should be fine for most users, but these options may make
329 it possible for you to improve performance somewhat if you know what
330 you are doing.
331
332 Note that the answer to this question won't directly affect the
333 kernel: saying N will just cause the configurator to skip all
334 the questions about these options.
335
336 Most users should say N to this question.
337
338config RMW_INSNS
339 bool "Use read-modify-write instructions"
340 depends on ADVANCED
341 ---help---
342 This allows to use certain instructions that work with indivisible
343 read-modify-write bus cycles. While this is faster than the
344 workaround of disabling interrupts, it can conflict with DMA
345 ( = direct memory access) on many Amiga systems, and it is also said
346 to destabilize other machines. It is very likely that this will
347 cause serious problems on any Amiga or Atari Medusa if set. The only
348 configuration where it should work are 68030-based Ataris, where it
349 apparently improves performance. But you've been warned! Unless you
350 really know what you are doing, say N. Try Y only if you're quite
351 adventurous.
352
353config SINGLE_MEMORY_CHUNK
354 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
355 depends on MMU
356 default y if SUN3
357 select NEED_MULTIPLE_NODES
358 help
359 Ignore all but the first contiguous chunk of physical memory for VM
360 purposes. This will save a few bytes kernel size and may speed up
361 some operations. Say N if not sure.
362
363config ARCH_DISCONTIGMEM_ENABLE
364 def_bool MMU && !SINGLE_MEMORY_CHUNK
365
366config 060_WRITETHROUGH
367 bool "Use write-through caching for 68060 supervisor accesses"
368 depends on ADVANCED && M68060
369 ---help---
370 The 68060 generally uses copyback caching of recently accessed data.
371 Copyback caching means that memory writes will be held in an on-chip
372 cache and only written back to memory some time later. Saying Y
373 here will force supervisor (kernel) accesses to use writethrough
374 caching. Writethrough caching means that data is written to memory
375 straight away, so that cache and memory data always agree.
376 Writethrough caching is less efficient, but is needed for some
377 drivers on 68060 based systems where the 68060 bus snooping signal
378 is hardwired on. The 53c710 SCSI driver is known to suffer from
379 this problem.
380
381config M68K_L2_CACHE
382 bool
383 depends on MAC
384 default y
385
386config NODES_SHIFT
387 int
388 default "3"
389 depends on !SINGLE_MEMORY_CHUNK
390
391config CPU_HAS_NO_BITFIELDS
392 bool
393
394config CPU_HAS_NO_MULDIV64
395 bool
396
397config CPU_HAS_NO_UNALIGNED
398 bool
399
400config CPU_HAS_ADDRESS_SPACES
401 bool
402
403config FPU
404 bool
405
406config COLDFIRE_SW_A7
407 bool
408
409config HAVE_CACHE_SPLIT
410 bool
411
412config HAVE_CACHE_CB
413 bool
414
415config HAVE_MBAR
416 bool
417
418config HAVE_IPSBAR
419 bool
420
421config CLOCK_FREQ
422 int "Set the core clock frequency"
423 default "25000000" if M5206
424 default "54000000" if M5206e
425 default "166666666" if M520x
426 default "140000000" if M5249
427 default "150000000" if M527x || M523x
428 default "90000000" if M5307
429 default "50000000" if M5407
430 default "266000000" if M54xx
431 default "66666666"
432 depends on COLDFIRE
433 help
434 Define the CPU clock frequency in use. This is the core clock
435 frequency, it may or may not be the same as the external clock
436 crystal fitted to your board. Some processors have an internal
437 PLL and can have their frequency programmed at run time, others
438 use internal dividers. In general the kernel won't setup a PLL
439 if it is fitted (there are some exceptions). This value will be
440 specific to the exact CPU that you are using.
441
442config OLDMASK
443 bool "Old mask 5307 (1H55J) silicon"
444 depends on M5307
445 help
446 Build support for the older revision ColdFire 5307 silicon.
447 Specifically this is the 1H55J mask revision.
448
449if HAVE_CACHE_SPLIT
450choice
451 prompt "Split Cache Configuration"
452 default CACHE_I
453
454config CACHE_I
455 bool "Instruction"
456 help
457 Use all of the ColdFire CPU cache memory as an instruction cache.
458
459config CACHE_D
460 bool "Data"
461 help
462 Use all of the ColdFire CPU cache memory as a data cache.
463
464config CACHE_BOTH
465 bool "Both"
466 help
467 Split the ColdFire CPU cache, and use half as an instruction cache
468 and half as a data cache.
469endchoice
470endif
471
472if HAVE_CACHE_CB
473choice
474 prompt "Data cache mode"
475 default CACHE_WRITETHRU
476
477config CACHE_WRITETHRU
478 bool "Write-through"
479 help
480 The ColdFire CPU cache is set into Write-through mode.
481
482config CACHE_COPYBACK
483 bool "Copy-back"
484 help
485 The ColdFire CPU cache is set into Copy-back mode.
486endchoice
487endif
488