1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Copyright (c) 2018 NXP
  4 * Copyright (c) 2019 Engicam srl
  5 * Copyright (c) 2020 Amarula Solutions(India)
  6 */
  7
  8/ {
  9	compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
 10};
 11
 12&A53_0 {
 13	cpu-supply = <&buck2>;
 14};
 15
 16&A53_1 {
 17	cpu-supply = <&buck2>;
 18};
 19
 20&A53_2 {
 21	cpu-supply = <&buck2>;
 22};
 23
 24&A53_3 {
 25	cpu-supply = <&buck2>;
 26};
 27
 28&i2c1 {
 29	clock-frequency = <100000>;
 30	pinctrl-names = "default";
 31	pinctrl-0 = <&pinctrl_i2c1>;
 32	status = "okay";
 33
 34	pca9450: pmic@25 {
 35		compatible = "nxp,pca9450c";
 36		interrupt-parent = <&gpio3>;
 37		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 38		pinctrl-names = "default";
 39		pinctrl-0 = <&pinctrl_pmic>;
 40		reg = <0x25>;
 41
 42		regulators {
 43			buck1: BUCK1 {
 44				regulator-always-on;
 45				regulator-boot-on;
 46				regulator-min-microvolt = <720000>;
 47				regulator-max-microvolt = <1000000>;
 48				regulator-name = "BUCK1";
 49				regulator-ramp-delay = <3125>;
 50			};
 51
 52			buck2: BUCK2  {
 53				nxp,dvs-run-voltage = <950000>;
 54				nxp,dvs-standby-voltage = <850000>;
 55				regulator-always-on;
 56				regulator-boot-on;
 57				regulator-max-microvolt = <1025000>;
 58				regulator-min-microvolt = <720000>;
 59				regulator-name = "BUCK2";
 60				regulator-ramp-delay = <3125>;
 61			};
 62
 63			buck4: BUCK4 {
 64				regulator-always-on;
 65				regulator-boot-on;
 66				regulator-max-microvolt = <3600000>;
 67				regulator-min-microvolt = <3000000>;
 68				regulator-name = "BUCK4";
 69			};
 70
 71			buck5: BUCK5 {
 72				regulator-always-on;
 73				regulator-boot-on;
 74				regulator-max-microvolt = <1950000>;
 75				regulator-min-microvolt = <1650000>;
 76				regulator-name = "BUCK5";
 77			};
 78
 79			buck6: BUCK6 {
 80				regulator-always-on;
 81				regulator-boot-on;
 82				regulator-max-microvolt = <1155000>;
 83				regulator-min-microvolt = <1045000>;
 84				regulator-name = "BUCK6";
 85			};
 86
 87			ldo1: LDO1 {
 88				regulator-always-on;
 89				regulator-boot-on;
 90				regulator-max-microvolt = <1950000>;
 91				regulator-min-microvolt = <1650000>;
 92				regulator-name = "LDO1";
 93			};
 94
 95			ldo3: LDO3 {
 96				regulator-always-on;
 97				regulator-boot-on;
 98				regulator-max-microvolt = <1890000>;
 99				regulator-min-microvolt = <1710000>;
100				regulator-name = "LDO3";
101			};
102
103			ldo5: LDO5 {
104				regulator-always-on;
105				regulator-boot-on;
106				regulator-max-microvolt = <3300000>;
107				regulator-min-microvolt = <1800000>;
108				regulator-name = "LDO5";
109			};
110		};
111	};
112};
113
114/* EMMC */
115&usdhc3 {
116	bus-width = <8>;
117	non-removable;
118	pinctrl-names = "default", "state_100mhz", "state_200mhz";
119	pinctrl-0 = <&pinctrl_usdhc3>;
120	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
121	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
122	status = "okay";
123};
124
125&iomuxc {
126	pinctrl_i2c1: i2c1grp {
127		fsl,pins = <
128			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c3
129			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c3
130		>;
131	};
132
133	pinctrl_pmic: pmicgrp {
134		fsl,pins = <
135			MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01	  0x41
136		>;
137	};
138
139	pinctrl_usdhc3: usdhc3grp {
140		fsl,pins = <
141			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190
142			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0
143			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0
144			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0
145			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0
146			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0
147			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0
148			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0
149			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0
150			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0
151			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190
152		>;
153	};
154
155	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
156		fsl,pins = <
157			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194
158			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4
159			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4
160			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4
161			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4
162			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4
163			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4
164			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4
165			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4
166			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4
167			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194
168		>;
169	};
170
171	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
172		fsl,pins = <
173			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196
174			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6
175			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d6
176			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d6
177			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d6
178			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d6
179			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d6
180			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d6
181			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d6
182			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d6
183			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196
184		>;
185	};
186};