1/*
  2 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
  3 *
  4 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5 *
  6 * Licensed under GPLv2.
  7 */
  8/dts-v1/;
  9#include "at91sam9g45.dtsi"
 10
 11/ {
 12	model = "Ronetix pm9g45";
 13	compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
 14
 15	chosen {
 16		bootargs = "console=ttyS0,115200";
 17	};
 18
 19	memory {
 20		reg = <0x70000000 0x8000000>;
 21	};
 22
 23	clocks {
 24		#address-cells = <1>;
 25		#size-cells = <1>;
 26		ranges;
 27
 28		main_clock: clock@0 {
 29			compatible = "atmel,osc", "fixed-clock";
 30			clock-frequency = <12000000>;
 31		};
 32
 33		slow_xtal {
 34		      clock-frequency = <32768>;
 35		};
 36
 37		main_xtal {
 38		      clock-frequency = <12000000>;
 39		};
 40	};
 41
 42	ahb {
 43		apb {
 44			dbgu: serial@ffffee00 {
 45				status = "okay";
 46			};
 47
 48			pinctrl@fffff200 {
 49
 50				board {
 51					pinctrl_board_nand: nand0-board {
 52						atmel,pins =
 53							<AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PD3 gpio RDY pin pull_up*/
 54							 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PC14 gpio enable pin pull_up */
 55					};
 56				};
 57
 58				mmc {
 59					pinctrl_board_mmc: mmc0-board {
 60						atmel,pins =
 61							<AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD6 gpio CD pin pull_up and deglitch */
 62					};
 63				};
 64			};
 65
 66			mmc0: mmc@fff80000 {
 67				pinctrl-0 = <
 68					&pinctrl_board_mmc
 69					&pinctrl_mmc0_slot0_clk_cmd_dat0
 70					&pinctrl_mmc0_slot0_dat1_3>;
 71				status = "okay";
 72				slot@0 {
 73					reg = <0>;
 74					bus-width = <4>;
 75					cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
 76				};
 77			};
 78
 79			macb0: ethernet@fffbc000 {
 80				phy-mode = "rmii";
 81				status = "okay";
 82			};
 83
 84		};
 85
 86		nand0: nand@40000000 {
 87			nand-bus-width = <8>;
 88			nand-ecc-mode = "soft";
 89			nand-on-flash-bbt;
 90			pinctrl-0 = <&pinctrl_board_nand>;
 91
 92			gpios = <&pioD 3 GPIO_ACTIVE_HIGH
 93				 &pioC 14 GPIO_ACTIVE_HIGH
 94				 0
 95				>;
 96
 97			status = "okay";
 98
 99			at91bootstrap@0 {
100				label = "at91bootstrap";
101				reg = <0x0 0x20000>;
102			};
103
104			barebox@20000 {
105				label = "barebox";
106				reg = <0x20000 0x40000>;
107			};
108
109			bareboxenv@60000 {
110				label = "bareboxenv";
111				reg = <0x60000 0x1A0000>;
112			};
113
114			kernel@200000 {
115				label = "bareboxenv2";
116				reg = <0x200000 0x300000>;
117			};
118
119			kernel@500000 {
120				label = "root";
121				reg = <0x500000 0x400000>;
122			};
123
124			data@900000 {
125				label = "data";
126				reg = <0x900000 0x8340000>;
127			};
128		};
129
130		usb0: ohci@00700000 {
131			status = "okay";
132			num-ports = <2>;
133		};
134
135		usb1: ehci@00800000 {
136			status = "okay";
137		};
138	};
139
140	leds {
141		compatible = "gpio-leds";
142
143		led0 {
144			label = "led0";
145			gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
146			linux,default-trigger = "nand-disk";
147		};
148
149		led1 {
150			label = "led1";
151			gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
152			linux,default-trigger = "heartbeat";
153		};
154	};
155
156	gpio_keys {
157		compatible = "gpio-keys";
158		#address-cells = <1>;
159		#size-cells = <0>;
160
161		right {
162			label = "SW4";
163			gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
164			linux,code = <106>;
165		};
166
167		up {
168			label = "SW3";
169			gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
170			linux,code = <103>;
171		};
172	};
173};