1/*
  2 * Device Tree file for LaCie 2Big NAS
  3 *
  4 * Copyright (C) 2015 Seagate
  5 *
  6 * Author: Simon Guinot <simon.guinot@sequanux.org>
  7 *
  8 * This file is licensed under the terms of the GNU General Public
  9 * License version 2.  This program is licensed "as is" without any
 10 * warranty of any kind, whether express or implied.
 11*/
 12
 13/dts-v1/;
 14
 15#include "kirkwood-netxbig.dtsi"
 16
 17/ {
 18	model = "LaCie 2Big NAS";
 19	compatible = "lacie,nas2big", "lacie,netxbig", "marvell,kirkwood-88f6282", "marvell,kirkwood";
 20
 21	memory {
 22		device_type = "memory";
 23		reg = <0x00000000 0x10000000>;
 24	};
 25
 26	chosen {
 27		bootargs = "console=ttyS0,115200n8";
 28		stdout-path = &uart0;
 29	};
 30
 31	mbus {
 32		pcie-controller {
 33			status = "okay";
 34
 35			pcie@1,0 {
 36				status = "okay";
 37			};
 38		};
 39	};
 40
 41	ocp@f1000000 {
 42		rtc@10300 {
 43			/* The on-chip RTC is not powered (no supercap). */
 44			status = "disabled";
 45		};
 46		spi@10600 {
 47			/*
 48			 * A NAND flash is used instead of an SPI flash for
 49			 * the other netxbig-compatible boards.
 50			 */
 51			status = "disabled";
 52		};
 53	};
 54
 55	fan {
 56		/*
 57		 * An I2C fan controller (GMT G762) is used but alarm is
 58		 * wired to a separate GPIO.
 59		 */
 60		compatible = "gpio-fan";
 61		alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
 62	};
 63
 64	regulators: regulators {
 65		status = "okay";
 66		compatible = "simple-bus";
 67		#address-cells = <1>;
 68		#size-cells = <0>;
 69		pinctrl-names = "default";
 70
 71		regulator@2 {
 72			compatible = "regulator-fixed";
 73			reg = <2>;
 74			regulator-name = "hdd1power";
 75			regulator-min-microvolt = <5000000>;
 76			regulator-max-microvolt = <5000000>;
 77			enable-active-high;
 78			regulator-always-on;
 79			regulator-boot-on;
 80			gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
 81		};
 82		clocks {
 83			g762_clk: g762-oscillator {
 84				compatible = "fixed-clock";
 85				#clock-cells = <0>;
 86				clock-frequency = <32768>;
 87			};
 88		};
 89	};
 90};
 91
 92&mdio {
 93	status = "okay";
 94
 95	ethphy0: ethernet-phy@0 {
 96		reg = <0>;
 97	};
 98};
 99
100&i2c0 {
101	status = "okay";
102
103	/*
104	 * An external I2C RTC (Dallas DS1337S+) is used. This allows
105	 * to power-up the board on an RTC alarm. The external RTC can
106	 * be kept powered, even when the SoC is off.
107	 */
108	rtc@68 {
109		compatible = "dallas,ds1307";
110		reg = <0x68>;
111		interrupts = <43>;
112	};
113	g762@3e {
114		compatible = "gmt,g762";
115		reg = <0x3e>;
116		clocks = <&g762_clk>;
117	};
118};
119
120&nand {
121	chip-delay = <50>;
122	status = "okay";
123
124	partition@0 {
125		label = "U-Boot";
126		reg = <0x0 0x100000>;
127	};
128
129	partition@100000 {
130		label = "uImage";
131		reg = <0x100000 0x1000000>;
132	};
133
134	partition@1100000 {
135		label = "root";
136		reg = <0x1100000 0x8000000>;
137	};
138
139	partition@9100000 {
140		label = "unused";
141		reg = <0x9100000 0x6f00000>;
142	};
143};