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1/*
2 * Copyright 2013 Gateworks Corporation
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13
14/ {
15 /* these are used by bootloader for disabling nodes */
16 aliases {
17 ethernet1 = ð1;
18 led0 = &led0;
19 led1 = &led1;
20 led2 = &led2;
21 nand = &gpmi;
22 ssi0 = &ssi1;
23 usb0 = &usbh1;
24 usb1 = &usbotg;
25 };
26
27 chosen {
28 bootargs = "console=ttymxc1,115200";
29 };
30
31 backlight {
32 compatible = "pwm-backlight";
33 pwms = <&pwm4 0 5000000>;
34 brightness-levels = <0 4 8 16 32 64 128 255>;
35 default-brightness-level = <7>;
36 };
37
38 leds {
39 compatible = "gpio-leds";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_gpio_leds>;
42
43 led0: user1 {
44 label = "user1";
45 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
46 default-state = "on";
47 linux,default-trigger = "heartbeat";
48 };
49
50 led1: user2 {
51 label = "user2";
52 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
53 default-state = "off";
54 };
55
56 led2: user3 {
57 label = "user3";
58 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
59 default-state = "off";
60 };
61 };
62
63 memory {
64 reg = <0x10000000 0x40000000>;
65 };
66
67 pps {
68 compatible = "pps-gpio";
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_pps>;
71 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
72 status = "okay";
73 };
74
75 regulators {
76 compatible = "simple-bus";
77 #address-cells = <1>;
78 #size-cells = <0>;
79
80 reg_1p0v: regulator@0 {
81 compatible = "regulator-fixed";
82 reg = <0>;
83 regulator-name = "1P0V";
84 regulator-min-microvolt = <1000000>;
85 regulator-max-microvolt = <1000000>;
86 regulator-always-on;
87 };
88
89 reg_3p3v: regulator@1 {
90 compatible = "regulator-fixed";
91 reg = <1>;
92 regulator-name = "3P3V";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 regulator-always-on;
96 };
97
98 reg_usb_h1_vbus: regulator@2 {
99 compatible = "regulator-fixed";
100 reg = <2>;
101 regulator-name = "usb_h1_vbus";
102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <5000000>;
104 regulator-always-on;
105 };
106
107 reg_usb_otg_vbus: regulator@3 {
108 compatible = "regulator-fixed";
109 reg = <3>;
110 regulator-name = "usb_otg_vbus";
111 regulator-min-microvolt = <5000000>;
112 regulator-max-microvolt = <5000000>;
113 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
114 enable-active-high;
115 };
116 };
117
118 sound {
119 compatible = "fsl,imx6q-ventana-sgtl5000",
120 "fsl,imx-audio-sgtl5000";
121 model = "sgtl5000-audio";
122 ssi-controller = <&ssi1>;
123 audio-codec = <&codec>;
124 audio-routing =
125 "MIC_IN", "Mic Jack",
126 "Mic Jack", "Mic Bias",
127 "Headphone Jack", "HP_OUT";
128 mux-int-port = <1>;
129 mux-ext-port = <4>;
130 };
131};
132
133&audmux {
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
136 status = "okay";
137};
138
139&can1 {
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_flexcan1>;
142 status = "okay";
143};
144
145&clks {
146 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
147 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
148 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
149 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
150};
151
152&fec {
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_enet>;
155 phy-mode = "rgmii-id";
156 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
157 status = "okay";
158};
159
160&gpmi {
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_gpmi_nand>;
163 status = "okay";
164};
165
166&hdmi {
167 ddc-i2c-bus = <&i2c3>;
168 status = "okay";
169};
170
171&i2c1 {
172 clock-frequency = <100000>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_i2c1>;
175 status = "okay";
176
177 eeprom1: eeprom@50 {
178 compatible = "atmel,24c02";
179 reg = <0x50>;
180 pagesize = <16>;
181 };
182
183 eeprom2: eeprom@51 {
184 compatible = "atmel,24c02";
185 reg = <0x51>;
186 pagesize = <16>;
187 };
188
189 eeprom3: eeprom@52 {
190 compatible = "atmel,24c02";
191 reg = <0x52>;
192 pagesize = <16>;
193 };
194
195 eeprom4: eeprom@53 {
196 compatible = "atmel,24c02";
197 reg = <0x53>;
198 pagesize = <16>;
199 };
200
201 gpio: pca9555@23 {
202 compatible = "nxp,pca9555";
203 reg = <0x23>;
204 gpio-controller;
205 #gpio-cells = <2>;
206 };
207
208 rtc: ds1672@68 {
209 compatible = "dallas,ds1672";
210 reg = <0x68>;
211 };
212};
213
214&i2c2 {
215 clock-frequency = <100000>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_i2c2>;
218 status = "okay";
219
220 pmic: pfuze100@08 {
221 compatible = "fsl,pfuze100";
222 reg = <0x08>;
223
224 regulators {
225 sw1a_reg: sw1ab {
226 regulator-min-microvolt = <300000>;
227 regulator-max-microvolt = <1875000>;
228 regulator-boot-on;
229 regulator-always-on;
230 regulator-ramp-delay = <6250>;
231 };
232
233 sw1c_reg: sw1c {
234 regulator-min-microvolt = <300000>;
235 regulator-max-microvolt = <1875000>;
236 regulator-boot-on;
237 regulator-always-on;
238 regulator-ramp-delay = <6250>;
239 };
240
241 sw2_reg: sw2 {
242 regulator-min-microvolt = <800000>;
243 regulator-max-microvolt = <3950000>;
244 regulator-boot-on;
245 regulator-always-on;
246 };
247
248 sw3a_reg: sw3a {
249 regulator-min-microvolt = <400000>;
250 regulator-max-microvolt = <1975000>;
251 regulator-boot-on;
252 regulator-always-on;
253 };
254
255 sw3b_reg: sw3b {
256 regulator-min-microvolt = <400000>;
257 regulator-max-microvolt = <1975000>;
258 regulator-boot-on;
259 regulator-always-on;
260 };
261
262 sw4_reg: sw4 {
263 regulator-min-microvolt = <800000>;
264 regulator-max-microvolt = <3300000>;
265 };
266
267 swbst_reg: swbst {
268 regulator-min-microvolt = <5000000>;
269 regulator-max-microvolt = <5150000>;
270 regulator-boot-on;
271 regulator-always-on;
272 };
273
274 snvs_reg: vsnvs {
275 regulator-min-microvolt = <1000000>;
276 regulator-max-microvolt = <3000000>;
277 regulator-boot-on;
278 regulator-always-on;
279 };
280
281 vref_reg: vrefddr {
282 regulator-boot-on;
283 regulator-always-on;
284 };
285
286 vgen1_reg: vgen1 {
287 regulator-min-microvolt = <800000>;
288 regulator-max-microvolt = <1550000>;
289 };
290
291 vgen2_reg: vgen2 {
292 regulator-min-microvolt = <800000>;
293 regulator-max-microvolt = <1550000>;
294 };
295
296 vgen3_reg: vgen3 {
297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvolt = <3300000>;
299 };
300
301 vgen4_reg: vgen4 {
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <3300000>;
304 regulator-always-on;
305 };
306
307 vgen5_reg: vgen5 {
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <3300000>;
310 regulator-always-on;
311 };
312
313 vgen6_reg: vgen6 {
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <3300000>;
316 regulator-always-on;
317 };
318 };
319 };
320};
321
322&i2c3 {
323 clock-frequency = <100000>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_i2c3>;
326 status = "okay";
327
328 codec: sgtl5000@0a {
329 compatible = "fsl,sgtl5000";
330 reg = <0x0a>;
331 clocks = <&clks 201>;
332 VDDA-supply = <&sw4_reg>;
333 VDDIO-supply = <®_3p3v>;
334 };
335
336 touchscreen: egalax_ts@04 {
337 compatible = "eeti,egalax_ts";
338 reg = <0x04>;
339 interrupt-parent = <&gpio7>;
340 interrupts = <12 2>;
341 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
342 };
343};
344
345&ldb {
346 status = "okay";
347
348 lvds-channel@0 {
349 fsl,data-mapping = "spwg";
350 fsl,data-width = <18>;
351 status = "okay";
352
353 display-timings {
354 native-mode = <&timing0>;
355 timing0: hsd100pxn1 {
356 clock-frequency = <65000000>;
357 hactive = <1024>;
358 vactive = <768>;
359 hback-porch = <220>;
360 hfront-porch = <40>;
361 vback-porch = <21>;
362 vfront-porch = <7>;
363 hsync-len = <60>;
364 vsync-len = <10>;
365 };
366 };
367 };
368};
369
370&pcie {
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_pcie>;
373 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
374 status = "okay";
375
376 eth1: sky2@8 { /* MAC/PHY on bus 8 */
377 compatible = "marvell,sky2";
378 };
379};
380
381&pwm1 {
382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
384 status = "disabled";
385};
386
387&pwm2 {
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
390 status = "disabled";
391};
392
393&pwm3 {
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
396 status = "disabled";
397};
398
399&pwm4 {
400 pinctrl-names = "default", "state_dio";
401 pinctrl-0 = <&pinctrl_pwm4_backlight>;
402 pinctrl-1 = <&pinctrl_pwm4_dio>;
403 status = "okay";
404};
405
406&ssi1 {
407 status = "okay";
408};
409
410&ssi2 {
411 status = "okay";
412};
413
414&uart1 {
415 pinctrl-names = "default";
416 pinctrl-0 = <&pinctrl_uart1>;
417 status = "okay";
418};
419
420&uart2 {
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_uart2>;
423 status = "okay";
424};
425
426&uart5 {
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_uart5>;
429 status = "okay";
430};
431
432&usbotg {
433 vbus-supply = <®_usb_otg_vbus>;
434 pinctrl-names = "default";
435 pinctrl-0 = <&pinctrl_usbotg>;
436 disable-over-current;
437 status = "okay";
438};
439
440&usbh1 {
441 vbus-supply = <®_usb_h1_vbus>;
442 status = "okay";
443};
444
445&usdhc3 {
446 pinctrl-names = "default", "state_100mhz", "state_200mhz";
447 pinctrl-0 = <&pinctrl_usdhc3>;
448 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
449 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
450 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
451 vmmc-supply = <®_3p3v>;
452 no-1-8-v; /* firmware will remove if board revision supports */
453 status = "okay";
454};
455
456&iomuxc {
457 imx6qdl-gw54xx {
458 pinctrl_audmux: audmuxgrp {
459 fsl,pins = <
460 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
461 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
462 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
463 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
464 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
465 >;
466 };
467
468 pinctrl_enet: enetgrp {
469 fsl,pins = <
470 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
471 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
472 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
473 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
474 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
475 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
476 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
477 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
478 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
479 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
480 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
481 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
482 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
483 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
484 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
485 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
486 >;
487 };
488
489 pinctrl_flexcan1: flexcan1grp {
490 fsl,pins = <
491 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
492 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
493 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
494 >;
495 };
496
497 pinctrl_gpio_leds: gpioledsgrp {
498 fsl,pins = <
499 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
500 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
501 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
502 >;
503 };
504
505 pinctrl_gpmi_nand: gpminandgrp {
506 fsl,pins = <
507 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
508 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
509 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
510 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
511 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
512 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
513 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
514 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
515 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
516 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
517 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
518 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
519 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
520 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
521 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
522 >;
523 };
524
525 pinctrl_i2c1: i2c1grp {
526 fsl,pins = <
527 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
528 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
529 >;
530 };
531
532 pinctrl_i2c2: i2c2grp {
533 fsl,pins = <
534 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
535 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
536 >;
537 };
538
539 pinctrl_i2c3: i2c3grp {
540 fsl,pins = <
541 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
542 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
543 >;
544 };
545
546 pinctrl_pcie: pciegrp {
547 fsl,pins = <
548 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
549 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
550 >;
551 };
552
553 pinctrl_pps: ppsgrp {
554 fsl,pins = <
555 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
556 >;
557 };
558
559 pinctrl_pwm1: pwm1grp {
560 fsl,pins = <
561 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
562 >;
563 };
564
565 pinctrl_pwm2: pwm2grp {
566 fsl,pins = <
567 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
568 >;
569 };
570
571 pinctrl_pwm3: pwm3grp {
572 fsl,pins = <
573 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
574 >;
575 };
576
577 pinctrl_pwm4_backlight: pwm4grpbacklight {
578 fsl,pins = <
579 /* LVDS_PWM J6.5 */
580 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
581 >;
582 };
583
584 pinctrl_pwm4_dio: pwm4grpdio {
585 fsl,pins = <
586 /* DIO3 J16.4 */
587 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
588 >;
589 };
590
591 pinctrl_uart1: uart1grp {
592 fsl,pins = <
593 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
594 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
595 >;
596 };
597
598 pinctrl_uart2: uart2grp {
599 fsl,pins = <
600 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
601 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
602 >;
603 };
604
605 pinctrl_uart5: uart5grp {
606 fsl,pins = <
607 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
608 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
609 >;
610 };
611
612 pinctrl_usbotg: usbotggrp {
613 fsl,pins = <
614 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
615 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
616 >;
617 };
618
619 pinctrl_usdhc3: usdhc3grp {
620 fsl,pins = <
621 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
622 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
623 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
624 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
625 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
626 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
627 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
628 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
629 >;
630 };
631
632 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
633 fsl,pins = <
634 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
635 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
636 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
637 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
638 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
639 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
640 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
641 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
642 >;
643 };
644
645 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
646 fsl,pins = <
647 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
648 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
649 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
650 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
651 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
652 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
653 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
654 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
655 >;
656 };
657 };
658};