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1/*
2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 *
47 */
48
49/dts-v1/;
50#include "imx6q.dtsi"
51#include <dt-bindings/gpio/gpio.h>
52#include <dt-bindings/input/input.h>
53
54/ {
55 model = "Kosagi Novena Dual/Quad";
56 compatible = "kosagi,imx6q-novena", "fsl,imx6q";
57
58 chosen {
59 stdout-path = &uart2;
60 };
61
62 backlight: backlight {
63 compatible = "pwm-backlight";
64 pwms = <&pwm1 0 10000000>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_backlight_novena>;
67 power-supply = <®_lvds_lcd>;
68 brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>;
69 default-brightness-level = <12>;
70 };
71
72 gpio-keys {
73 compatible = "gpio-keys";
74 pinctrl-names = "default";
75 pinctrl-0 = <&pinctrl_gpio_keys_novena>;
76
77 user-button {
78 label = "User Button";
79 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
80 linux,code = <KEY_POWER>;
81 };
82
83 lid {
84 label = "Lid";
85 gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
86 linux,input-type = <5>; /* EV_SW */
87 linux,code = <0>; /* SW_LID */
88 };
89 };
90
91 leds {
92 compatible = "gpio-leds";
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_leds_novena>;
95
96 heartbeat {
97 label = "novena:white:panel";
98 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
99 linux,default-trigger = "default-on";
100 };
101 };
102
103 panel: panel {
104 compatible = "innolux,n133hse-ea1", "simple-panel";
105 backlight = <&backlight>;
106 };
107
108 reg_2p5v: regulator-2p5v {
109 compatible = "regulator-fixed";
110 regulator-name = "2P5V";
111 regulator-min-microvolt = <2500000>;
112 regulator-max-microvolt = <2500000>;
113 regulator-always-on;
114 };
115
116 reg_3p3v: regulator-3p3v {
117 compatible = "regulator-fixed";
118 regulator-name = "3P3V";
119 regulator-min-microvolt = <3300000>;
120 regulator-max-microvolt = <3300000>;
121 regulator-always-on;
122 };
123
124 reg_audio_codec: regulator-audio-codec {
125 compatible = "regulator-fixed";
126 regulator-name = "es8328-power";
127 regulator-boot-on;
128 regulator-min-microvolt = <5000000>;
129 regulator-max-microvolt = <5000000>;
130 startup-delay-us = <400000>;
131 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
132 enable-active-high;
133 };
134
135 reg_display: regulator-display {
136 compatible = "regulator-fixed";
137 regulator-name = "lcd-display-power";
138 regulator-min-microvolt = <3300000>;
139 regulator-max-microvolt = <3300000>;
140 startup-delay-us = <200000>;
141 gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
142 enable-active-high;
143 };
144
145 reg_lvds_lcd: regulator-lvds-lcd {
146 compatible = "regulator-fixed";
147 regulator-name = "lcd-lvds-power";
148 regulator-min-microvolt = <3300000>;
149 regulator-max-microvolt = <3300000>;
150 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
151 enable-active-high;
152 };
153
154 reg_pcie: regulator-pcie {
155 compatible = "regulator-fixed";
156 regulator-name = "pcie-bus-power";
157 regulator-min-microvolt = <1500000>;
158 regulator-max-microvolt = <1500000>;
159 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
160 enable-active-high;
161 regulator-always-on;
162 };
163
164 reg_sata: regulator-sata {
165 compatible = "regulator-fixed";
166 regulator-name = "sata-power";
167 regulator-boot-on;
168 regulator-min-microvolt = <3300000>;
169 regulator-max-microvolt = <3300000>;
170 startup-delay-us = <10000>;
171 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
172 enable-active-high;
173 };
174
175 reg_usb_otg_vbus: regulator-usb-otg-vbus {
176 compatible = "regulator-fixed";
177 regulator-name = "usb_otg_vbus";
178 regulator-min-microvolt = <5000000>;
179 regulator-max-microvolt = <5000000>;
180 enable-active-high;
181 };
182
183 sound {
184 compatible = "fsl,imx-audio-es8328";
185 model = "imx-audio-es8328";
186 ssi-controller = <&ssi1>;
187 audio-codec = <&codec>;
188 audio-amp-supply = <®_audio_codec>;
189 jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>;
190 audio-routing =
191 "Speaker", "LOUT2",
192 "Speaker", "ROUT2",
193 "Speaker", "audio-amp",
194 "Headphone", "ROUT1",
195 "Headphone", "LOUT1",
196 "LINPUT1", "Mic Jack",
197 "RINPUT1", "Mic Jack",
198 "Mic Jack", "Mic Bias";
199 mux-int-port = <0x1>;
200 mux-ext-port = <0x3>;
201 };
202};
203
204&audmux {
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_audmux_novena>;
207 status = "okay";
208};
209
210&ecspi3 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_ecspi3_novena>;
213 fsl,spi-num-chipselects = <3>;
214 status = "okay";
215};
216
217&fec {
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_enet_novena>;
220 phy-mode = "rgmii";
221 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
222 rxc-skew-ps = <3000>;
223 rxdv-skew-ps = <0>;
224 txc-skew-ps = <3000>;
225 txen-skew-ps = <0>;
226 rxd0-skew-ps = <0>;
227 rxd1-skew-ps = <0>;
228 rxd2-skew-ps = <0>;
229 rxd3-skew-ps = <0>;
230 txd0-skew-ps = <3000>;
231 txd1-skew-ps = <3000>;
232 txd2-skew-ps = <3000>;
233 txd3-skew-ps = <3000>;
234 status = "okay";
235};
236
237&hdmi {
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_hdmi_novena>;
240 ddc-i2c-bus = <&i2c2>;
241 status = "okay";
242};
243
244&i2c1 {
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_i2c1_novena>;
247 status = "okay";
248
249 accel: mma8452@1c {
250 compatible = "fsl,mma8452";
251 reg = <0x1c>;
252 };
253
254 rtc: pcf8523@68 {
255 compatible = "nxp,pcf8523";
256 reg = <0x68>;
257 };
258
259 sbs_battery: bq20z75@0b {
260 compatible = "sbs,sbs-battery";
261 reg = <0x0b>;
262 sbs,i2c-retry-count = <50>;
263 };
264
265 touch: stmpe811@44 {
266 compatible = "st,stmpe811";
267 reg = <0x44>;
268 #address-cells = <1>;
269 #size-cells = <0>;
270 irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
271 id = <0>;
272 blocks = <0x5>;
273 irq-trigger = <0x1>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&pinctrl_stmpe_novena>;
276 vio-supply = <®_3p3v>;
277 vcc-supply = <®_3p3v>;
278
279 stmpe_touchscreen {
280 compatible = "st,stmpe-ts";
281 st,sample-time = <4>;
282 st,mod-12b = <1>;
283 st,ref-sel = <0>;
284 st,adc-freq = <1>;
285 st,ave-ctrl = <1>;
286 st,touch-det-delay = <2>;
287 st,settling = <2>;
288 st,fraction-z = <7>;
289 st,i-drive = <1>;
290 };
291 };
292};
293
294&i2c2 {
295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_i2c2_novena>;
297 status = "okay";
298
299 pmic: pfuze100@08 {
300 compatible = "fsl,pfuze100";
301 reg = <0x08>;
302
303 regulators {
304 reg_sw1a: sw1a {
305 regulator-min-microvolt = <300000>;
306 regulator-max-microvolt = <1875000>;
307 regulator-boot-on;
308 regulator-always-on;
309 regulator-ramp-delay = <6250>;
310 };
311
312 reg_sw1c: sw1c {
313 regulator-min-microvolt = <300000>;
314 regulator-max-microvolt = <1875000>;
315 regulator-boot-on;
316 regulator-always-on;
317 };
318
319 reg_sw2: sw2 {
320 regulator-min-microvolt = <800000>;
321 regulator-max-microvolt = <3300000>;
322 regulator-boot-on;
323 regulator-always-on;
324 };
325
326 reg_sw3a: sw3a {
327 regulator-min-microvolt = <400000>;
328 regulator-max-microvolt = <1975000>;
329 regulator-boot-on;
330 regulator-always-on;
331 };
332
333 reg_sw3b: sw3b {
334 regulator-min-microvolt = <400000>;
335 regulator-max-microvolt = <1975000>;
336 regulator-boot-on;
337 regulator-always-on;
338 };
339
340 reg_sw4: sw4 {
341 regulator-min-microvolt = <800000>;
342 regulator-max-microvolt = <3300000>;
343 };
344
345 reg_swbst: swbst {
346 regulator-min-microvolt = <5000000>;
347 regulator-max-microvolt = <5150000>;
348 regulator-boot-on;
349 };
350
351 reg_snvs: vsnvs {
352 regulator-min-microvolt = <1000000>;
353 regulator-max-microvolt = <3000000>;
354 regulator-boot-on;
355 regulator-always-on;
356 };
357
358 reg_vref: vrefddr {
359 regulator-boot-on;
360 regulator-always-on;
361 };
362
363 reg_vgen1: vgen1 {
364 regulator-min-microvolt = <800000>;
365 regulator-max-microvolt = <1550000>;
366 };
367
368 reg_vgen2: vgen2 {
369 regulator-min-microvolt = <800000>;
370 regulator-max-microvolt = <1550000>;
371 };
372
373 reg_vgen3: vgen3 {
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <3300000>;
376 };
377
378 reg_vgen4: vgen4 {
379 regulator-min-microvolt = <1800000>;
380 regulator-max-microvolt = <3300000>;
381 regulator-always-on;
382 };
383
384 reg_vgen5: vgen5 {
385 regulator-min-microvolt = <1800000>;
386 regulator-max-microvolt = <3300000>;
387 regulator-always-on;
388 };
389
390 reg_vgen6: vgen6 {
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <3300000>;
393 regulator-always-on;
394 };
395 };
396 };
397};
398
399&i2c3 {
400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_i2c3_novena>;
402 status = "okay";
403
404 codec: es8328@11 {
405 compatible = "everest,es8328";
406 reg = <0x11>;
407 DVDD-supply = <®_audio_codec>;
408 AVDD-supply = <®_audio_codec>;
409 PVDD-supply = <®_audio_codec>;
410 HPVDD-supply = <®_audio_codec>;
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_sound_novena>;
413 clocks = <&clks IMX6QDL_CLK_CKO1>;
414 assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
415 <&clks IMX6QDL_CLK_CKO1_SEL>,
416 <&clks IMX6QDL_CLK_PLL4_AUDIO>,
417 <&clks IMX6QDL_CLK_CKO1>;
418 assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>,
419 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
420 <&clks IMX6QDL_CLK_OSC>,
421 <&clks IMX6QDL_CLK_CKO1_PODF>;
422 assigned-clock-rates = <0 0 722534400 22579200>;
423 };
424};
425
426&kpp {
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_kpp_novena>;
429 linux,keymap = <
430 MATRIX_KEY(1, 1, KEY_CONFIG)
431 >;
432 status = "okay";
433};
434
435&ldb {
436 fsl,dual-channel;
437 status = "okay";
438
439 lvds-channel@0 {
440 fsl,data-mapping = "jeida";
441 fsl,data-width = <24>;
442 fsl,panel = <&panel>;
443 status = "okay";
444 };
445};
446
447&pcie {
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_pcie_novena>;
450 reset-gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
451 status = "okay";
452};
453
454&sata {
455 target-supply = <®_sata>;
456 fsl,transmit-level-mV = <1025>;
457 fsl,transmit-boost-mdB = <0>;
458 fsl,transmit-atten-16ths = <8>;
459 status = "okay";
460};
461
462&ssi1 {
463 status = "okay";
464};
465
466&uart2 {
467 pinctrl-names = "default";
468 pinctrl-0 = <&pinctrl_uart2_novena>;
469 status = "okay";
470};
471
472&uart3 {
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_uart3_novena>;
475 status = "okay";
476};
477
478&uart4 {
479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_uart4_novena>;
481 status = "okay";
482};
483
484&usbotg {
485 vbus-supply = <®_usb_otg_vbus>;
486 dr_mode = "otg";
487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_usbotg_novena>;
489 disable-over-current;
490 status = "okay";
491};
492
493&usbh1 {
494 vbus-supply = <®_swbst>;
495 status = "okay";
496};
497
498&usdhc2 {
499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_usdhc2_novena>;
501 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
502 wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
503 bus-width = <4>;
504 status = "okay";
505};
506
507&usdhc3 {
508 pinctrl-names = "default";
509 pinctrl-0 = <&pinctrl_usdhc3_novena>;
510 bus-width = <4>;
511 non-removable;
512 status = "okay";
513};
514
515&iomuxc {
516 pinctrl_audmux_novena: audmuxgrp-novena {
517 fsl,pins = <
518 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
519 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
520 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
521 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
522 >;
523 };
524
525 pinctrl_backlight_novena: backlightgrp-novena {
526 fsl,pins = <
527 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
528 MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b1
529 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1
530 >;
531 };
532
533 pinctrl_ecspi3_novena: ecspi3grp-novena {
534 fsl,pins = <
535 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
536 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
537 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
538 >;
539 };
540
541 pinctrl_enet_novena: enetgrp-novena {
542 fsl,pins = <
543 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
544 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
545 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
546 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b028
547 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b028
548 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b028
549 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028
550 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028
551 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
552 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
553 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
554 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
555 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
556 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
557 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
558 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
559 /* Ethernet reset */
560 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1
561 >;
562 };
563
564 pinctrl_fpga_gpio: fpgagpiogrp-novena {
565 fsl,pins = <
566 /* FPGA power */
567 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1
568 /* Reset */
569 MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
570 /* FPGA GPIOs */
571 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b1
572 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b1
573 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1
574 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b1
575 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1
576 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1
577 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b1
578 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b1
579 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b1
580 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b1
581 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b1
582 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b1
583 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b1
584 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b1
585 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b1
586 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b1
587 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1
588 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b1
589 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1
590 MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1
591 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
592 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b1
593 MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b0b1
594 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b1
595 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b1
596 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b1
597 >;
598 };
599
600 pinctrl_fpga_eim: fpgaeimgrp-novena {
601 fsl,pins = <
602 /* FPGA power */
603 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1
604 /* Reset */
605 MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
606 /* FPGA GPIOs */
607 MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0f1
608 MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0f1
609 MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0f1
610 MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0f1
611 MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0f1
612 MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0f1
613 MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0f1
614 MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0f1
615 MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0f1
616 MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0f1
617 MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0f1
618 MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0f1
619 MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0f1
620 MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0f1
621 MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0f1
622 MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0f1
623 MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0f1
624 MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0f1
625 MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0f1
626 MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0f1
627 MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0f1
628 MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0f1
629 MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0f1
630 MX6QDL_PAD_EIM_RW__EIM_RW 0xb0f1
631 MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb0f1
632 MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0f1
633 >;
634 };
635
636 pinctrl_gpio_keys_novena: gpiokeysgrp-novena {
637 fsl,pins = <
638 /* User button */
639 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
640 /* PCIe Wakeup */
641 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1f0e0
642 /* Lid switch */
643 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
644 >;
645 };
646
647 pinctrl_hdmi_novena: hdmigrp-novena {
648 fsl,pins = <
649 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
650 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b1
651 >;
652 };
653
654 pinctrl_i2c1_novena: i2c1grp-novena {
655 fsl,pins = <
656 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
657 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
658 >;
659 };
660
661 pinctrl_i2c2_novena: i2c2grp-novena {
662 fsl,pins = <
663 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
664 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
665 >;
666 };
667
668 pinctrl_i2c3_novena: i2c3grp-novena {
669 fsl,pins = <
670 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
671 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
672 >;
673 };
674
675 pinctrl_kpp_novena: kppgrp-novena {
676 fsl,pins = <
677 /* Front panel button */
678 MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x1b0b1
679 /* Fake column driver, not connected */
680 MX6QDL_PAD_KEY_COL1__KEY_COL1 0x1b0b1
681 >;
682 };
683
684 pinctrl_leds_novena: ledsgrp-novena {
685 fsl,pins = <
686 MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b1
687 >;
688 };
689
690 pinctrl_pcie_novena: pciegrp-novena {
691 fsl,pins = <
692 /* Reset */
693 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1
694 /* Power On */
695 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
696 /* Wifi kill */
697 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b1
698 >;
699 };
700
701 pinctrl_sata_novena: satagrp-novena {
702 fsl,pins = <
703 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b1
704 >;
705 };
706
707 pinctrl_senoko_novena: senokogrp-novena {
708 fsl,pins = <
709 /* Senoko IRQ line */
710 MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x13048
711 /* Senoko reset line */
712 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1
713 >;
714 };
715
716 pinctrl_sound_novena: soundgrp-novena {
717 fsl,pins = <
718 /* Audio power regulator */
719 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b1
720 /* Headphone plug */
721 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b1
722 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
723 >;
724 };
725
726 pinctrl_stmpe_novena: stmpegrp-novena {
727 fsl,pins = <
728 /* Touchscreen interrupt */
729 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b1
730 >;
731 };
732
733 pinctrl_uart2_novena: uart2grp-novena {
734 fsl,pins = <
735 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
736 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
737 >;
738 };
739
740 pinctrl_uart3_novena: uart3grp-novena {
741 fsl,pins = <
742 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
743 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
744 >;
745 };
746
747 pinctrl_uart4_novena: uart4grp-novena {
748 fsl,pins = <
749 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
750 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
751 >;
752 };
753
754 pinctrl_usbotg_novena: usbotggrp-novena {
755 fsl,pins = <
756 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
757 >;
758 };
759
760 pinctrl_usdhc2_novena: usdhc2grp-novena {
761 fsl,pins = <
762 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
763 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
764 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
765 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
766 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
767 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
768 /* Write protect */
769 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
770 /* Card detect */
771 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1
772 >;
773 };
774
775 pinctrl_usdhc3_novena: usdhc3grp-novena {
776 fsl,pins = <
777 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
778 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
779 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
780 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
781 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
782 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
783 >;
784 };
785};