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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ST EHCI driver
4 *
5 * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
6 *
7 * Author: Peter Griffin <peter.griffin@linaro.org>
8 *
9 * Derived from ehci-platform.c
10 */
11
12#include <linux/clk.h>
13#include <linux/dma-mapping.h>
14#include <linux/err.h>
15#include <linux/kernel.h>
16#include <linux/hrtimer.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/phy/phy.h>
21#include <linux/platform_device.h>
22#include <linux/reset.h>
23#include <linux/usb.h>
24#include <linux/usb/hcd.h>
25#include <linux/usb/ehci_pdriver.h>
26#include <linux/pinctrl/consumer.h>
27
28#include "ehci.h"
29
30#define USB_MAX_CLKS 3
31
32struct st_ehci_platform_priv {
33 struct clk *clks[USB_MAX_CLKS];
34 struct clk *clk48;
35 struct reset_control *rst;
36 struct reset_control *pwr;
37 struct phy *phy;
38};
39
40#define DRIVER_DESC "EHCI STMicroelectronics driver"
41
42#define hcd_to_ehci_priv(h) \
43 ((struct st_ehci_platform_priv *)hcd_to_ehci(h)->priv)
44
45#define EHCI_CAPS_SIZE 0x10
46#define AHB2STBUS_INSREG01 (EHCI_CAPS_SIZE + 0x84)
47
48static int st_ehci_platform_reset(struct usb_hcd *hcd)
49{
50 struct platform_device *pdev = to_platform_device(hcd->self.controller);
51 struct usb_ehci_pdata *pdata = dev_get_platdata(&pdev->dev);
52 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
53 u32 threshold;
54
55 /* Set EHCI packet buffer IN/OUT threshold to 128 bytes */
56 threshold = 128 | (128 << 16);
57 writel(threshold, hcd->regs + AHB2STBUS_INSREG01);
58
59 ehci->caps = hcd->regs + pdata->caps_offset;
60 return ehci_setup(hcd);
61}
62
63static int st_ehci_platform_power_on(struct platform_device *dev)
64{
65 struct usb_hcd *hcd = platform_get_drvdata(dev);
66 struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
67 int clk, ret;
68
69 ret = reset_control_deassert(priv->pwr);
70 if (ret)
71 return ret;
72
73 ret = reset_control_deassert(priv->rst);
74 if (ret)
75 goto err_assert_power;
76
77 /* some SoCs don't have a dedicated 48Mhz clock, but those that do
78 need the rate to be explicitly set */
79 if (priv->clk48) {
80 ret = clk_set_rate(priv->clk48, 48000000);
81 if (ret)
82 goto err_assert_reset;
83 }
84
85 for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) {
86 ret = clk_prepare_enable(priv->clks[clk]);
87 if (ret)
88 goto err_disable_clks;
89 }
90
91 ret = phy_init(priv->phy);
92 if (ret)
93 goto err_disable_clks;
94
95 ret = phy_power_on(priv->phy);
96 if (ret)
97 goto err_exit_phy;
98
99 return 0;
100
101err_exit_phy:
102 phy_exit(priv->phy);
103err_disable_clks:
104 while (--clk >= 0)
105 clk_disable_unprepare(priv->clks[clk]);
106err_assert_reset:
107 reset_control_assert(priv->rst);
108err_assert_power:
109 reset_control_assert(priv->pwr);
110
111 return ret;
112}
113
114static void st_ehci_platform_power_off(struct platform_device *dev)
115{
116 struct usb_hcd *hcd = platform_get_drvdata(dev);
117 struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
118 int clk;
119
120 reset_control_assert(priv->pwr);
121
122 reset_control_assert(priv->rst);
123
124 phy_power_off(priv->phy);
125
126 phy_exit(priv->phy);
127
128 for (clk = USB_MAX_CLKS - 1; clk >= 0; clk--)
129 if (priv->clks[clk])
130 clk_disable_unprepare(priv->clks[clk]);
131
132}
133
134static struct hc_driver __read_mostly ehci_platform_hc_driver;
135
136static const struct ehci_driver_overrides platform_overrides __initconst = {
137 .reset = st_ehci_platform_reset,
138 .extra_priv_size = sizeof(struct st_ehci_platform_priv),
139};
140
141static struct usb_ehci_pdata ehci_platform_defaults = {
142 .power_on = st_ehci_platform_power_on,
143 .power_suspend = st_ehci_platform_power_off,
144 .power_off = st_ehci_platform_power_off,
145};
146
147static int st_ehci_platform_probe(struct platform_device *dev)
148{
149 struct usb_hcd *hcd;
150 struct resource *res_mem;
151 struct usb_ehci_pdata *pdata = &ehci_platform_defaults;
152 struct st_ehci_platform_priv *priv;
153 int err, irq, clk = 0;
154
155 if (usb_disabled())
156 return -ENODEV;
157
158 irq = platform_get_irq(dev, 0);
159 if (irq < 0)
160 return irq;
161
162 hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev,
163 dev_name(&dev->dev));
164 if (!hcd)
165 return -ENOMEM;
166
167 platform_set_drvdata(dev, hcd);
168 dev->dev.platform_data = pdata;
169 priv = hcd_to_ehci_priv(hcd);
170
171 priv->phy = devm_phy_get(&dev->dev, "usb");
172 if (IS_ERR(priv->phy)) {
173 err = PTR_ERR(priv->phy);
174 goto err_put_hcd;
175 }
176
177 for (clk = 0; clk < USB_MAX_CLKS; clk++) {
178 priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);
179 if (IS_ERR(priv->clks[clk])) {
180 err = PTR_ERR(priv->clks[clk]);
181 if (err == -EPROBE_DEFER)
182 goto err_put_clks;
183 priv->clks[clk] = NULL;
184 break;
185 }
186 }
187
188 /* some SoCs don't have a dedicated 48Mhz clock, but those that
189 do need the rate to be explicitly set */
190 priv->clk48 = devm_clk_get(&dev->dev, "clk48");
191 if (IS_ERR(priv->clk48)) {
192 dev_info(&dev->dev, "48MHz clk not found\n");
193 priv->clk48 = NULL;
194 }
195
196 priv->pwr =
197 devm_reset_control_get_optional_shared(&dev->dev, "power");
198 if (IS_ERR(priv->pwr)) {
199 err = PTR_ERR(priv->pwr);
200 if (err == -EPROBE_DEFER)
201 goto err_put_clks;
202 priv->pwr = NULL;
203 }
204
205 priv->rst =
206 devm_reset_control_get_optional_shared(&dev->dev, "softreset");
207 if (IS_ERR(priv->rst)) {
208 err = PTR_ERR(priv->rst);
209 if (err == -EPROBE_DEFER)
210 goto err_put_clks;
211 priv->rst = NULL;
212 }
213
214 if (pdata->power_on) {
215 err = pdata->power_on(dev);
216 if (err < 0)
217 goto err_put_clks;
218 }
219
220 hcd->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res_mem);
221 if (IS_ERR(hcd->regs)) {
222 err = PTR_ERR(hcd->regs);
223 goto err_put_clks;
224 }
225 hcd->rsrc_start = res_mem->start;
226 hcd->rsrc_len = resource_size(res_mem);
227
228 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
229 if (err)
230 goto err_put_clks;
231
232 device_wakeup_enable(hcd->self.controller);
233 platform_set_drvdata(dev, hcd);
234
235 return err;
236
237err_put_clks:
238 while (--clk >= 0)
239 clk_put(priv->clks[clk]);
240err_put_hcd:
241 if (pdata == &ehci_platform_defaults)
242 dev->dev.platform_data = NULL;
243
244 usb_put_hcd(hcd);
245
246 return err;
247}
248
249static void st_ehci_platform_remove(struct platform_device *dev)
250{
251 struct usb_hcd *hcd = platform_get_drvdata(dev);
252 struct usb_ehci_pdata *pdata = dev_get_platdata(&dev->dev);
253 struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
254 int clk;
255
256 usb_remove_hcd(hcd);
257
258 if (pdata->power_off)
259 pdata->power_off(dev);
260
261 for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++)
262 clk_put(priv->clks[clk]);
263
264 usb_put_hcd(hcd);
265
266 if (pdata == &ehci_platform_defaults)
267 dev->dev.platform_data = NULL;
268}
269
270#ifdef CONFIG_PM_SLEEP
271
272static int st_ehci_suspend(struct device *dev)
273{
274 struct usb_hcd *hcd = dev_get_drvdata(dev);
275 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
276 struct platform_device *pdev = to_platform_device(dev);
277 bool do_wakeup = device_may_wakeup(dev);
278 int ret;
279
280 ret = ehci_suspend(hcd, do_wakeup);
281 if (ret)
282 return ret;
283
284 if (pdata->power_suspend)
285 pdata->power_suspend(pdev);
286
287 pinctrl_pm_select_sleep_state(dev);
288
289 return ret;
290}
291
292static int st_ehci_resume(struct device *dev)
293{
294 struct usb_hcd *hcd = dev_get_drvdata(dev);
295 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
296 struct platform_device *pdev = to_platform_device(dev);
297 int err;
298
299 pinctrl_pm_select_default_state(dev);
300
301 if (pdata->power_on) {
302 err = pdata->power_on(pdev);
303 if (err < 0)
304 return err;
305 }
306
307 ehci_resume(hcd, false);
308 return 0;
309}
310
311static SIMPLE_DEV_PM_OPS(st_ehci_pm_ops, st_ehci_suspend, st_ehci_resume);
312
313#endif /* CONFIG_PM_SLEEP */
314
315static const struct of_device_id st_ehci_ids[] = {
316 { .compatible = "st,st-ehci-300x", },
317 { /* sentinel */ }
318};
319MODULE_DEVICE_TABLE(of, st_ehci_ids);
320
321static struct platform_driver ehci_platform_driver = {
322 .probe = st_ehci_platform_probe,
323 .remove_new = st_ehci_platform_remove,
324 .shutdown = usb_hcd_platform_shutdown,
325 .driver = {
326 .name = "st-ehci",
327#ifdef CONFIG_PM_SLEEP
328 .pm = &st_ehci_pm_ops,
329#endif
330 .of_match_table = st_ehci_ids,
331 }
332};
333
334static int __init ehci_platform_init(void)
335{
336 if (usb_disabled())
337 return -ENODEV;
338
339 ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
340 return platform_driver_register(&ehci_platform_driver);
341}
342module_init(ehci_platform_init);
343
344static void __exit ehci_platform_cleanup(void)
345{
346 platform_driver_unregister(&ehci_platform_driver);
347}
348module_exit(ehci_platform_cleanup);
349
350MODULE_DESCRIPTION(DRIVER_DESC);
351MODULE_AUTHOR("Peter Griffin <peter.griffin@linaro.org>");
352MODULE_LICENSE("GPL");
1/*
2 * ST EHCI driver
3 *
4 * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
5 *
6 * Author: Peter Griffin <peter.griffin@linaro.org>
7 *
8 * Derived from ehci-platform.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/clk.h>
16#include <linux/dma-mapping.h>
17#include <linux/err.h>
18#include <linux/kernel.h>
19#include <linux/hrtimer.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/phy/phy.h>
24#include <linux/platform_device.h>
25#include <linux/reset.h>
26#include <linux/usb.h>
27#include <linux/usb/hcd.h>
28#include <linux/usb/ehci_pdriver.h>
29
30#include "ehci.h"
31
32#define USB_MAX_CLKS 3
33
34struct st_ehci_platform_priv {
35 struct clk *clks[USB_MAX_CLKS];
36 struct clk *clk48;
37 struct reset_control *rst;
38 struct reset_control *pwr;
39 struct phy *phy;
40};
41
42#define DRIVER_DESC "EHCI STMicroelectronics driver"
43
44#define hcd_to_ehci_priv(h) \
45 ((struct st_ehci_platform_priv *)hcd_to_ehci(h)->priv)
46
47static const char hcd_name[] = "ehci-st";
48
49#define EHCI_CAPS_SIZE 0x10
50#define AHB2STBUS_INSREG01 (EHCI_CAPS_SIZE + 0x84)
51
52static int st_ehci_platform_reset(struct usb_hcd *hcd)
53{
54 struct platform_device *pdev = to_platform_device(hcd->self.controller);
55 struct usb_ehci_pdata *pdata = dev_get_platdata(&pdev->dev);
56 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
57 u32 threshold;
58
59 /* Set EHCI packet buffer IN/OUT threshold to 128 bytes */
60 threshold = 128 | (128 << 16);
61 writel(threshold, hcd->regs + AHB2STBUS_INSREG01);
62
63 ehci->caps = hcd->regs + pdata->caps_offset;
64 return ehci_setup(hcd);
65}
66
67static int st_ehci_platform_power_on(struct platform_device *dev)
68{
69 struct usb_hcd *hcd = platform_get_drvdata(dev);
70 struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
71 int clk, ret;
72
73 ret = reset_control_deassert(priv->pwr);
74 if (ret)
75 return ret;
76
77 ret = reset_control_deassert(priv->rst);
78 if (ret)
79 goto err_assert_power;
80
81 /* some SoCs don't have a dedicated 48Mhz clock, but those that do
82 need the rate to be explicitly set */
83 if (priv->clk48) {
84 ret = clk_set_rate(priv->clk48, 48000000);
85 if (ret)
86 goto err_assert_reset;
87 }
88
89 for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) {
90 ret = clk_prepare_enable(priv->clks[clk]);
91 if (ret)
92 goto err_disable_clks;
93 }
94
95 ret = phy_init(priv->phy);
96 if (ret)
97 goto err_disable_clks;
98
99 ret = phy_power_on(priv->phy);
100 if (ret)
101 goto err_exit_phy;
102
103 return 0;
104
105err_exit_phy:
106 phy_exit(priv->phy);
107err_disable_clks:
108 while (--clk >= 0)
109 clk_disable_unprepare(priv->clks[clk]);
110err_assert_reset:
111 reset_control_assert(priv->rst);
112err_assert_power:
113 reset_control_assert(priv->pwr);
114
115 return ret;
116}
117
118static void st_ehci_platform_power_off(struct platform_device *dev)
119{
120 struct usb_hcd *hcd = platform_get_drvdata(dev);
121 struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
122 int clk;
123
124 reset_control_assert(priv->pwr);
125
126 reset_control_assert(priv->rst);
127
128 phy_power_off(priv->phy);
129
130 phy_exit(priv->phy);
131
132 for (clk = USB_MAX_CLKS - 1; clk >= 0; clk--)
133 if (priv->clks[clk])
134 clk_disable_unprepare(priv->clks[clk]);
135
136}
137
138static struct hc_driver __read_mostly ehci_platform_hc_driver;
139
140static const struct ehci_driver_overrides platform_overrides __initconst = {
141 .reset = st_ehci_platform_reset,
142 .extra_priv_size = sizeof(struct st_ehci_platform_priv),
143};
144
145static struct usb_ehci_pdata ehci_platform_defaults = {
146 .power_on = st_ehci_platform_power_on,
147 .power_suspend = st_ehci_platform_power_off,
148 .power_off = st_ehci_platform_power_off,
149};
150
151static int st_ehci_platform_probe(struct platform_device *dev)
152{
153 struct usb_hcd *hcd;
154 struct resource *res_mem;
155 struct usb_ehci_pdata *pdata = &ehci_platform_defaults;
156 struct st_ehci_platform_priv *priv;
157 struct ehci_hcd *ehci;
158 int err, irq, clk = 0;
159
160 if (usb_disabled())
161 return -ENODEV;
162
163 irq = platform_get_irq(dev, 0);
164 if (irq < 0) {
165 dev_err(&dev->dev, "no irq provided");
166 return irq;
167 }
168 res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
169 if (!res_mem) {
170 dev_err(&dev->dev, "no memory resource provided");
171 return -ENXIO;
172 }
173
174 hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev,
175 dev_name(&dev->dev));
176 if (!hcd)
177 return -ENOMEM;
178
179 platform_set_drvdata(dev, hcd);
180 dev->dev.platform_data = pdata;
181 priv = hcd_to_ehci_priv(hcd);
182 ehci = hcd_to_ehci(hcd);
183
184 priv->phy = devm_phy_get(&dev->dev, "usb");
185 if (IS_ERR(priv->phy)) {
186 err = PTR_ERR(priv->phy);
187 goto err_put_hcd;
188 }
189
190 for (clk = 0; clk < USB_MAX_CLKS; clk++) {
191 priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);
192 if (IS_ERR(priv->clks[clk])) {
193 err = PTR_ERR(priv->clks[clk]);
194 if (err == -EPROBE_DEFER)
195 goto err_put_clks;
196 priv->clks[clk] = NULL;
197 break;
198 }
199 }
200
201 /* some SoCs don't have a dedicated 48Mhz clock, but those that
202 do need the rate to be explicitly set */
203 priv->clk48 = devm_clk_get(&dev->dev, "clk48");
204 if (IS_ERR(priv->clk48)) {
205 dev_info(&dev->dev, "48MHz clk not found\n");
206 priv->clk48 = NULL;
207 }
208
209 priv->pwr = devm_reset_control_get_optional(&dev->dev, "power");
210 if (IS_ERR(priv->pwr)) {
211 err = PTR_ERR(priv->pwr);
212 if (err == -EPROBE_DEFER)
213 goto err_put_clks;
214 priv->pwr = NULL;
215 }
216
217 priv->rst = devm_reset_control_get_optional(&dev->dev, "softreset");
218 if (IS_ERR(priv->rst)) {
219 err = PTR_ERR(priv->rst);
220 if (err == -EPROBE_DEFER)
221 goto err_put_clks;
222 priv->rst = NULL;
223 }
224
225 if (pdata->power_on) {
226 err = pdata->power_on(dev);
227 if (err < 0)
228 goto err_put_clks;
229 }
230
231 hcd->rsrc_start = res_mem->start;
232 hcd->rsrc_len = resource_size(res_mem);
233
234 hcd->regs = devm_ioremap_resource(&dev->dev, res_mem);
235 if (IS_ERR(hcd->regs)) {
236 err = PTR_ERR(hcd->regs);
237 goto err_put_clks;
238 }
239
240 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
241 if (err)
242 goto err_put_clks;
243
244 device_wakeup_enable(hcd->self.controller);
245 platform_set_drvdata(dev, hcd);
246
247 return err;
248
249err_put_clks:
250 while (--clk >= 0)
251 clk_put(priv->clks[clk]);
252err_put_hcd:
253 if (pdata == &ehci_platform_defaults)
254 dev->dev.platform_data = NULL;
255
256 usb_put_hcd(hcd);
257
258 return err;
259}
260
261static int st_ehci_platform_remove(struct platform_device *dev)
262{
263 struct usb_hcd *hcd = platform_get_drvdata(dev);
264 struct usb_ehci_pdata *pdata = dev_get_platdata(&dev->dev);
265 struct st_ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
266 int clk;
267
268 usb_remove_hcd(hcd);
269
270 if (pdata->power_off)
271 pdata->power_off(dev);
272
273 for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++)
274 clk_put(priv->clks[clk]);
275
276 usb_put_hcd(hcd);
277
278 if (pdata == &ehci_platform_defaults)
279 dev->dev.platform_data = NULL;
280
281 return 0;
282}
283
284#ifdef CONFIG_PM_SLEEP
285
286static int st_ehci_suspend(struct device *dev)
287{
288 struct usb_hcd *hcd = dev_get_drvdata(dev);
289 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
290 struct platform_device *pdev = to_platform_device(dev);
291 bool do_wakeup = device_may_wakeup(dev);
292 int ret;
293
294 ret = ehci_suspend(hcd, do_wakeup);
295 if (ret)
296 return ret;
297
298 if (pdata->power_suspend)
299 pdata->power_suspend(pdev);
300
301 pinctrl_pm_select_sleep_state(dev);
302
303 return ret;
304}
305
306static int st_ehci_resume(struct device *dev)
307{
308 struct usb_hcd *hcd = dev_get_drvdata(dev);
309 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
310 struct platform_device *pdev = to_platform_device(dev);
311 int err;
312
313 pinctrl_pm_select_default_state(dev);
314
315 if (pdata->power_on) {
316 err = pdata->power_on(pdev);
317 if (err < 0)
318 return err;
319 }
320
321 ehci_resume(hcd, false);
322 return 0;
323}
324
325static SIMPLE_DEV_PM_OPS(st_ehci_pm_ops, st_ehci_suspend, st_ehci_resume);
326
327#endif /* CONFIG_PM_SLEEP */
328
329static const struct of_device_id st_ehci_ids[] = {
330 { .compatible = "st,st-ehci-300x", },
331 { /* sentinel */ }
332};
333MODULE_DEVICE_TABLE(of, st_ehci_ids);
334
335static struct platform_driver ehci_platform_driver = {
336 .probe = st_ehci_platform_probe,
337 .remove = st_ehci_platform_remove,
338 .shutdown = usb_hcd_platform_shutdown,
339 .driver = {
340 .name = "st-ehci",
341#ifdef CONFIG_PM_SLEEP
342 .pm = &st_ehci_pm_ops,
343#endif
344 .of_match_table = st_ehci_ids,
345 }
346};
347
348static int __init ehci_platform_init(void)
349{
350 if (usb_disabled())
351 return -ENODEV;
352
353 pr_info("%s: " DRIVER_DESC "\n", hcd_name);
354
355 ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
356 return platform_driver_register(&ehci_platform_driver);
357}
358module_init(ehci_platform_init);
359
360static void __exit ehci_platform_cleanup(void)
361{
362 platform_driver_unregister(&ehci_platform_driver);
363}
364module_exit(ehci_platform_cleanup);
365
366MODULE_DESCRIPTION(DRIVER_DESC);
367MODULE_AUTHOR("Peter Griffin <peter.griffin@linaro.org>");
368MODULE_LICENSE("GPL");