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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * PCI glue driver for SPI PXA2xx compatible controllers.
4 * CE4100's SPI device is more or less the same one as found on PXA.
5 *
6 * Copyright (C) 2016, 2021 Intel Corporation
7 */
8#include <linux/clk-provider.h>
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/platform_device.h>
12
13#include <linux/spi/pxa2xx_spi.h>
14
15#include <linux/dmaengine.h>
16#include <linux/platform_data/dma-dw.h>
17
18#define PCI_DEVICE_ID_INTEL_QUARK_X1000 0x0935
19#define PCI_DEVICE_ID_INTEL_BYT 0x0f0e
20#define PCI_DEVICE_ID_INTEL_MRFLD 0x1194
21#define PCI_DEVICE_ID_INTEL_BSW0 0x228e
22#define PCI_DEVICE_ID_INTEL_BSW1 0x2290
23#define PCI_DEVICE_ID_INTEL_BSW2 0x22ac
24#define PCI_DEVICE_ID_INTEL_CE4100 0x2e6a
25#define PCI_DEVICE_ID_INTEL_LPT0_0 0x9c65
26#define PCI_DEVICE_ID_INTEL_LPT0_1 0x9c66
27#define PCI_DEVICE_ID_INTEL_LPT1_0 0x9ce5
28#define PCI_DEVICE_ID_INTEL_LPT1_1 0x9ce6
29
30struct pxa_spi_info {
31 int (*setup)(struct pci_dev *pdev, struct pxa2xx_spi_controller *c);
32};
33
34static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
35static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
36
37static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
38static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
39static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
40static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
41static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
42static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
43
44static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
45static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
46static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
47static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
48static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
49static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
50
51static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
52static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
53static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
54static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
55
56static void pxa2xx_spi_pci_clk_unregister(void *clk)
57{
58 clk_unregister(clk);
59}
60
61static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp,
62 unsigned long rate)
63{
64 char buf[40];
65
66 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
67 ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
68 if (IS_ERR(ssp->clk))
69 return PTR_ERR(ssp->clk);
70
71 return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);
72}
73
74static bool lpss_dma_filter(struct dma_chan *chan, void *param)
75{
76 struct dw_dma_slave *dws = param;
77
78 if (dws->dma_dev != chan->device->dev)
79 return false;
80
81 chan->private = dws;
82 return true;
83}
84
85static void lpss_dma_put_device(void *dma_dev)
86{
87 pci_dev_put(dma_dev);
88}
89
90static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
91{
92 struct ssp_device *ssp = &c->ssp;
93 struct dw_dma_slave *tx, *rx;
94 struct pci_dev *dma_dev;
95 int ret;
96
97 switch (dev->device) {
98 case PCI_DEVICE_ID_INTEL_BYT:
99 ssp->type = LPSS_BYT_SSP;
100 ssp->port_id = 0;
101 c->tx_param = &byt_tx_param;
102 c->rx_param = &byt_rx_param;
103 break;
104 case PCI_DEVICE_ID_INTEL_BSW0:
105 ssp->type = LPSS_BSW_SSP;
106 ssp->port_id = 0;
107 c->tx_param = &bsw0_tx_param;
108 c->rx_param = &bsw0_rx_param;
109 break;
110 case PCI_DEVICE_ID_INTEL_BSW1:
111 ssp->type = LPSS_BSW_SSP;
112 ssp->port_id = 1;
113 c->tx_param = &bsw1_tx_param;
114 c->rx_param = &bsw1_rx_param;
115 break;
116 case PCI_DEVICE_ID_INTEL_BSW2:
117 ssp->type = LPSS_BSW_SSP;
118 ssp->port_id = 2;
119 c->tx_param = &bsw2_tx_param;
120 c->rx_param = &bsw2_rx_param;
121 break;
122 case PCI_DEVICE_ID_INTEL_LPT0_0:
123 case PCI_DEVICE_ID_INTEL_LPT1_0:
124 ssp->type = LPSS_LPT_SSP;
125 ssp->port_id = 0;
126 c->tx_param = &lpt0_tx_param;
127 c->rx_param = &lpt0_rx_param;
128 break;
129 case PCI_DEVICE_ID_INTEL_LPT0_1:
130 case PCI_DEVICE_ID_INTEL_LPT1_1:
131 ssp->type = LPSS_LPT_SSP;
132 ssp->port_id = 1;
133 c->tx_param = &lpt1_tx_param;
134 c->rx_param = &lpt1_rx_param;
135 break;
136 default:
137 return -ENODEV;
138 }
139
140 c->num_chipselect = 1;
141
142 ret = pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
143 if (ret)
144 return ret;
145
146 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
147 ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
148 if (ret)
149 return ret;
150
151 tx = c->tx_param;
152 tx->dma_dev = &dma_dev->dev;
153 tx->m_master = 0;
154 tx->p_master = 1;
155
156 rx = c->rx_param;
157 rx->dma_dev = &dma_dev->dev;
158 rx->m_master = 0;
159 rx->p_master = 1;
160
161 c->dma_filter = lpss_dma_filter;
162 c->dma_burst_size = 1;
163 c->enable_dma = 1;
164 return 0;
165}
166
167static const struct pxa_spi_info lpss_info_config = {
168 .setup = lpss_spi_setup,
169};
170
171static int ce4100_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
172{
173 struct ssp_device *ssp = &c->ssp;
174
175 ssp->type = PXA25x_SSP;
176 ssp->port_id = dev->devfn;
177 c->num_chipselect = dev->devfn;
178
179 return pxa2xx_spi_pci_clk_register(dev, ssp, 3686400);
180}
181
182static const struct pxa_spi_info ce4100_info_config = {
183 .setup = ce4100_spi_setup,
184};
185
186static int mrfld_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
187{
188 struct ssp_device *ssp = &c->ssp;
189 struct dw_dma_slave *tx, *rx;
190 struct pci_dev *dma_dev;
191 int ret;
192
193 ssp->type = MRFLD_SSP;
194
195 switch (PCI_FUNC(dev->devfn)) {
196 case 0:
197 ssp->port_id = 3;
198 c->num_chipselect = 1;
199 c->tx_param = &mrfld3_tx_param;
200 c->rx_param = &mrfld3_rx_param;
201 break;
202 case 1:
203 ssp->port_id = 5;
204 c->num_chipselect = 4;
205 c->tx_param = &mrfld5_tx_param;
206 c->rx_param = &mrfld5_rx_param;
207 break;
208 case 2:
209 ssp->port_id = 6;
210 c->num_chipselect = 1;
211 c->tx_param = &mrfld6_tx_param;
212 c->rx_param = &mrfld6_rx_param;
213 break;
214 default:
215 return -ENODEV;
216 }
217
218 ret = pxa2xx_spi_pci_clk_register(dev, ssp, 25000000);
219 if (ret)
220 return ret;
221
222 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
223 ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
224 if (ret)
225 return ret;
226
227 tx = c->tx_param;
228 tx->dma_dev = &dma_dev->dev;
229
230 rx = c->rx_param;
231 rx->dma_dev = &dma_dev->dev;
232
233 c->dma_filter = lpss_dma_filter;
234 c->dma_burst_size = 8;
235 c->enable_dma = 1;
236 return 0;
237}
238
239static const struct pxa_spi_info mrfld_info_config = {
240 .setup = mrfld_spi_setup,
241};
242
243static int qrk_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
244{
245 struct ssp_device *ssp = &c->ssp;
246
247 ssp->type = QUARK_X1000_SSP;
248 ssp->port_id = dev->devfn;
249 c->num_chipselect = 1;
250
251 return pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
252}
253
254static const struct pxa_spi_info qrk_info_config = {
255 .setup = qrk_spi_setup,
256};
257
258static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
259 const struct pci_device_id *ent)
260{
261 const struct pxa_spi_info *info;
262 struct platform_device_info pi;
263 int ret;
264 struct platform_device *pdev;
265 struct pxa2xx_spi_controller spi_pdata;
266 struct ssp_device *ssp;
267
268 ret = pcim_enable_device(dev);
269 if (ret)
270 return ret;
271
272 ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
273 if (ret)
274 return ret;
275
276 memset(&spi_pdata, 0, sizeof(spi_pdata));
277
278 ssp = &spi_pdata.ssp;
279 ssp->dev = &dev->dev;
280 ssp->phys_base = pci_resource_start(dev, 0);
281 ssp->mmio_base = pcim_iomap_table(dev)[0];
282
283 info = (struct pxa_spi_info *)ent->driver_data;
284 ret = info->setup(dev, &spi_pdata);
285 if (ret)
286 return ret;
287
288 pci_set_master(dev);
289
290 ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
291 if (ret < 0)
292 return ret;
293 ssp->irq = pci_irq_vector(dev, 0);
294
295 memset(&pi, 0, sizeof(pi));
296 pi.fwnode = dev_fwnode(&dev->dev);
297 pi.parent = &dev->dev;
298 pi.name = "pxa2xx-spi";
299 pi.id = ssp->port_id;
300 pi.data = &spi_pdata;
301 pi.size_data = sizeof(spi_pdata);
302
303 pdev = platform_device_register_full(&pi);
304 if (IS_ERR(pdev))
305 return PTR_ERR(pdev);
306
307 pci_set_drvdata(dev, pdev);
308
309 return 0;
310}
311
312static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
313{
314 struct platform_device *pdev = pci_get_drvdata(dev);
315
316 platform_device_unregister(pdev);
317}
318
319static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
320 { PCI_DEVICE_DATA(INTEL, QUARK_X1000, &qrk_info_config) },
321 { PCI_DEVICE_DATA(INTEL, BYT, &lpss_info_config) },
322 { PCI_DEVICE_DATA(INTEL, MRFLD, &mrfld_info_config) },
323 { PCI_DEVICE_DATA(INTEL, BSW0, &lpss_info_config) },
324 { PCI_DEVICE_DATA(INTEL, BSW1, &lpss_info_config) },
325 { PCI_DEVICE_DATA(INTEL, BSW2, &lpss_info_config) },
326 { PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
327 { PCI_DEVICE_DATA(INTEL, LPT0_0, &lpss_info_config) },
328 { PCI_DEVICE_DATA(INTEL, LPT0_1, &lpss_info_config) },
329 { PCI_DEVICE_DATA(INTEL, LPT1_0, &lpss_info_config) },
330 { PCI_DEVICE_DATA(INTEL, LPT1_1, &lpss_info_config) },
331 { }
332};
333MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
334
335static struct pci_driver pxa2xx_spi_pci_driver = {
336 .name = "pxa2xx_spi_pci",
337 .id_table = pxa2xx_spi_pci_devices,
338 .probe = pxa2xx_spi_pci_probe,
339 .remove = pxa2xx_spi_pci_remove,
340};
341
342module_pci_driver(pxa2xx_spi_pci_driver);
343
344MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
345MODULE_LICENSE("GPL v2");
346MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
1/*
2 * CE4100's SPI device is more or less the same one as found on PXA
3 *
4 */
5#include <linux/pci.h>
6#include <linux/platform_device.h>
7#include <linux/of_device.h>
8#include <linux/module.h>
9#include <linux/spi/pxa2xx_spi.h>
10#include <linux/clk-provider.h>
11
12#include <linux/dmaengine.h>
13#include <linux/platform_data/dma-dw.h>
14
15enum {
16 PORT_CE4100,
17 PORT_BYT,
18 PORT_BSW0,
19 PORT_BSW1,
20 PORT_BSW2,
21 PORT_QUARK_X1000,
22 PORT_LPT,
23};
24
25struct pxa_spi_info {
26 enum pxa_ssp_type type;
27 int port_id;
28 int num_chipselect;
29 unsigned long max_clk_rate;
30
31 /* DMA channel request parameters */
32 void *tx_param;
33 void *rx_param;
34};
35
36static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
37static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
38
39static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
40static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
41static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
42static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
43static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
44static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
45
46static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
47static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };
48
49static bool lpss_dma_filter(struct dma_chan *chan, void *param)
50{
51 struct dw_dma_slave *dws = param;
52
53 if (dws->dma_dev != chan->device->dev)
54 return false;
55
56 chan->private = dws;
57 return true;
58}
59
60static struct pxa_spi_info spi_info_configs[] = {
61 [PORT_CE4100] = {
62 .type = PXA25x_SSP,
63 .port_id = -1,
64 .num_chipselect = -1,
65 .max_clk_rate = 3686400,
66 },
67 [PORT_BYT] = {
68 .type = LPSS_BYT_SSP,
69 .port_id = 0,
70 .num_chipselect = 1,
71 .max_clk_rate = 50000000,
72 .tx_param = &byt_tx_param,
73 .rx_param = &byt_rx_param,
74 },
75 [PORT_BSW0] = {
76 .type = LPSS_BYT_SSP,
77 .port_id = 0,
78 .num_chipselect = 1,
79 .max_clk_rate = 50000000,
80 .tx_param = &bsw0_tx_param,
81 .rx_param = &bsw0_rx_param,
82 },
83 [PORT_BSW1] = {
84 .type = LPSS_BYT_SSP,
85 .port_id = 1,
86 .num_chipselect = 1,
87 .max_clk_rate = 50000000,
88 .tx_param = &bsw1_tx_param,
89 .rx_param = &bsw1_rx_param,
90 },
91 [PORT_BSW2] = {
92 .type = LPSS_BYT_SSP,
93 .port_id = 2,
94 .num_chipselect = 1,
95 .max_clk_rate = 50000000,
96 .tx_param = &bsw2_tx_param,
97 .rx_param = &bsw2_rx_param,
98 },
99 [PORT_QUARK_X1000] = {
100 .type = QUARK_X1000_SSP,
101 .port_id = -1,
102 .num_chipselect = 1,
103 .max_clk_rate = 50000000,
104 },
105 [PORT_LPT] = {
106 .type = LPSS_LPT_SSP,
107 .port_id = 0,
108 .num_chipselect = 1,
109 .max_clk_rate = 50000000,
110 .tx_param = &lpt_tx_param,
111 .rx_param = &lpt_rx_param,
112 },
113};
114
115static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
116 const struct pci_device_id *ent)
117{
118 struct platform_device_info pi;
119 int ret;
120 struct platform_device *pdev;
121 struct pxa2xx_spi_master spi_pdata;
122 struct ssp_device *ssp;
123 struct pxa_spi_info *c;
124 char buf[40];
125 struct pci_dev *dma_dev;
126
127 ret = pcim_enable_device(dev);
128 if (ret)
129 return ret;
130
131 ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
132 if (ret)
133 return ret;
134
135 c = &spi_info_configs[ent->driver_data];
136
137 memset(&spi_pdata, 0, sizeof(spi_pdata));
138 spi_pdata.num_chipselect = (c->num_chipselect > 0) ?
139 c->num_chipselect : dev->devfn;
140
141 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
142
143 if (c->tx_param) {
144 struct dw_dma_slave *slave = c->tx_param;
145
146 slave->dma_dev = &dma_dev->dev;
147 slave->src_master = 1;
148 slave->dst_master = 0;
149 }
150
151 if (c->rx_param) {
152 struct dw_dma_slave *slave = c->rx_param;
153
154 slave->dma_dev = &dma_dev->dev;
155 slave->src_master = 1;
156 slave->dst_master = 0;
157 }
158
159 spi_pdata.dma_filter = lpss_dma_filter;
160 spi_pdata.tx_param = c->tx_param;
161 spi_pdata.rx_param = c->rx_param;
162 spi_pdata.enable_dma = c->rx_param && c->tx_param;
163
164 ssp = &spi_pdata.ssp;
165 ssp->phys_base = pci_resource_start(dev, 0);
166 ssp->mmio_base = pcim_iomap_table(dev)[0];
167 if (!ssp->mmio_base) {
168 dev_err(&dev->dev, "failed to ioremap() registers\n");
169 return -EIO;
170 }
171 ssp->irq = dev->irq;
172 ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
173 ssp->type = c->type;
174
175 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
176 ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL,
177 CLK_IS_ROOT, c->max_clk_rate);
178 if (IS_ERR(ssp->clk))
179 return PTR_ERR(ssp->clk);
180
181 memset(&pi, 0, sizeof(pi));
182 pi.parent = &dev->dev;
183 pi.name = "pxa2xx-spi";
184 pi.id = ssp->port_id;
185 pi.data = &spi_pdata;
186 pi.size_data = sizeof(spi_pdata);
187
188 pdev = platform_device_register_full(&pi);
189 if (IS_ERR(pdev)) {
190 clk_unregister(ssp->clk);
191 return PTR_ERR(pdev);
192 }
193
194 pci_set_drvdata(dev, pdev);
195
196 return 0;
197}
198
199static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
200{
201 struct platform_device *pdev = pci_get_drvdata(dev);
202 struct pxa2xx_spi_master *spi_pdata;
203
204 spi_pdata = dev_get_platdata(&pdev->dev);
205
206 platform_device_unregister(pdev);
207 clk_unregister(spi_pdata->ssp.clk);
208}
209
210static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
211 { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
212 { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
213 { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
214 { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
215 { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
216 { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
217 { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
218 { },
219};
220MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
221
222static struct pci_driver pxa2xx_spi_pci_driver = {
223 .name = "pxa2xx_spi_pci",
224 .id_table = pxa2xx_spi_pci_devices,
225 .probe = pxa2xx_spi_pci_probe,
226 .remove = pxa2xx_spi_pci_remove,
227};
228
229module_pci_driver(pxa2xx_spi_pci_driver);
230
231MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
232MODULE_LICENSE("GPL v2");
233MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");