1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
 
 
 
 
 4 */
 5
 6/*
 7 * Skeleton device tree; the bare minimum needed to boot; just include and
 8 * add a compatible value.
 9 */
10
11/ {
12	compatible = "snps,arc";
 
13	#address-cells = <1>;
14	#size-cells = <1>;
15	chosen { };
16	aliases { };
17
18	cpus {
19		#address-cells = <1>;
20		#size-cells = <0>;
21
22		cpu@0 {
23			device_type = "cpu";
24			compatible = "snps,arc770d";
25			reg = <0>;
26			clocks = <&core_clk>;
27		};
28	};
29
30	/* TIMER0 with interrupt for clockevent */
31	timer0 {
32		compatible = "snps,arc-timer";
33		interrupts = <3>;
34		interrupt-parent = <&core_intc>;
35		clocks = <&core_clk>;
36	};
37
38	/* TIMER1 for free running clocksource */
39	timer1 {
40		compatible = "snps,arc-timer";
41		clocks = <&core_clk>;
42	};
43
44	memory {
45		device_type = "memory";
46		reg = <0x80000000 0x10000000>;	/* 256M */
47	};
48};

 
 1/*
 2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License version 2 as
 6 * published by the Free Software Foundation.
 7 */
 8
 9/*
10 * Skeleton device tree; the bare minimum needed to boot; just include and
11 * add a compatible value.
12 */
13
14/ {
15	compatible = "snps,arc";
16	clock-frequency = <80000000>;	/* 80 MHZ */
17	#address-cells = <1>;
18	#size-cells = <1>;
19	chosen { };
20	aliases { };
21
22	cpus {
23		#address-cells = <1>;
24		#size-cells = <0>;
25
26		cpu@0 {
27			device_type = "cpu";
28			compatible = "snps,arc770d";
29			reg = <0>;
 
30		};
 
 
 
 
 
 
 
 
 
 
 
 
 
 
31	};
32
33	memory {
34		device_type = "memory";
35		reg = <0x80000000 0x10000000>;	/* 256M */
36	};
37};