1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
 
 
 
 
 
 
 
 
 
 
 
 
 
 4 */
 5
 6#ifndef __DTS_HI3516CV300_CLOCK_H
 7#define __DTS_HI3516CV300_CLOCK_H
 8
 9/* hi3516CV300 core CRG */
10#define HI3516CV300_APB_CLK		0
11#define HI3516CV300_UART0_CLK		1
12#define HI3516CV300_UART1_CLK		2
13#define HI3516CV300_UART2_CLK		3
14#define HI3516CV300_SPI0_CLK		4
15#define HI3516CV300_SPI1_CLK		5
16#define HI3516CV300_FMC_CLK		6
17#define HI3516CV300_MMC0_CLK		7
18#define HI3516CV300_MMC1_CLK		8
19#define HI3516CV300_MMC2_CLK		9
20#define HI3516CV300_MMC3_CLK		10
21#define HI3516CV300_ETH_CLK		11
22#define HI3516CV300_ETH_MACIF_CLK	12
23#define HI3516CV300_DMAC_CLK		13
24#define HI3516CV300_PWM_CLK		14
25#define HI3516CV300_USB2_BUS_CLK	15
26#define HI3516CV300_USB2_OHCI48M_CLK	16
27#define HI3516CV300_USB2_OHCI12M_CLK	17
28#define HI3516CV300_USB2_OTG_UTMI_CLK	18
29#define HI3516CV300_USB2_HST_PHY_CLK	19
30#define HI3516CV300_USB2_UTMI0_CLK	20
31#define HI3516CV300_USB2_PHY_CLK	21
32
33/* hi3516CV300 sysctrl CRG */
34#define HI3516CV300_WDT_CLK		1
35
36#endif	/* __DTS_HI3516CV300_CLOCK_H */

 
 1/*
 2 * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License as published by
 6 * the Free Software Foundation; either version 2 of the License, or
 7 * (at your option) any later version.
 8 *
 9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __DTS_HI3516CV300_CLOCK_H
19#define __DTS_HI3516CV300_CLOCK_H
20
21/* hi3516CV300 core CRG */
22#define HI3516CV300_APB_CLK		0
23#define HI3516CV300_UART0_CLK		1
24#define HI3516CV300_UART1_CLK		2
25#define HI3516CV300_UART2_CLK		3
26#define HI3516CV300_SPI0_CLK		4
27#define HI3516CV300_SPI1_CLK		5
28#define HI3516CV300_FMC_CLK		6
29#define HI3516CV300_MMC0_CLK		7
30#define HI3516CV300_MMC1_CLK		8
31#define HI3516CV300_MMC2_CLK		9
32#define HI3516CV300_MMC3_CLK		10
33#define HI3516CV300_ETH_CLK		11
34#define HI3516CV300_ETH_MACIF_CLK	12
35#define HI3516CV300_DMAC_CLK		13
36#define HI3516CV300_PWM_CLK		14
37#define HI3516CV300_USB2_BUS_CLK	15
38#define HI3516CV300_USB2_OHCI48M_CLK	16
39#define HI3516CV300_USB2_OHCI12M_CLK	17
40#define HI3516CV300_USB2_OTG_UTMI_CLK	18
41#define HI3516CV300_USB2_HST_PHY_CLK	19
42#define HI3516CV300_USB2_UTMI0_CLK	20
43#define HI3516CV300_USB2_PHY_CLK	21
44
45/* hi3516CV300 sysctrl CRG */
46#define HI3516CV300_WDT_CLK		1
47
48#endif	/* __DTS_HI3516CV300_CLOCK_H */