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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dwc3-of-simple.c - OF glue layer for simple integrations
4 *
5 * Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com
6 *
7 * Author: Felipe Balbi <balbi@ti.com>
8 *
9 * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
10 * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
11 * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
19#include <linux/clk.h>
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/pm_runtime.h>
23#include <linux/reset.h>
24
25struct dwc3_of_simple {
26 struct device *dev;
27 struct clk_bulk_data *clks;
28 int num_clocks;
29 struct reset_control *resets;
30 bool need_reset;
31};
32
33static int dwc3_of_simple_probe(struct platform_device *pdev)
34{
35 struct dwc3_of_simple *simple;
36 struct device *dev = &pdev->dev;
37 struct device_node *np = dev->of_node;
38
39 int ret;
40
41 simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
42 if (!simple)
43 return -ENOMEM;
44
45 platform_set_drvdata(pdev, simple);
46 simple->dev = dev;
47
48 /*
49 * Some controllers need to toggle the usb3-otg reset before trying to
50 * initialize the PHY, otherwise the PHY times out.
51 */
52 if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
53 simple->need_reset = true;
54
55 simple->resets = of_reset_control_array_get(np, false, true,
56 true);
57 if (IS_ERR(simple->resets)) {
58 ret = PTR_ERR(simple->resets);
59 dev_err(dev, "failed to get device resets, err=%d\n", ret);
60 return ret;
61 }
62
63 ret = reset_control_deassert(simple->resets);
64 if (ret)
65 goto err_resetc_put;
66
67 ret = clk_bulk_get_all(simple->dev, &simple->clks);
68 if (ret < 0)
69 goto err_resetc_assert;
70
71 simple->num_clocks = ret;
72 ret = clk_bulk_prepare_enable(simple->num_clocks, simple->clks);
73 if (ret)
74 goto err_resetc_assert;
75
76 ret = of_platform_populate(np, NULL, NULL, dev);
77 if (ret)
78 goto err_clk_put;
79
80 pm_runtime_set_active(dev);
81 pm_runtime_enable(dev);
82 pm_runtime_get_sync(dev);
83
84 return 0;
85
86err_clk_put:
87 clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
88 clk_bulk_put_all(simple->num_clocks, simple->clks);
89
90err_resetc_assert:
91 reset_control_assert(simple->resets);
92
93err_resetc_put:
94 reset_control_put(simple->resets);
95 return ret;
96}
97
98static void __dwc3_of_simple_teardown(struct dwc3_of_simple *simple)
99{
100 of_platform_depopulate(simple->dev);
101
102 clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
103 clk_bulk_put_all(simple->num_clocks, simple->clks);
104 simple->num_clocks = 0;
105
106 reset_control_assert(simple->resets);
107
108 reset_control_put(simple->resets);
109
110 pm_runtime_disable(simple->dev);
111 pm_runtime_put_noidle(simple->dev);
112 pm_runtime_set_suspended(simple->dev);
113}
114
115static void dwc3_of_simple_remove(struct platform_device *pdev)
116{
117 struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
118
119 __dwc3_of_simple_teardown(simple);
120}
121
122static void dwc3_of_simple_shutdown(struct platform_device *pdev)
123{
124 struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
125
126 __dwc3_of_simple_teardown(simple);
127}
128
129static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
130{
131 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
132
133 clk_bulk_disable(simple->num_clocks, simple->clks);
134
135 return 0;
136}
137
138static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
139{
140 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
141
142 return clk_bulk_enable(simple->num_clocks, simple->clks);
143}
144
145static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
146{
147 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
148
149 if (simple->need_reset)
150 reset_control_assert(simple->resets);
151
152 return 0;
153}
154
155static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
156{
157 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
158
159 if (simple->need_reset)
160 reset_control_deassert(simple->resets);
161
162 return 0;
163}
164
165static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
166 SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)
167 SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
168 dwc3_of_simple_runtime_resume, NULL)
169};
170
171static const struct of_device_id of_dwc3_simple_match[] = {
172 { .compatible = "rockchip,rk3399-dwc3" },
173 { .compatible = "sprd,sc9860-dwc3" },
174 { .compatible = "allwinner,sun50i-h6-dwc3" },
175 { .compatible = "hisilicon,hi3670-dwc3" },
176 { .compatible = "intel,keembay-dwc3" },
177 { /* Sentinel */ }
178};
179MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
180
181static struct platform_driver dwc3_of_simple_driver = {
182 .probe = dwc3_of_simple_probe,
183 .remove_new = dwc3_of_simple_remove,
184 .shutdown = dwc3_of_simple_shutdown,
185 .driver = {
186 .name = "dwc3-of-simple",
187 .of_match_table = of_dwc3_simple_match,
188 .pm = &dwc3_of_simple_dev_pm_ops,
189 },
190};
191
192module_platform_driver(dwc3_of_simple_driver);
193MODULE_LICENSE("GPL v2");
194MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
195MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
1// SPDX-License-Identifier: GPL-2.0
2/**
3 * dwc3-of-simple.c - OF glue layer for simple integrations
4 *
5 * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
6 *
7 * Author: Felipe Balbi <balbi@ti.com>
8 *
9 * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
10 * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
11 * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
19#include <linux/clk.h>
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/pm_runtime.h>
23#include <linux/reset.h>
24
25struct dwc3_of_simple {
26 struct device *dev;
27 struct clk **clks;
28 int num_clocks;
29 struct reset_control *resets;
30 bool pulse_resets;
31};
32
33static int dwc3_of_simple_clk_init(struct dwc3_of_simple *simple, int count)
34{
35 struct device *dev = simple->dev;
36 struct device_node *np = dev->of_node;
37 int i;
38
39 simple->num_clocks = count;
40
41 if (!count)
42 return 0;
43
44 simple->clks = devm_kcalloc(dev, simple->num_clocks,
45 sizeof(struct clk *), GFP_KERNEL);
46 if (!simple->clks)
47 return -ENOMEM;
48
49 for (i = 0; i < simple->num_clocks; i++) {
50 struct clk *clk;
51 int ret;
52
53 clk = of_clk_get(np, i);
54 if (IS_ERR(clk)) {
55 while (--i >= 0) {
56 clk_disable_unprepare(simple->clks[i]);
57 clk_put(simple->clks[i]);
58 }
59 return PTR_ERR(clk);
60 }
61
62 ret = clk_prepare_enable(clk);
63 if (ret < 0) {
64 while (--i >= 0) {
65 clk_disable_unprepare(simple->clks[i]);
66 clk_put(simple->clks[i]);
67 }
68 clk_put(clk);
69
70 return ret;
71 }
72
73 simple->clks[i] = clk;
74 }
75
76 return 0;
77}
78
79static int dwc3_of_simple_probe(struct platform_device *pdev)
80{
81 struct dwc3_of_simple *simple;
82 struct device *dev = &pdev->dev;
83 struct device_node *np = dev->of_node;
84
85 int ret;
86 int i;
87 bool shared_resets = false;
88
89 simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
90 if (!simple)
91 return -ENOMEM;
92
93 platform_set_drvdata(pdev, simple);
94 simple->dev = dev;
95
96 if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") ||
97 of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) {
98 shared_resets = true;
99 simple->pulse_resets = true;
100 }
101
102 simple->resets = of_reset_control_array_get(np, shared_resets, true);
103 if (IS_ERR(simple->resets)) {
104 ret = PTR_ERR(simple->resets);
105 dev_err(dev, "failed to get device resets, err=%d\n", ret);
106 return ret;
107 }
108
109 if (simple->pulse_resets) {
110 ret = reset_control_reset(simple->resets);
111 if (ret)
112 goto err_resetc_put;
113 } else {
114 ret = reset_control_deassert(simple->resets);
115 if (ret)
116 goto err_resetc_put;
117 }
118
119 ret = dwc3_of_simple_clk_init(simple, of_count_phandle_with_args(np,
120 "clocks", "#clock-cells"));
121 if (ret)
122 goto err_resetc_assert;
123
124 ret = of_platform_populate(np, NULL, NULL, dev);
125 if (ret) {
126 for (i = 0; i < simple->num_clocks; i++) {
127 clk_disable_unprepare(simple->clks[i]);
128 clk_put(simple->clks[i]);
129 }
130
131 goto err_resetc_assert;
132 }
133
134 pm_runtime_set_active(dev);
135 pm_runtime_enable(dev);
136 pm_runtime_get_sync(dev);
137
138 return 0;
139
140err_resetc_assert:
141 if (!simple->pulse_resets)
142 reset_control_assert(simple->resets);
143
144err_resetc_put:
145 reset_control_put(simple->resets);
146 return ret;
147}
148
149static int dwc3_of_simple_remove(struct platform_device *pdev)
150{
151 struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
152 struct device *dev = &pdev->dev;
153 int i;
154
155 of_platform_depopulate(dev);
156
157 for (i = 0; i < simple->num_clocks; i++) {
158 clk_disable_unprepare(simple->clks[i]);
159 clk_put(simple->clks[i]);
160 }
161 simple->num_clocks = 0;
162
163 if (!simple->pulse_resets)
164 reset_control_assert(simple->resets);
165
166 reset_control_put(simple->resets);
167
168 pm_runtime_put_sync(dev);
169 pm_runtime_disable(dev);
170
171 return 0;
172}
173
174#ifdef CONFIG_PM
175static int dwc3_of_simple_runtime_suspend(struct device *dev)
176{
177 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
178 int i;
179
180 for (i = 0; i < simple->num_clocks; i++)
181 clk_disable(simple->clks[i]);
182
183 return 0;
184}
185
186static int dwc3_of_simple_runtime_resume(struct device *dev)
187{
188 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
189 int ret;
190 int i;
191
192 for (i = 0; i < simple->num_clocks; i++) {
193 ret = clk_enable(simple->clks[i]);
194 if (ret < 0) {
195 while (--i >= 0)
196 clk_disable(simple->clks[i]);
197 return ret;
198 }
199 }
200
201 return 0;
202}
203#endif
204
205static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
206 SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
207 dwc3_of_simple_runtime_resume, NULL)
208};
209
210static const struct of_device_id of_dwc3_simple_match[] = {
211 { .compatible = "qcom,dwc3" },
212 { .compatible = "rockchip,rk3399-dwc3" },
213 { .compatible = "xlnx,zynqmp-dwc3" },
214 { .compatible = "cavium,octeon-7130-usb-uctl" },
215 { .compatible = "sprd,sc9860-dwc3" },
216 { .compatible = "amlogic,meson-axg-dwc3" },
217 { .compatible = "amlogic,meson-gxl-dwc3" },
218 { /* Sentinel */ }
219};
220MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
221
222static struct platform_driver dwc3_of_simple_driver = {
223 .probe = dwc3_of_simple_probe,
224 .remove = dwc3_of_simple_remove,
225 .driver = {
226 .name = "dwc3-of-simple",
227 .of_match_table = of_dwc3_simple_match,
228 .pm = &dwc3_of_simple_dev_pm_ops,
229 },
230};
231
232module_platform_driver(dwc3_of_simple_driver);
233MODULE_LICENSE("GPL v2");
234MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
235MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");