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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
4 */
5
6/*
7 * This file contains a module version of the ioc3 serial driver. This
8 * includes all the support functions needed (support functions, etc.)
9 * and the serial driver itself.
10 */
11#include <linux/errno.h>
12#include <linux/tty.h>
13#include <linux/tty_flip.h>
14#include <linux/serial.h>
15#include <linux/circ_buf.h>
16#include <linux/serial_reg.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19#include <linux/serial_core.h>
20#include <linux/ioc3.h>
21#include <linux/slab.h>
22
23/*
24 * Interesting things about the ioc3
25 */
26
27#define LOGICAL_PORTS 2 /* rs232(0) and rs422(1) */
28#define PORTS_PER_CARD 2
29#define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS)
30#define MAX_CARDS 8
31#define MAX_LOGICAL_PORTS (LOGICAL_PORTS_PER_CARD * MAX_CARDS)
32
33/* determine given the sio_ir what port it applies to */
34#define GET_PORT_FROM_SIO_IR(_x) (_x & SIO_IR_SA) ? 0 : 1
35
36
37/*
38 * we have 2 logical ports (rs232, rs422) for each physical port
39 * evens are rs232, odds are rs422
40 */
41#define GET_PHYSICAL_PORT(_x) ((_x) >> 1)
42#define GET_LOGICAL_PORT(_x) ((_x) & 1)
43#define IS_PHYSICAL_PORT(_x) !((_x) & 1)
44#define IS_RS232(_x) !((_x) & 1)
45
46static unsigned int Num_of_ioc3_cards;
47static unsigned int Submodule_slot;
48
49/* defining this will get you LOTS of great debug info */
50//#define DEBUG_INTERRUPTS
51#define DPRINT_CONFIG(_x...) ;
52//#define DPRINT_CONFIG(_x...) printk _x
53#define NOT_PROGRESS() ;
54//#define NOT_PROGRESS() printk("%s : fails %d\n", __func__, __LINE__)
55
56/* number of characters we want to transmit to the lower level at a time */
57#define MAX_CHARS 256
58#define FIFO_SIZE (MAX_CHARS-1) /* it's a uchar */
59
60/* Device name we're using */
61#define DEVICE_NAME "ttySIOC"
62#define DEVICE_MAJOR 204
63#define DEVICE_MINOR 116
64
65/* flags for next_char_state */
66#define NCS_BREAK 0x1
67#define NCS_PARITY 0x2
68#define NCS_FRAMING 0x4
69#define NCS_OVERRUN 0x8
70
71/* cause we need SOME parameters ... */
72#define MIN_BAUD_SUPPORTED 1200
73#define MAX_BAUD_SUPPORTED 115200
74
75/* protocol types supported */
76#define PROTO_RS232 0
77#define PROTO_RS422 1
78
79/* Notification types */
80#define N_DATA_READY 0x01
81#define N_OUTPUT_LOWAT 0x02
82#define N_BREAK 0x04
83#define N_PARITY_ERROR 0x08
84#define N_FRAMING_ERROR 0x10
85#define N_OVERRUN_ERROR 0x20
86#define N_DDCD 0x40
87#define N_DCTS 0x80
88
89#define N_ALL_INPUT (N_DATA_READY | N_BREAK \
90 | N_PARITY_ERROR | N_FRAMING_ERROR \
91 | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
92
93#define N_ALL_OUTPUT N_OUTPUT_LOWAT
94
95#define N_ALL_ERRORS (N_PARITY_ERROR | N_FRAMING_ERROR \
96 | N_OVERRUN_ERROR)
97
98#define N_ALL (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK \
99 | N_PARITY_ERROR | N_FRAMING_ERROR \
100 | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
101
102#define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv)
103#define SER_DIVISOR(x, clk) (((clk) + (x) * 8) / ((x) * 16))
104#define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div))
105
106/* Some masks */
107#define LCR_MASK_BITS_CHAR (UART_LCR_WLEN5 | UART_LCR_WLEN6 \
108 | UART_LCR_WLEN7 | UART_LCR_WLEN8)
109#define LCR_MASK_STOP_BITS (UART_LCR_STOP)
110
111#define PENDING(_a, _p) (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable)
112
113#define RING_BUF_SIZE 4096
114#define BUF_SIZE_BIT SBBR_L_SIZE
115#define PROD_CONS_MASK PROD_CONS_PTR_4K
116
117#define TOTAL_RING_BUF_SIZE (RING_BUF_SIZE * 4)
118
119/* driver specific - one per card */
120struct ioc3_card {
121 struct {
122 /* uart ports are allocated here */
123 struct uart_port icp_uart_port[LOGICAL_PORTS];
124 /* the ioc3_port used for this port */
125 struct ioc3_port *icp_port;
126 } ic_port[PORTS_PER_CARD];
127 /* currently enabled interrupts */
128 uint32_t ic_enable;
129};
130
131/* Local port info for each IOC3 serial port */
132struct ioc3_port {
133 /* handy reference material */
134 struct uart_port *ip_port;
135 struct ioc3_card *ip_card;
136 struct ioc3_driver_data *ip_idd;
137 struct ioc3_submodule *ip_is;
138
139 /* pci mem addresses for this port */
140 struct ioc3_serialregs __iomem *ip_serial_regs;
141 struct ioc3_uartregs __iomem *ip_uart_regs;
142
143 /* Ring buffer page for this port */
144 dma_addr_t ip_dma_ringbuf;
145 /* vaddr of ring buffer */
146 struct ring_buffer *ip_cpu_ringbuf;
147
148 /* Rings for this port */
149 struct ring *ip_inring;
150 struct ring *ip_outring;
151
152 /* Hook to port specific values */
153 struct port_hooks *ip_hooks;
154
155 spinlock_t ip_lock;
156
157 /* Various rx/tx parameters */
158 int ip_baud;
159 int ip_tx_lowat;
160 int ip_rx_timeout;
161
162 /* Copy of notification bits */
163 int ip_notify;
164
165 /* Shadow copies of various registers so we don't need to PIO
166 * read them constantly
167 */
168 uint32_t ip_sscr;
169 uint32_t ip_tx_prod;
170 uint32_t ip_rx_cons;
171 unsigned char ip_flags;
172};
173
174/* tx low water mark. We need to notify the driver whenever tx is getting
175 * close to empty so it can refill the tx buffer and keep things going.
176 * Let's assume that if we interrupt 1 ms before the tx goes idle, we'll
177 * have no trouble getting in more chars in time (I certainly hope so).
178 */
179#define TX_LOWAT_LATENCY 1000
180#define TX_LOWAT_HZ (1000000 / TX_LOWAT_LATENCY)
181#define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ)
182
183/* Flags per port */
184#define INPUT_HIGH 0x01
185 /* used to signify that we have turned off the rx_high
186 * temporarily - we need to drain the fifo and don't
187 * want to get blasted with interrupts.
188 */
189#define DCD_ON 0x02
190 /* DCD state is on */
191#define LOWAT_WRITTEN 0x04
192#define READ_ABORTED 0x08
193 /* the read was aborted - used to avaoid infinate looping
194 * in the interrupt handler
195 */
196#define INPUT_ENABLE 0x10
197
198/* Since each port has different register offsets and bitmasks
199 * for everything, we'll store those that we need in tables so we
200 * don't have to be constantly checking the port we are dealing with.
201 */
202struct port_hooks {
203 uint32_t intr_delta_dcd;
204 uint32_t intr_delta_cts;
205 uint32_t intr_tx_mt;
206 uint32_t intr_rx_timer;
207 uint32_t intr_rx_high;
208 uint32_t intr_tx_explicit;
209 uint32_t intr_clear;
210 uint32_t intr_all;
211 char rs422_select_pin;
212};
213
214static struct port_hooks hooks_array[PORTS_PER_CARD] = {
215 /* values for port A */
216 {
217 .intr_delta_dcd = SIO_IR_SA_DELTA_DCD,
218 .intr_delta_cts = SIO_IR_SA_DELTA_CTS,
219 .intr_tx_mt = SIO_IR_SA_TX_MT,
220 .intr_rx_timer = SIO_IR_SA_RX_TIMER,
221 .intr_rx_high = SIO_IR_SA_RX_HIGH,
222 .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT,
223 .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL
224 | SIO_IR_SA_RX_HIGH
225 | SIO_IR_SA_RX_TIMER
226 | SIO_IR_SA_DELTA_DCD
227 | SIO_IR_SA_DELTA_CTS
228 | SIO_IR_SA_INT
229 | SIO_IR_SA_TX_EXPLICIT
230 | SIO_IR_SA_MEMERR),
231 .intr_all = SIO_IR_SA,
232 .rs422_select_pin = GPPR_UARTA_MODESEL_PIN,
233 },
234
235 /* values for port B */
236 {
237 .intr_delta_dcd = SIO_IR_SB_DELTA_DCD,
238 .intr_delta_cts = SIO_IR_SB_DELTA_CTS,
239 .intr_tx_mt = SIO_IR_SB_TX_MT,
240 .intr_rx_timer = SIO_IR_SB_RX_TIMER,
241 .intr_rx_high = SIO_IR_SB_RX_HIGH,
242 .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT,
243 .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL
244 | SIO_IR_SB_RX_HIGH
245 | SIO_IR_SB_RX_TIMER
246 | SIO_IR_SB_DELTA_DCD
247 | SIO_IR_SB_DELTA_CTS
248 | SIO_IR_SB_INT
249 | SIO_IR_SB_TX_EXPLICIT
250 | SIO_IR_SB_MEMERR),
251 .intr_all = SIO_IR_SB,
252 .rs422_select_pin = GPPR_UARTB_MODESEL_PIN,
253 }
254};
255
256struct ring_entry {
257 union {
258 struct {
259 uint32_t alldata;
260 uint32_t allsc;
261 } all;
262 struct {
263 char data[4]; /* data bytes */
264 char sc[4]; /* status/control */
265 } s;
266 } u;
267};
268
269/* Test the valid bits in any of the 4 sc chars using "allsc" member */
270#define RING_ANY_VALID \
271 ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101)
272
273#define ring_sc u.s.sc
274#define ring_data u.s.data
275#define ring_allsc u.all.allsc
276
277/* Number of entries per ring buffer. */
278#define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry))
279
280/* An individual ring */
281struct ring {
282 struct ring_entry entries[ENTRIES_PER_RING];
283};
284
285/* The whole enchilada */
286struct ring_buffer {
287 struct ring TX_A;
288 struct ring RX_A;
289 struct ring TX_B;
290 struct ring RX_B;
291};
292
293/* Get a ring from a port struct */
294#define RING(_p, _wh) &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh)
295
296/* for Infinite loop detection */
297#define MAXITER 10000000
298
299
300/**
301 * set_baud - Baud rate setting code
302 * @port: port to set
303 * @baud: baud rate to use
304 */
305static int set_baud(struct ioc3_port *port, int baud)
306{
307 int divisor;
308 int actual_baud;
309 int diff;
310 int lcr, prediv;
311 struct ioc3_uartregs __iomem *uart;
312
313 for (prediv = 6; prediv < 64; prediv++) {
314 divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv));
315 if (!divisor)
316 continue; /* invalid divisor */
317 actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv));
318
319 diff = actual_baud - baud;
320 if (diff < 0)
321 diff = -diff;
322
323 /* if we're within 1% we've found a match */
324 if (diff * 100 <= actual_baud)
325 break;
326 }
327
328 /* if the above loop completed, we didn't match
329 * the baud rate. give up.
330 */
331 if (prediv == 64) {
332 NOT_PROGRESS();
333 return 1;
334 }
335
336 uart = port->ip_uart_regs;
337 lcr = readb(&uart->iu_lcr);
338
339 writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr);
340 writeb((unsigned char)divisor, &uart->iu_dll);
341 writeb((unsigned char)(divisor >> 8), &uart->iu_dlm);
342 writeb((unsigned char)prediv, &uart->iu_scr);
343 writeb((unsigned char)lcr, &uart->iu_lcr);
344
345 return 0;
346}
347
348/**
349 * get_ioc3_port - given a uart port, return the control structure
350 * @the_port: uart port to find
351 */
352static struct ioc3_port *get_ioc3_port(struct uart_port *the_port)
353{
354 struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev);
355 struct ioc3_card *card_ptr = idd->data[Submodule_slot];
356 int ii, jj;
357
358 if (!card_ptr) {
359 NOT_PROGRESS();
360 return NULL;
361 }
362 for (ii = 0; ii < PORTS_PER_CARD; ii++) {
363 for (jj = 0; jj < LOGICAL_PORTS; jj++) {
364 if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj])
365 return card_ptr->ic_port[ii].icp_port;
366 }
367 }
368 NOT_PROGRESS();
369 return NULL;
370}
371
372/**
373 * port_init - Initialize the sio and ioc3 hardware for a given port
374 * called per port from attach...
375 * @port: port to initialize
376 */
377static inline int port_init(struct ioc3_port *port)
378{
379 uint32_t sio_cr;
380 struct port_hooks *hooks = port->ip_hooks;
381 struct ioc3_uartregs __iomem *uart;
382 int reset_loop_counter = 0xfffff;
383 struct ioc3_driver_data *idd = port->ip_idd;
384
385 /* Idle the IOC3 serial interface */
386 writel(SSCR_RESET, &port->ip_serial_regs->sscr);
387
388 /* Wait until any pending bus activity for this port has ceased */
389 do {
390 sio_cr = readl(&idd->vma->sio_cr);
391 if (reset_loop_counter-- <= 0) {
392 printk(KERN_WARNING
393 "IOC3 unable to come out of reset"
394 " scr 0x%x\n", sio_cr);
395 return -1;
396 }
397 } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) &&
398 (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA)
399 || sio_cr == SIO_CR_ARB_DIAG_TXB
400 || sio_cr == SIO_CR_ARB_DIAG_RXA
401 || sio_cr == SIO_CR_ARB_DIAG_RXB));
402
403 /* Finish reset sequence */
404 writel(0, &port->ip_serial_regs->sscr);
405
406 /* Once RESET is done, reload cached tx_prod and rx_cons values
407 * and set rings to empty by making prod == cons
408 */
409 port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
410 writel(port->ip_tx_prod, &port->ip_serial_regs->stpir);
411 port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
412 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
413
414 /* Disable interrupts for this 16550 */
415 uart = port->ip_uart_regs;
416 writeb(0, &uart->iu_lcr);
417 writeb(0, &uart->iu_ier);
418
419 /* Set the default baud */
420 set_baud(port, port->ip_baud);
421
422 /* Set line control to 8 bits no parity */
423 writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr);
424 /* UART_LCR_STOP == 1 stop */
425
426 /* Enable the FIFOs */
427 writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr);
428 /* then reset 16550 FIFOs */
429 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
430 &uart->iu_fcr);
431
432 /* Clear modem control register */
433 writeb(0, &uart->iu_mcr);
434
435 /* Clear deltas in modem status register */
436 writel(0, &port->ip_serial_regs->shadow);
437
438 /* Only do this once per port pair */
439 if (port->ip_hooks == &hooks_array[0]) {
440 unsigned long ring_pci_addr;
441 uint32_t __iomem *sbbr_l, *sbbr_h;
442
443 sbbr_l = &idd->vma->sbbr_l;
444 sbbr_h = &idd->vma->sbbr_h;
445 ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf;
446 DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n",
447 __func__, (void *)ring_pci_addr));
448
449 writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h);
450 writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l);
451 }
452
453 /* Set the receive timeout value to 10 msec */
454 writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr);
455
456 /* Set rx threshold, enable DMA */
457 /* Set high water mark at 3/4 of full ring */
458 port->ip_sscr = (ENTRIES_PER_RING * 3 / 4);
459
460 /* uart experiences pauses at high baud rate reducing actual
461 * throughput by 10% or so unless we enable high speed polling
462 * XXX when this hardware bug is resolved we should revert to
463 * normal polling speed
464 */
465 port->ip_sscr |= SSCR_HIGH_SPD;
466
467 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
468
469 /* Disable and clear all serial related interrupt bits */
470 port->ip_card->ic_enable &= ~hooks->intr_clear;
471 ioc3_disable(port->ip_is, idd, hooks->intr_clear);
472 ioc3_ack(port->ip_is, idd, hooks->intr_clear);
473 return 0;
474}
475
476/**
477 * enable_intrs - enable interrupts
478 * @port: port to enable
479 * @mask: mask to use
480 */
481static void enable_intrs(struct ioc3_port *port, uint32_t mask)
482{
483 if ((port->ip_card->ic_enable & mask) != mask) {
484 port->ip_card->ic_enable |= mask;
485 ioc3_enable(port->ip_is, port->ip_idd, mask);
486 }
487}
488
489/**
490 * local_open - local open a port
491 * @port: port to open
492 */
493static inline int local_open(struct ioc3_port *port)
494{
495 int spiniter = 0;
496
497 port->ip_flags = INPUT_ENABLE;
498
499 /* Pause the DMA interface if necessary */
500 if (port->ip_sscr & SSCR_DMA_EN) {
501 writel(port->ip_sscr | SSCR_DMA_PAUSE,
502 &port->ip_serial_regs->sscr);
503 while ((readl(&port->ip_serial_regs->sscr)
504 & SSCR_PAUSE_STATE) == 0) {
505 spiniter++;
506 if (spiniter > MAXITER) {
507 NOT_PROGRESS();
508 return -1;
509 }
510 }
511 }
512
513 /* Reset the input fifo. If the uart received chars while the port
514 * was closed and DMA is not enabled, the uart may have a bunch of
515 * chars hanging around in its rx fifo which will not be discarded
516 * by rclr in the upper layer. We must get rid of them here.
517 */
518 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR,
519 &port->ip_uart_regs->iu_fcr);
520
521 writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr);
522 /* UART_LCR_STOP == 1 stop */
523
524 /* Re-enable DMA, set default threshold to intr whenever there is
525 * data available.
526 */
527 port->ip_sscr &= ~SSCR_RX_THRESHOLD;
528 port->ip_sscr |= 1; /* default threshold */
529
530 /* Plug in the new sscr. This implicitly clears the DMA_PAUSE
531 * flag if it was set above
532 */
533 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
534 port->ip_tx_lowat = 1;
535 return 0;
536}
537
538/**
539 * set_rx_timeout - Set rx timeout and threshold values.
540 * @port: port to use
541 * @timeout: timeout value in ticks
542 */
543static inline int set_rx_timeout(struct ioc3_port *port, int timeout)
544{
545 int threshold;
546
547 port->ip_rx_timeout = timeout;
548
549 /* Timeout is in ticks. Let's figure out how many chars we
550 * can receive at the current baud rate in that interval
551 * and set the rx threshold to that amount. There are 4 chars
552 * per ring entry, so we'll divide the number of chars that will
553 * arrive in timeout by 4.
554 * So .... timeout * baud / 10 / HZ / 4, with HZ = 100.
555 */
556 threshold = timeout * port->ip_baud / 4000;
557 if (threshold == 0)
558 threshold = 1; /* otherwise we'll intr all the time! */
559
560 if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD)
561 return 1;
562
563 port->ip_sscr &= ~SSCR_RX_THRESHOLD;
564 port->ip_sscr |= threshold;
565 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
566
567 /* Now set the rx timeout to the given value
568 * again timeout * SRTR_HZ / HZ
569 */
570 timeout = timeout * SRTR_HZ / 100;
571 if (timeout > SRTR_CNT)
572 timeout = SRTR_CNT;
573 writel(timeout, &port->ip_serial_regs->srtr);
574 return 0;
575}
576
577/**
578 * config_port - config the hardware
579 * @port: port to config
580 * @baud: baud rate for the port
581 * @byte_size: data size
582 * @stop_bits: number of stop bits
583 * @parenb: parity enable ?
584 * @parodd: odd parity ?
585 */
586static inline int
587config_port(struct ioc3_port *port,
588 int baud, int byte_size, int stop_bits, int parenb, int parodd)
589{
590 char lcr, sizebits;
591 int spiniter = 0;
592
593 DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d "
594 "parodd %d\n",
595 __func__, ((struct uart_port *)port->ip_port)->line,
596 baud, byte_size, stop_bits, parenb, parodd));
597
598 if (set_baud(port, baud))
599 return 1;
600
601 switch (byte_size) {
602 case 5:
603 sizebits = UART_LCR_WLEN5;
604 break;
605 case 6:
606 sizebits = UART_LCR_WLEN6;
607 break;
608 case 7:
609 sizebits = UART_LCR_WLEN7;
610 break;
611 case 8:
612 sizebits = UART_LCR_WLEN8;
613 break;
614 default:
615 return 1;
616 }
617
618 /* Pause the DMA interface if necessary */
619 if (port->ip_sscr & SSCR_DMA_EN) {
620 writel(port->ip_sscr | SSCR_DMA_PAUSE,
621 &port->ip_serial_regs->sscr);
622 while ((readl(&port->ip_serial_regs->sscr)
623 & SSCR_PAUSE_STATE) == 0) {
624 spiniter++;
625 if (spiniter > MAXITER)
626 return -1;
627 }
628 }
629
630 /* Clear relevant fields in lcr */
631 lcr = readb(&port->ip_uart_regs->iu_lcr);
632 lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR |
633 UART_LCR_PARITY | LCR_MASK_STOP_BITS);
634
635 /* Set byte size in lcr */
636 lcr |= sizebits;
637
638 /* Set parity */
639 if (parenb) {
640 lcr |= UART_LCR_PARITY;
641 if (!parodd)
642 lcr |= UART_LCR_EPAR;
643 }
644
645 /* Set stop bits */
646 if (stop_bits)
647 lcr |= UART_LCR_STOP /* 2 stop bits */ ;
648
649 writeb(lcr, &port->ip_uart_regs->iu_lcr);
650
651 /* Re-enable the DMA interface if necessary */
652 if (port->ip_sscr & SSCR_DMA_EN) {
653 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
654 }
655 port->ip_baud = baud;
656
657 /* When we get within this number of ring entries of filling the
658 * entire ring on tx, place an EXPLICIT intr to generate a lowat
659 * notification when output has drained.
660 */
661 port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4;
662 if (port->ip_tx_lowat == 0)
663 port->ip_tx_lowat = 1;
664
665 set_rx_timeout(port, 2);
666 return 0;
667}
668
669/**
670 * do_write - Write bytes to the port. Returns the number of bytes
671 * actually written. Called from transmit_chars
672 * @port: port to use
673 * @buf: the stuff to write
674 * @len: how many bytes in 'buf'
675 */
676static inline int do_write(struct ioc3_port *port, char *buf, int len)
677{
678 int prod_ptr, cons_ptr, total = 0;
679 struct ring *outring;
680 struct ring_entry *entry;
681 struct port_hooks *hooks = port->ip_hooks;
682
683 BUG_ON(!(len >= 0));
684
685 prod_ptr = port->ip_tx_prod;
686 cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
687 outring = port->ip_outring;
688
689 /* Maintain a 1-entry red-zone. The ring buffer is full when
690 * (cons - prod) % ring_size is 1. Rather than do this subtraction
691 * in the body of the loop, I'll do it now.
692 */
693 cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK;
694
695 /* Stuff the bytes into the output */
696 while ((prod_ptr != cons_ptr) && (len > 0)) {
697 int xx;
698
699 /* Get 4 bytes (one ring entry) at a time */
700 entry = (struct ring_entry *)((caddr_t) outring + prod_ptr);
701
702 /* Invalidate all entries */
703 entry->ring_allsc = 0;
704
705 /* Copy in some bytes */
706 for (xx = 0; (xx < 4) && (len > 0); xx++) {
707 entry->ring_data[xx] = *buf++;
708 entry->ring_sc[xx] = TXCB_VALID;
709 len--;
710 total++;
711 }
712
713 /* If we are within some small threshold of filling up the
714 * entire ring buffer, we must place an EXPLICIT intr here
715 * to generate a lowat interrupt in case we subsequently
716 * really do fill up the ring and the caller goes to sleep.
717 * No need to place more than one though.
718 */
719 if (!(port->ip_flags & LOWAT_WRITTEN) &&
720 ((cons_ptr - prod_ptr) & PROD_CONS_MASK)
721 <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) {
722 port->ip_flags |= LOWAT_WRITTEN;
723 entry->ring_sc[0] |= TXCB_INT_WHEN_DONE;
724 }
725
726 /* Go on to next entry */
727 prod_ptr += sizeof(struct ring_entry);
728 prod_ptr &= PROD_CONS_MASK;
729 }
730
731 /* If we sent something, start DMA if necessary */
732 if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) {
733 port->ip_sscr |= SSCR_DMA_EN;
734 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
735 }
736
737 /* Store the new producer pointer. If tx is disabled, we stuff the
738 * data into the ring buffer, but we don't actually start tx.
739 */
740 if (!uart_tx_stopped(port->ip_port)) {
741 writel(prod_ptr, &port->ip_serial_regs->stpir);
742
743 /* If we are now transmitting, enable tx_mt interrupt so we
744 * can disable DMA if necessary when the tx finishes.
745 */
746 if (total > 0)
747 enable_intrs(port, hooks->intr_tx_mt);
748 }
749 port->ip_tx_prod = prod_ptr;
750
751 return total;
752}
753
754/**
755 * disable_intrs - disable interrupts
756 * @port: port to enable
757 * @mask: mask to use
758 */
759static inline void disable_intrs(struct ioc3_port *port, uint32_t mask)
760{
761 if (port->ip_card->ic_enable & mask) {
762 ioc3_disable(port->ip_is, port->ip_idd, mask);
763 port->ip_card->ic_enable &= ~mask;
764 }
765}
766
767/**
768 * set_notification - Modify event notification
769 * @port: port to use
770 * @mask: events mask
771 * @set_on: set ?
772 */
773static int set_notification(struct ioc3_port *port, int mask, int set_on)
774{
775 struct port_hooks *hooks = port->ip_hooks;
776 uint32_t intrbits, sscrbits;
777
778 BUG_ON(!mask);
779
780 intrbits = sscrbits = 0;
781
782 if (mask & N_DATA_READY)
783 intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high);
784 if (mask & N_OUTPUT_LOWAT)
785 intrbits |= hooks->intr_tx_explicit;
786 if (mask & N_DDCD) {
787 intrbits |= hooks->intr_delta_dcd;
788 sscrbits |= SSCR_RX_RING_DCD;
789 }
790 if (mask & N_DCTS)
791 intrbits |= hooks->intr_delta_cts;
792
793 if (set_on) {
794 enable_intrs(port, intrbits);
795 port->ip_notify |= mask;
796 port->ip_sscr |= sscrbits;
797 } else {
798 disable_intrs(port, intrbits);
799 port->ip_notify &= ~mask;
800 port->ip_sscr &= ~sscrbits;
801 }
802
803 /* We require DMA if either DATA_READY or DDCD notification is
804 * currently requested. If neither of these is requested and
805 * there is currently no tx in progress, DMA may be disabled.
806 */
807 if (port->ip_notify & (N_DATA_READY | N_DDCD))
808 port->ip_sscr |= SSCR_DMA_EN;
809 else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt))
810 port->ip_sscr &= ~SSCR_DMA_EN;
811
812 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
813 return 0;
814}
815
816/**
817 * set_mcr - set the master control reg
818 * @the_port: port to use
819 * @mask1: mcr mask
820 * @mask2: shadow mask
821 */
822static inline int set_mcr(struct uart_port *the_port,
823 int mask1, int mask2)
824{
825 struct ioc3_port *port = get_ioc3_port(the_port);
826 uint32_t shadow;
827 int spiniter = 0;
828 char mcr;
829
830 if (!port)
831 return -1;
832
833 /* Pause the DMA interface if necessary */
834 if (port->ip_sscr & SSCR_DMA_EN) {
835 writel(port->ip_sscr | SSCR_DMA_PAUSE,
836 &port->ip_serial_regs->sscr);
837 while ((readl(&port->ip_serial_regs->sscr)
838 & SSCR_PAUSE_STATE) == 0) {
839 spiniter++;
840 if (spiniter > MAXITER)
841 return -1;
842 }
843 }
844 shadow = readl(&port->ip_serial_regs->shadow);
845 mcr = (shadow & 0xff000000) >> 24;
846
847 /* Set new value */
848 mcr |= mask1;
849 shadow |= mask2;
850 writeb(mcr, &port->ip_uart_regs->iu_mcr);
851 writel(shadow, &port->ip_serial_regs->shadow);
852
853 /* Re-enable the DMA interface if necessary */
854 if (port->ip_sscr & SSCR_DMA_EN) {
855 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
856 }
857 return 0;
858}
859
860/**
861 * ioc3_set_proto - set the protocol for the port
862 * @port: port to use
863 * @proto: protocol to use
864 */
865static int ioc3_set_proto(struct ioc3_port *port, int proto)
866{
867 struct port_hooks *hooks = port->ip_hooks;
868
869 switch (proto) {
870 default:
871 case PROTO_RS232:
872 /* Clear the appropriate GIO pin */
873 DPRINT_CONFIG(("%s: rs232\n", __func__));
874 writel(0, (&port->ip_idd->vma->gppr[0]
875 + hooks->rs422_select_pin));
876 break;
877
878 case PROTO_RS422:
879 /* Set the appropriate GIO pin */
880 DPRINT_CONFIG(("%s: rs422\n", __func__));
881 writel(1, (&port->ip_idd->vma->gppr[0]
882 + hooks->rs422_select_pin));
883 break;
884 }
885 return 0;
886}
887
888/**
889 * transmit_chars - upper level write, called with the_port->lock
890 * @the_port: port to write
891 */
892static void transmit_chars(struct uart_port *the_port)
893{
894 int xmit_count, tail, head;
895 int result;
896 char *start;
897 struct tty_struct *tty;
898 struct ioc3_port *port = get_ioc3_port(the_port);
899 struct uart_state *state;
900
901 if (!the_port)
902 return;
903 if (!port)
904 return;
905
906 state = the_port->state;
907 tty = state->port.tty;
908
909 if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) {
910 /* Nothing to do or hw stopped */
911 set_notification(port, N_ALL_OUTPUT, 0);
912 return;
913 }
914
915 head = state->xmit.head;
916 tail = state->xmit.tail;
917 start = (char *)&state->xmit.buf[tail];
918
919 /* write out all the data or until the end of the buffer */
920 xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail);
921 if (xmit_count > 0) {
922 result = do_write(port, start, xmit_count);
923 if (result > 0) {
924 /* booking */
925 xmit_count -= result;
926 the_port->icount.tx += result;
927 /* advance the pointers */
928 tail += result;
929 tail &= UART_XMIT_SIZE - 1;
930 state->xmit.tail = tail;
931 start = (char *)&state->xmit.buf[tail];
932 }
933 }
934 if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS)
935 uart_write_wakeup(the_port);
936
937 if (uart_circ_empty(&state->xmit)) {
938 set_notification(port, N_OUTPUT_LOWAT, 0);
939 } else {
940 set_notification(port, N_OUTPUT_LOWAT, 1);
941 }
942}
943
944/**
945 * ioc3_change_speed - change the speed of the port
946 * @the_port: port to change
947 * @new_termios: new termios settings
948 * @old_termios: old termios settings
949 */
950static void
951ioc3_change_speed(struct uart_port *the_port,
952 struct ktermios *new_termios, struct ktermios *old_termios)
953{
954 struct ioc3_port *port = get_ioc3_port(the_port);
955 unsigned int cflag, iflag;
956 int baud;
957 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
958 struct uart_state *state = the_port->state;
959
960 cflag = new_termios->c_cflag;
961 iflag = new_termios->c_iflag;
962
963 switch (cflag & CSIZE) {
964 case CS5:
965 new_data = 5;
966 break;
967 case CS6:
968 new_data = 6;
969 break;
970 case CS7:
971 new_data = 7;
972 break;
973 case CS8:
974 new_data = 8;
975 break;
976 default:
977 /* cuz we always need a default ... */
978 new_data = 5;
979 break;
980 }
981 if (cflag & CSTOPB) {
982 new_stop = 1;
983 }
984 if (cflag & PARENB) {
985 new_parity_enable = 1;
986 if (cflag & PARODD)
987 new_parity = 1;
988 }
989 baud = uart_get_baud_rate(the_port, new_termios, old_termios,
990 MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED);
991 DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __func__, baud,
992 the_port->line));
993
994 if (!the_port->fifosize)
995 the_port->fifosize = FIFO_SIZE;
996 uart_update_timeout(the_port, cflag, baud);
997
998 the_port->ignore_status_mask = N_ALL_INPUT;
999
1000 state->port.low_latency = 1;
1001
1002 if (iflag & IGNPAR)
1003 the_port->ignore_status_mask &= ~(N_PARITY_ERROR
1004 | N_FRAMING_ERROR);
1005 if (iflag & IGNBRK) {
1006 the_port->ignore_status_mask &= ~N_BREAK;
1007 if (iflag & IGNPAR)
1008 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
1009 }
1010 if (!(cflag & CREAD)) {
1011 /* ignore everything */
1012 the_port->ignore_status_mask &= ~N_DATA_READY;
1013 }
1014
1015 if (cflag & CRTSCTS) {
1016 /* enable hardware flow control */
1017 port->ip_sscr |= SSCR_HFC_EN;
1018 }
1019 else {
1020 /* disable hardware flow control */
1021 port->ip_sscr &= ~SSCR_HFC_EN;
1022 }
1023 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
1024
1025 /* Set the configuration and proper notification call */
1026 DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o "
1027 "config_port(baud %d data %d stop %d penable %d "
1028 " parity %d), notification 0x%x\n",
1029 __func__, (void *)port, the_port->line, cflag, baud,
1030 new_data, new_stop, new_parity_enable, new_parity,
1031 the_port->ignore_status_mask));
1032
1033 if ((config_port(port, baud, /* baud */
1034 new_data, /* byte size */
1035 new_stop, /* stop bits */
1036 new_parity_enable, /* set parity */
1037 new_parity)) >= 0) { /* parity 1==odd */
1038 set_notification(port, the_port->ignore_status_mask, 1);
1039 }
1040}
1041
1042/**
1043 * ic3_startup_local - Start up the serial port - returns >= 0 if no errors
1044 * @the_port: Port to operate on
1045 */
1046static inline int ic3_startup_local(struct uart_port *the_port)
1047{
1048 struct ioc3_port *port;
1049
1050 if (!the_port) {
1051 NOT_PROGRESS();
1052 return -1;
1053 }
1054
1055 port = get_ioc3_port(the_port);
1056 if (!port) {
1057 NOT_PROGRESS();
1058 return -1;
1059 }
1060
1061 local_open(port);
1062
1063 /* set the protocol */
1064 ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 :
1065 PROTO_RS422);
1066 return 0;
1067}
1068
1069/*
1070 * ioc3_cb_output_lowat - called when the output low water mark is hit
1071 * @port: port to output
1072 */
1073static void ioc3_cb_output_lowat(struct ioc3_port *port)
1074{
1075 unsigned long pflags;
1076
1077 /* the_port->lock is set on the call here */
1078 if (port->ip_port) {
1079 spin_lock_irqsave(&port->ip_port->lock, pflags);
1080 transmit_chars(port->ip_port);
1081 spin_unlock_irqrestore(&port->ip_port->lock, pflags);
1082 }
1083}
1084
1085/*
1086 * ioc3_cb_post_ncs - called for some basic errors
1087 * @port: port to use
1088 * @ncs: event
1089 */
1090static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs)
1091{
1092 struct uart_icount *icount;
1093
1094 icount = &the_port->icount;
1095
1096 if (ncs & NCS_BREAK)
1097 icount->brk++;
1098 if (ncs & NCS_FRAMING)
1099 icount->frame++;
1100 if (ncs & NCS_OVERRUN)
1101 icount->overrun++;
1102 if (ncs & NCS_PARITY)
1103 icount->parity++;
1104}
1105
1106/**
1107 * do_read - Read in bytes from the port. Return the number of bytes
1108 * actually read.
1109 * @the_port: port to use
1110 * @buf: place to put the stuff we read
1111 * @len: how big 'buf' is
1112 */
1113
1114static inline int do_read(struct uart_port *the_port, char *buf, int len)
1115{
1116 int prod_ptr, cons_ptr, total;
1117 struct ioc3_port *port = get_ioc3_port(the_port);
1118 struct ring *inring;
1119 struct ring_entry *entry;
1120 struct port_hooks *hooks;
1121 int byte_num;
1122 char *sc;
1123 int loop_counter;
1124
1125 BUG_ON(!(len >= 0));
1126 BUG_ON(!port);
1127 hooks = port->ip_hooks;
1128
1129 /* There is a nasty timing issue in the IOC3. When the rx_timer
1130 * expires or the rx_high condition arises, we take an interrupt.
1131 * At some point while servicing the interrupt, we read bytes from
1132 * the ring buffer and re-arm the rx_timer. However the rx_timer is
1133 * not started until the first byte is received *after* it is armed,
1134 * and any bytes pending in the rx construction buffers are not drained
1135 * to memory until either there are 4 bytes available or the rx_timer
1136 * expires. This leads to a potential situation where data is left
1137 * in the construction buffers forever - 1 to 3 bytes were received
1138 * after the interrupt was generated but before the rx_timer was
1139 * re-armed. At that point as long as no subsequent bytes are received
1140 * the timer will never be started and the bytes will remain in the
1141 * construction buffer forever. The solution is to execute a DRAIN
1142 * command after rearming the timer. This way any bytes received before
1143 * the DRAIN will be drained to memory, and any bytes received after
1144 * the DRAIN will start the TIMER and be drained when it expires.
1145 * Luckily, this only needs to be done when the DMA buffer is empty
1146 * since there is no requirement that this function return all
1147 * available data as long as it returns some.
1148 */
1149 /* Re-arm the timer */
1150
1151 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
1152
1153 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
1154 cons_ptr = port->ip_rx_cons;
1155
1156 if (prod_ptr == cons_ptr) {
1157 int reset_dma = 0;
1158
1159 /* Input buffer appears empty, do a flush. */
1160
1161 /* DMA must be enabled for this to work. */
1162 if (!(port->ip_sscr & SSCR_DMA_EN)) {
1163 port->ip_sscr |= SSCR_DMA_EN;
1164 reset_dma = 1;
1165 }
1166
1167 /* Potential race condition: we must reload the srpir after
1168 * issuing the drain command, otherwise we could think the rx
1169 * buffer is empty, then take a very long interrupt, and when
1170 * we come back it's full and we wait forever for the drain to
1171 * complete.
1172 */
1173 writel(port->ip_sscr | SSCR_RX_DRAIN,
1174 &port->ip_serial_regs->sscr);
1175 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
1176
1177 /* We must not wait for the DRAIN to complete unless there are
1178 * at least 8 bytes (2 ring entries) available to receive the
1179 * data otherwise the DRAIN will never complete and we'll
1180 * deadlock here.
1181 * In fact, to make things easier, I'll just ignore the flush if
1182 * there is any data at all now available.
1183 */
1184 if (prod_ptr == cons_ptr) {
1185 loop_counter = 0;
1186 while (readl(&port->ip_serial_regs->sscr) &
1187 SSCR_RX_DRAIN) {
1188 loop_counter++;
1189 if (loop_counter > MAXITER)
1190 return -1;
1191 }
1192
1193 /* SIGH. We have to reload the prod_ptr *again* since
1194 * the drain may have caused it to change
1195 */
1196 prod_ptr = readl(&port->ip_serial_regs->srpir)
1197 & PROD_CONS_MASK;
1198 }
1199 if (reset_dma) {
1200 port->ip_sscr &= ~SSCR_DMA_EN;
1201 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
1202 }
1203 }
1204 inring = port->ip_inring;
1205 port->ip_flags &= ~READ_ABORTED;
1206
1207 total = 0;
1208 loop_counter = 0xfffff; /* to avoid hangs */
1209
1210 /* Grab bytes from the hardware */
1211 while ((prod_ptr != cons_ptr) && (len > 0)) {
1212 entry = (struct ring_entry *)((caddr_t) inring + cons_ptr);
1213
1214 if (loop_counter-- <= 0) {
1215 printk(KERN_WARNING "IOC3 serial: "
1216 "possible hang condition/"
1217 "port stuck on read (line %d).\n",
1218 the_port->line);
1219 break;
1220 }
1221
1222 /* According to the producer pointer, this ring entry
1223 * must contain some data. But if the PIO happened faster
1224 * than the DMA, the data may not be available yet, so let's
1225 * wait until it arrives.
1226 */
1227 if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
1228 /* Indicate the read is aborted so we don't disable
1229 * the interrupt thinking that the consumer is
1230 * congested.
1231 */
1232 port->ip_flags |= READ_ABORTED;
1233 len = 0;
1234 break;
1235 }
1236
1237 /* Load the bytes/status out of the ring entry */
1238 for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) {
1239 sc = &(entry->ring_sc[byte_num]);
1240
1241 /* Check for change in modem state or overrun */
1242 if ((*sc & RXSB_MODEM_VALID)
1243 && (port->ip_notify & N_DDCD)) {
1244 /* Notify upper layer if DCD dropped */
1245 if ((port->ip_flags & DCD_ON)
1246 && !(*sc & RXSB_DCD)) {
1247 /* If we have already copied some data,
1248 * return it. We'll pick up the carrier
1249 * drop on the next pass. That way we
1250 * don't throw away the data that has
1251 * already been copied back to
1252 * the caller's buffer.
1253 */
1254 if (total > 0) {
1255 len = 0;
1256 break;
1257 }
1258 port->ip_flags &= ~DCD_ON;
1259
1260 /* Turn off this notification so the
1261 * carrier drop protocol won't see it
1262 * again when it does a read.
1263 */
1264 *sc &= ~RXSB_MODEM_VALID;
1265
1266 /* To keep things consistent, we need
1267 * to update the consumer pointer so
1268 * the next reader won't come in and
1269 * try to read the same ring entries
1270 * again. This must be done here before
1271 * the dcd change.
1272 */
1273
1274 if ((entry->ring_allsc & RING_ANY_VALID)
1275 == 0) {
1276 cons_ptr += (int)sizeof
1277 (struct ring_entry);
1278 cons_ptr &= PROD_CONS_MASK;
1279 }
1280 writel(cons_ptr,
1281 &port->ip_serial_regs->srcir);
1282 port->ip_rx_cons = cons_ptr;
1283
1284 /* Notify upper layer of carrier drop */
1285 if ((port->ip_notify & N_DDCD)
1286 && port->ip_port) {
1287 uart_handle_dcd_change
1288 (port->ip_port, 0);
1289 wake_up_interruptible
1290 (&the_port->state->
1291 port.delta_msr_wait);
1292 }
1293
1294 /* If we had any data to return, we
1295 * would have returned it above.
1296 */
1297 return 0;
1298 }
1299 }
1300 if (*sc & RXSB_MODEM_VALID) {
1301 /* Notify that an input overrun occurred */
1302 if ((*sc & RXSB_OVERRUN)
1303 && (port->ip_notify & N_OVERRUN_ERROR)) {
1304 ioc3_cb_post_ncs(the_port, NCS_OVERRUN);
1305 }
1306 /* Don't look at this byte again */
1307 *sc &= ~RXSB_MODEM_VALID;
1308 }
1309
1310 /* Check for valid data or RX errors */
1311 if ((*sc & RXSB_DATA_VALID) &&
1312 ((*sc & (RXSB_PAR_ERR
1313 | RXSB_FRAME_ERR | RXSB_BREAK))
1314 && (port->ip_notify & (N_PARITY_ERROR
1315 | N_FRAMING_ERROR
1316 | N_BREAK)))) {
1317 /* There is an error condition on the next byte.
1318 * If we have already transferred some bytes,
1319 * we'll stop here. Otherwise if this is the
1320 * first byte to be read, we'll just transfer
1321 * it alone after notifying the
1322 * upper layer of its status.
1323 */
1324 if (total > 0) {
1325 len = 0;
1326 break;
1327 } else {
1328 if ((*sc & RXSB_PAR_ERR) &&
1329 (port->
1330 ip_notify & N_PARITY_ERROR)) {
1331 ioc3_cb_post_ncs(the_port,
1332 NCS_PARITY);
1333 }
1334 if ((*sc & RXSB_FRAME_ERR) &&
1335 (port->
1336 ip_notify & N_FRAMING_ERROR)) {
1337 ioc3_cb_post_ncs(the_port,
1338 NCS_FRAMING);
1339 }
1340 if ((*sc & RXSB_BREAK)
1341 && (port->ip_notify & N_BREAK)) {
1342 ioc3_cb_post_ncs
1343 (the_port, NCS_BREAK);
1344 }
1345 len = 1;
1346 }
1347 }
1348 if (*sc & RXSB_DATA_VALID) {
1349 *sc &= ~RXSB_DATA_VALID;
1350 *buf = entry->ring_data[byte_num];
1351 buf++;
1352 len--;
1353 total++;
1354 }
1355 }
1356
1357 /* If we used up this entry entirely, go on to the next one,
1358 * otherwise we must have run out of buffer space, so
1359 * leave the consumer pointer here for the next read in case
1360 * there are still unread bytes in this entry.
1361 */
1362 if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
1363 cons_ptr += (int)sizeof(struct ring_entry);
1364 cons_ptr &= PROD_CONS_MASK;
1365 }
1366 }
1367
1368 /* Update consumer pointer and re-arm rx timer interrupt */
1369 writel(cons_ptr, &port->ip_serial_regs->srcir);
1370 port->ip_rx_cons = cons_ptr;
1371
1372 /* If we have now dipped below the rx high water mark and we have
1373 * rx_high interrupt turned off, we can now turn it back on again.
1374 */
1375 if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr)
1376 & PROD_CONS_MASK) <
1377 ((port->
1378 ip_sscr &
1379 SSCR_RX_THRESHOLD)
1380 << PROD_CONS_PTR_OFF))) {
1381 port->ip_flags &= ~INPUT_HIGH;
1382 enable_intrs(port, hooks->intr_rx_high);
1383 }
1384 return total;
1385}
1386
1387/**
1388 * receive_chars - upper level read.
1389 * @the_port: port to read from
1390 */
1391static int receive_chars(struct uart_port *the_port)
1392{
1393 unsigned char ch[MAX_CHARS];
1394 int read_count = 0, read_room, flip = 0;
1395 struct uart_state *state = the_port->state;
1396 struct ioc3_port *port = get_ioc3_port(the_port);
1397 unsigned long pflags;
1398
1399 /* Make sure all the pointers are "good" ones */
1400 if (!state)
1401 return 0;
1402
1403 if (!(port->ip_flags & INPUT_ENABLE))
1404 return 0;
1405
1406 spin_lock_irqsave(&the_port->lock, pflags);
1407
1408 read_count = do_read(the_port, ch, MAX_CHARS);
1409 if (read_count > 0) {
1410 flip = 1;
1411 read_room = tty_insert_flip_string(&state->port, ch,
1412 read_count);
1413 the_port->icount.rx += read_count;
1414 }
1415 spin_unlock_irqrestore(&the_port->lock, pflags);
1416
1417 if (flip)
1418 tty_flip_buffer_push(&state->port);
1419
1420 return read_count;
1421}
1422
1423/**
1424 * ioc3uart_intr_one - lowest level (per port) interrupt handler.
1425 * @is : submodule
1426 * @idd: driver data
1427 * @pending: interrupts to handle
1428 */
1429
1430static inline int
1431ioc3uart_intr_one(struct ioc3_submodule *is,
1432 struct ioc3_driver_data *idd,
1433 unsigned int pending)
1434{
1435 int port_num = GET_PORT_FROM_SIO_IR(pending);
1436 struct port_hooks *hooks;
1437 unsigned int rx_high_rd_aborted = 0;
1438 unsigned long flags;
1439 struct uart_port *the_port;
1440 struct ioc3_port *port;
1441 int loop_counter;
1442 struct ioc3_card *card_ptr;
1443 unsigned int sio_ir;
1444
1445 card_ptr = idd->data[is->id];
1446 port = card_ptr->ic_port[port_num].icp_port;
1447 hooks = port->ip_hooks;
1448
1449 /* Possible race condition here: The tx_mt interrupt bit may be
1450 * cleared without the intervention of the interrupt handler,
1451 * e.g. by a write. If the top level interrupt handler reads a
1452 * tx_mt, then some other processor does a write, starting up
1453 * output, then we come in here, see the tx_mt and stop DMA, the
1454 * output started by the other processor will hang. Thus we can
1455 * only rely on tx_mt being legitimate if it is read while the
1456 * port lock is held. Therefore this bit must be ignored in the
1457 * passed in interrupt mask which was read by the top level
1458 * interrupt handler since the port lock was not held at the time
1459 * it was read. We can only rely on this bit being accurate if it
1460 * is read while the port lock is held. So we'll clear it for now,
1461 * and reload it later once we have the port lock.
1462 */
1463
1464 sio_ir = pending & ~(hooks->intr_tx_mt);
1465 spin_lock_irqsave(&port->ip_lock, flags);
1466
1467 loop_counter = MAXITER; /* to avoid hangs */
1468
1469 do {
1470 uint32_t shadow;
1471
1472 if (loop_counter-- <= 0) {
1473 printk(KERN_WARNING "IOC3 serial: "
1474 "possible hang condition/"
1475 "port stuck on interrupt (line %d).\n",
1476 ((struct uart_port *)port->ip_port)->line);
1477 break;
1478 }
1479 /* Handle a DCD change */
1480 if (sio_ir & hooks->intr_delta_dcd) {
1481 ioc3_ack(is, idd, hooks->intr_delta_dcd);
1482 shadow = readl(&port->ip_serial_regs->shadow);
1483
1484 if ((port->ip_notify & N_DDCD)
1485 && (shadow & SHADOW_DCD)
1486 && (port->ip_port)) {
1487 the_port = port->ip_port;
1488 uart_handle_dcd_change(the_port,
1489 shadow & SHADOW_DCD);
1490 wake_up_interruptible
1491 (&the_port->state->port.delta_msr_wait);
1492 } else if ((port->ip_notify & N_DDCD)
1493 && !(shadow & SHADOW_DCD)) {
1494 /* Flag delta DCD/no DCD */
1495 uart_handle_dcd_change(port->ip_port,
1496 shadow & SHADOW_DCD);
1497 port->ip_flags |= DCD_ON;
1498 }
1499 }
1500
1501 /* Handle a CTS change */
1502 if (sio_ir & hooks->intr_delta_cts) {
1503 ioc3_ack(is, idd, hooks->intr_delta_cts);
1504 shadow = readl(&port->ip_serial_regs->shadow);
1505
1506 if ((port->ip_notify & N_DCTS) && (port->ip_port)) {
1507 the_port = port->ip_port;
1508 uart_handle_cts_change(the_port, shadow
1509 & SHADOW_CTS);
1510 wake_up_interruptible
1511 (&the_port->state->port.delta_msr_wait);
1512 }
1513 }
1514
1515 /* rx timeout interrupt. Must be some data available. Put this
1516 * before the check for rx_high since servicing this condition
1517 * may cause that condition to clear.
1518 */
1519 if (sio_ir & hooks->intr_rx_timer) {
1520 ioc3_ack(is, idd, hooks->intr_rx_timer);
1521 if ((port->ip_notify & N_DATA_READY)
1522 && (port->ip_port)) {
1523 receive_chars(port->ip_port);
1524 }
1525 }
1526
1527 /* rx high interrupt. Must be after rx_timer. */
1528 else if (sio_ir & hooks->intr_rx_high) {
1529 /* Data available, notify upper layer */
1530 if ((port->ip_notify & N_DATA_READY) && port->ip_port) {
1531 receive_chars(port->ip_port);
1532 }
1533
1534 /* We can't ACK this interrupt. If receive_chars didn't
1535 * cause the condition to clear, we'll have to disable
1536 * the interrupt until the data is drained.
1537 * If the read was aborted, don't disable the interrupt
1538 * as this may cause us to hang indefinitely. An
1539 * aborted read generally means that this interrupt
1540 * hasn't been delivered to the cpu yet anyway, even
1541 * though we see it as asserted when we read the sio_ir.
1542 */
1543 if ((sio_ir = PENDING(card_ptr, idd))
1544 & hooks->intr_rx_high) {
1545 if (port->ip_flags & READ_ABORTED) {
1546 rx_high_rd_aborted++;
1547 }
1548 else {
1549 card_ptr->ic_enable &= ~hooks->intr_rx_high;
1550 port->ip_flags |= INPUT_HIGH;
1551 }
1552 }
1553 }
1554
1555 /* We got a low water interrupt: notify upper layer to
1556 * send more data. Must come before tx_mt since servicing
1557 * this condition may cause that condition to clear.
1558 */
1559 if (sio_ir & hooks->intr_tx_explicit) {
1560 port->ip_flags &= ~LOWAT_WRITTEN;
1561 ioc3_ack(is, idd, hooks->intr_tx_explicit);
1562 if (port->ip_notify & N_OUTPUT_LOWAT)
1563 ioc3_cb_output_lowat(port);
1564 }
1565
1566 /* Handle tx_mt. Must come after tx_explicit. */
1567 else if (sio_ir & hooks->intr_tx_mt) {
1568 /* If we are expecting a lowat notification
1569 * and we get to this point it probably means that for
1570 * some reason the tx_explicit didn't work as expected
1571 * (that can legitimately happen if the output buffer is
1572 * filled up in just the right way).
1573 * So send the notification now.
1574 */
1575 if (port->ip_notify & N_OUTPUT_LOWAT) {
1576 ioc3_cb_output_lowat(port);
1577
1578 /* We need to reload the sio_ir since the lowat
1579 * call may have caused another write to occur,
1580 * clearing the tx_mt condition.
1581 */
1582 sio_ir = PENDING(card_ptr, idd);
1583 }
1584
1585 /* If the tx_mt condition still persists even after the
1586 * lowat call, we've got some work to do.
1587 */
1588 if (sio_ir & hooks->intr_tx_mt) {
1589 /* If we are not currently expecting DMA input,
1590 * and the transmitter has just gone idle,
1591 * there is no longer any reason for DMA, so
1592 * disable it.
1593 */
1594 if (!(port->ip_notify
1595 & (N_DATA_READY | N_DDCD))) {
1596 BUG_ON(!(port->ip_sscr
1597 & SSCR_DMA_EN));
1598 port->ip_sscr &= ~SSCR_DMA_EN;
1599 writel(port->ip_sscr,
1600 &port->ip_serial_regs->sscr);
1601 }
1602 /* Prevent infinite tx_mt interrupt */
1603 card_ptr->ic_enable &= ~hooks->intr_tx_mt;
1604 }
1605 }
1606 sio_ir = PENDING(card_ptr, idd);
1607
1608 /* if the read was aborted and only hooks->intr_rx_high,
1609 * clear hooks->intr_rx_high, so we do not loop forever.
1610 */
1611
1612 if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) {
1613 sio_ir &= ~hooks->intr_rx_high;
1614 }
1615 } while (sio_ir & hooks->intr_all);
1616
1617 spin_unlock_irqrestore(&port->ip_lock, flags);
1618 ioc3_enable(is, idd, card_ptr->ic_enable);
1619 return 0;
1620}
1621
1622/**
1623 * ioc3uart_intr - field all serial interrupts
1624 * @is : submodule
1625 * @idd: driver data
1626 * @pending: interrupts to handle
1627 *
1628 */
1629
1630static int ioc3uart_intr(struct ioc3_submodule *is,
1631 struct ioc3_driver_data *idd,
1632 unsigned int pending)
1633{
1634 int ret = 0;
1635
1636 /*
1637 * The upper level interrupt handler sends interrupts for both ports
1638 * here. So we need to call for each port with its interrupts.
1639 */
1640
1641 if (pending & SIO_IR_SA)
1642 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA);
1643 if (pending & SIO_IR_SB)
1644 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB);
1645
1646 return ret;
1647}
1648
1649/**
1650 * ic3_type
1651 * @port: Port to operate with (we ignore since we only have one port)
1652 *
1653 */
1654static const char *ic3_type(struct uart_port *the_port)
1655{
1656 if (IS_RS232(the_port->line))
1657 return "SGI IOC3 Serial [rs232]";
1658 else
1659 return "SGI IOC3 Serial [rs422]";
1660}
1661
1662/**
1663 * ic3_tx_empty - Is the transmitter empty?
1664 * @port: Port to operate on
1665 *
1666 */
1667static unsigned int ic3_tx_empty(struct uart_port *the_port)
1668{
1669 unsigned int ret = 0;
1670 struct ioc3_port *port = get_ioc3_port(the_port);
1671
1672 if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT)
1673 ret = TIOCSER_TEMT;
1674 return ret;
1675}
1676
1677/**
1678 * ic3_stop_tx - stop the transmitter
1679 * @port: Port to operate on
1680 *
1681 */
1682static void ic3_stop_tx(struct uart_port *the_port)
1683{
1684 struct ioc3_port *port = get_ioc3_port(the_port);
1685
1686 if (port)
1687 set_notification(port, N_OUTPUT_LOWAT, 0);
1688}
1689
1690/**
1691 * ic3_stop_rx - stop the receiver
1692 * @port: Port to operate on
1693 *
1694 */
1695static void ic3_stop_rx(struct uart_port *the_port)
1696{
1697 struct ioc3_port *port = get_ioc3_port(the_port);
1698
1699 if (port)
1700 port->ip_flags &= ~INPUT_ENABLE;
1701}
1702
1703/**
1704 * null_void_function
1705 * @port: Port to operate on
1706 *
1707 */
1708static void null_void_function(struct uart_port *the_port)
1709{
1710}
1711
1712/**
1713 * ic3_shutdown - shut down the port - free irq and disable
1714 * @port: port to shut down
1715 *
1716 */
1717static void ic3_shutdown(struct uart_port *the_port)
1718{
1719 unsigned long port_flags;
1720 struct ioc3_port *port;
1721 struct uart_state *state;
1722
1723 port = get_ioc3_port(the_port);
1724 if (!port)
1725 return;
1726
1727 state = the_port->state;
1728 wake_up_interruptible(&state->port.delta_msr_wait);
1729
1730 spin_lock_irqsave(&the_port->lock, port_flags);
1731 set_notification(port, N_ALL, 0);
1732 spin_unlock_irqrestore(&the_port->lock, port_flags);
1733}
1734
1735/**
1736 * ic3_set_mctrl - set control lines (dtr, rts, etc)
1737 * @port: Port to operate on
1738 * @mctrl: Lines to set/unset
1739 *
1740 */
1741static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl)
1742{
1743 unsigned char mcr = 0;
1744
1745 if (mctrl & TIOCM_RTS)
1746 mcr |= UART_MCR_RTS;
1747 if (mctrl & TIOCM_DTR)
1748 mcr |= UART_MCR_DTR;
1749 if (mctrl & TIOCM_OUT1)
1750 mcr |= UART_MCR_OUT1;
1751 if (mctrl & TIOCM_OUT2)
1752 mcr |= UART_MCR_OUT2;
1753 if (mctrl & TIOCM_LOOP)
1754 mcr |= UART_MCR_LOOP;
1755
1756 set_mcr(the_port, mcr, SHADOW_DTR);
1757}
1758
1759/**
1760 * ic3_get_mctrl - get control line info
1761 * @port: port to operate on
1762 *
1763 */
1764static unsigned int ic3_get_mctrl(struct uart_port *the_port)
1765{
1766 struct ioc3_port *port = get_ioc3_port(the_port);
1767 uint32_t shadow;
1768 unsigned int ret = 0;
1769
1770 if (!port)
1771 return 0;
1772
1773 shadow = readl(&port->ip_serial_regs->shadow);
1774 if (shadow & SHADOW_DCD)
1775 ret |= TIOCM_CD;
1776 if (shadow & SHADOW_DR)
1777 ret |= TIOCM_DSR;
1778 if (shadow & SHADOW_CTS)
1779 ret |= TIOCM_CTS;
1780 return ret;
1781}
1782
1783/**
1784 * ic3_start_tx - Start transmitter. Called with the_port->lock
1785 * @port: Port to operate on
1786 *
1787 */
1788static void ic3_start_tx(struct uart_port *the_port)
1789{
1790 struct ioc3_port *port = get_ioc3_port(the_port);
1791
1792 if (port) {
1793 set_notification(port, N_OUTPUT_LOWAT, 1);
1794 enable_intrs(port, port->ip_hooks->intr_tx_mt);
1795 }
1796}
1797
1798/**
1799 * ic3_break_ctl - handle breaks
1800 * @port: Port to operate on
1801 * @break_state: Break state
1802 *
1803 */
1804static void ic3_break_ctl(struct uart_port *the_port, int break_state)
1805{
1806}
1807
1808/**
1809 * ic3_startup - Start up the serial port - always return 0 (We're always on)
1810 * @port: Port to operate on
1811 *
1812 */
1813static int ic3_startup(struct uart_port *the_port)
1814{
1815 int retval;
1816 struct ioc3_port *port;
1817 struct ioc3_card *card_ptr;
1818 unsigned long port_flags;
1819
1820 if (!the_port) {
1821 NOT_PROGRESS();
1822 return -ENODEV;
1823 }
1824 port = get_ioc3_port(the_port);
1825 if (!port) {
1826 NOT_PROGRESS();
1827 return -ENODEV;
1828 }
1829 card_ptr = port->ip_card;
1830 port->ip_port = the_port;
1831
1832 if (!card_ptr) {
1833 NOT_PROGRESS();
1834 return -ENODEV;
1835 }
1836
1837 /* Start up the serial port */
1838 spin_lock_irqsave(&the_port->lock, port_flags);
1839 retval = ic3_startup_local(the_port);
1840 spin_unlock_irqrestore(&the_port->lock, port_flags);
1841 return retval;
1842}
1843
1844/**
1845 * ic3_set_termios - set termios stuff
1846 * @port: port to operate on
1847 * @termios: New settings
1848 * @termios: Old
1849 *
1850 */
1851static void
1852ic3_set_termios(struct uart_port *the_port,
1853 struct ktermios *termios, struct ktermios *old_termios)
1854{
1855 unsigned long port_flags;
1856
1857 spin_lock_irqsave(&the_port->lock, port_flags);
1858 ioc3_change_speed(the_port, termios, old_termios);
1859 spin_unlock_irqrestore(&the_port->lock, port_flags);
1860}
1861
1862/**
1863 * ic3_request_port - allocate resources for port - no op....
1864 * @port: port to operate on
1865 *
1866 */
1867static int ic3_request_port(struct uart_port *port)
1868{
1869 return 0;
1870}
1871
1872/* Associate the uart functions above - given to serial core */
1873static const struct uart_ops ioc3_ops = {
1874 .tx_empty = ic3_tx_empty,
1875 .set_mctrl = ic3_set_mctrl,
1876 .get_mctrl = ic3_get_mctrl,
1877 .stop_tx = ic3_stop_tx,
1878 .start_tx = ic3_start_tx,
1879 .stop_rx = ic3_stop_rx,
1880 .break_ctl = ic3_break_ctl,
1881 .startup = ic3_startup,
1882 .shutdown = ic3_shutdown,
1883 .set_termios = ic3_set_termios,
1884 .type = ic3_type,
1885 .release_port = null_void_function,
1886 .request_port = ic3_request_port,
1887};
1888
1889/*
1890 * Boot-time initialization code
1891 */
1892
1893static struct uart_driver ioc3_uart = {
1894 .owner = THIS_MODULE,
1895 .driver_name = "ioc3_serial",
1896 .dev_name = DEVICE_NAME,
1897 .major = DEVICE_MAJOR,
1898 .minor = DEVICE_MINOR,
1899 .nr = MAX_LOGICAL_PORTS
1900};
1901
1902/**
1903 * ioc3_serial_core_attach - register with serial core
1904 * This is done during pci probing
1905 * @is: submodule struct for this
1906 * @idd: handle for this card
1907 */
1908static inline int ioc3_serial_core_attach( struct ioc3_submodule *is,
1909 struct ioc3_driver_data *idd)
1910{
1911 struct ioc3_port *port;
1912 struct uart_port *the_port;
1913 struct ioc3_card *card_ptr = idd->data[is->id];
1914 int ii, phys_port;
1915 struct pci_dev *pdev = idd->pdev;
1916
1917 DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n",
1918 __func__, pdev, (void *)card_ptr));
1919
1920 if (!card_ptr)
1921 return -ENODEV;
1922
1923 /* once around for each logical port on this card */
1924 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
1925 phys_port = GET_PHYSICAL_PORT(ii);
1926 the_port = &card_ptr->ic_port[phys_port].
1927 icp_uart_port[GET_LOGICAL_PORT(ii)];
1928 port = card_ptr->ic_port[phys_port].icp_port;
1929 port->ip_port = the_port;
1930
1931 DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n",
1932 __func__, (void *)the_port, (void *)port,
1933 phys_port, ii));
1934
1935 /* membase, iobase and mapbase just need to be non-0 */
1936 the_port->membase = (unsigned char __iomem *)1;
1937 the_port->iobase = (pdev->bus->number << 16) | ii;
1938 the_port->line = (Num_of_ioc3_cards << 2) | ii;
1939 the_port->mapbase = 1;
1940 the_port->type = PORT_16550A;
1941 the_port->fifosize = FIFO_SIZE;
1942 the_port->ops = &ioc3_ops;
1943 the_port->irq = idd->irq_io;
1944 the_port->dev = &pdev->dev;
1945
1946 if (uart_add_one_port(&ioc3_uart, the_port) < 0) {
1947 printk(KERN_WARNING
1948 "%s: unable to add port %d bus %d\n",
1949 __func__, the_port->line, pdev->bus->number);
1950 } else {
1951 DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n",
1952 the_port->line, the_port->irq, pdev->bus->number));
1953 }
1954
1955 /* all ports are rs232 for now */
1956 if (IS_PHYSICAL_PORT(ii))
1957 ioc3_set_proto(port, PROTO_RS232);
1958 }
1959 return 0;
1960}
1961
1962/**
1963 * ioc3uart_remove - register detach function
1964 * @is: submodule struct for this submodule
1965 * @idd: ioc3 driver data for this submodule
1966 */
1967
1968static int ioc3uart_remove(struct ioc3_submodule *is,
1969 struct ioc3_driver_data *idd)
1970{
1971 struct ioc3_card *card_ptr = idd->data[is->id];
1972 struct uart_port *the_port;
1973 struct ioc3_port *port;
1974 int ii;
1975
1976 if (card_ptr) {
1977 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
1978 the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
1979 icp_uart_port[GET_LOGICAL_PORT(ii)];
1980 if (the_port)
1981 uart_remove_one_port(&ioc3_uart, the_port);
1982 port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port;
1983 if (port && IS_PHYSICAL_PORT(ii)
1984 && (GET_PHYSICAL_PORT(ii) == 0)) {
1985 pci_free_consistent(port->ip_idd->pdev,
1986 TOTAL_RING_BUF_SIZE,
1987 (void *)port->ip_cpu_ringbuf,
1988 port->ip_dma_ringbuf);
1989 kfree(port);
1990 card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
1991 icp_port = NULL;
1992 }
1993 }
1994 kfree(card_ptr);
1995 idd->data[is->id] = NULL;
1996 }
1997 return 0;
1998}
1999
2000/**
2001 * ioc3uart_probe - card probe function called from shim driver
2002 * @is: submodule struct for this submodule
2003 * @idd: ioc3 driver data for this card
2004 */
2005
2006static int
2007ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
2008{
2009 struct pci_dev *pdev = idd->pdev;
2010 struct ioc3_card *card_ptr;
2011 int ret = 0;
2012 struct ioc3_port *port;
2013 struct ioc3_port *ports[PORTS_PER_CARD];
2014 int phys_port;
2015 int cnt;
2016
2017 DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __func__, is, idd));
2018
2019 card_ptr = kzalloc(sizeof(struct ioc3_card), GFP_KERNEL);
2020 if (!card_ptr) {
2021 printk(KERN_WARNING "ioc3_attach_one"
2022 ": unable to get memory for the IOC3\n");
2023 return -ENOMEM;
2024 }
2025 idd->data[is->id] = card_ptr;
2026 Submodule_slot = is->id;
2027
2028 writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) |
2029 ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) |
2030 (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr);
2031
2032 pci_write_config_dword(pdev, PCI_LAT, 0xff00);
2033
2034 /* Enable serial port mode select generic PIO pins as outputs */
2035 ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL);
2036
2037 /* Create port structures for each port */
2038 for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) {
2039 port = kzalloc(sizeof(struct ioc3_port), GFP_KERNEL);
2040 if (!port) {
2041 printk(KERN_WARNING
2042 "IOC3 serial memory not available for port\n");
2043 ret = -ENOMEM;
2044 goto out4;
2045 }
2046 spin_lock_init(&port->ip_lock);
2047
2048 /* we need to remember the previous ones, to point back to
2049 * them farther down - setting up the ring buffers.
2050 */
2051 ports[phys_port] = port;
2052
2053 /* init to something useful */
2054 card_ptr->ic_port[phys_port].icp_port = port;
2055 port->ip_is = is;
2056 port->ip_idd = idd;
2057 port->ip_baud = 9600;
2058 port->ip_card = card_ptr;
2059 port->ip_hooks = &hooks_array[phys_port];
2060
2061 /* Setup each port */
2062 if (phys_port == 0) {
2063 port->ip_serial_regs = &idd->vma->port_a;
2064 port->ip_uart_regs = &idd->vma->sregs.uarta;
2065
2066 DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p "
2067 "ip_uart_regs 0x%p\n",
2068 __func__,
2069 (void *)port->ip_serial_regs,
2070 (void *)port->ip_uart_regs));
2071
2072 /* setup ring buffers */
2073 port->ip_cpu_ringbuf = pci_alloc_consistent(pdev,
2074 TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf);
2075
2076 BUG_ON(!((((int64_t) port->ip_dma_ringbuf) &
2077 (TOTAL_RING_BUF_SIZE - 1)) == 0));
2078 port->ip_inring = RING(port, RX_A);
2079 port->ip_outring = RING(port, TX_A);
2080 DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p "
2081 "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
2082 "ip_outring 0x%p\n",
2083 __func__,
2084 (void *)port->ip_cpu_ringbuf,
2085 (void *)port->ip_dma_ringbuf,
2086 (void *)port->ip_inring,
2087 (void *)port->ip_outring));
2088 }
2089 else {
2090 port->ip_serial_regs = &idd->vma->port_b;
2091 port->ip_uart_regs = &idd->vma->sregs.uartb;
2092
2093 DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p "
2094 "ip_uart_regs 0x%p\n",
2095 __func__,
2096 (void *)port->ip_serial_regs,
2097 (void *)port->ip_uart_regs));
2098
2099 /* share the ring buffers */
2100 port->ip_dma_ringbuf =
2101 ports[phys_port - 1]->ip_dma_ringbuf;
2102 port->ip_cpu_ringbuf =
2103 ports[phys_port - 1]->ip_cpu_ringbuf;
2104 port->ip_inring = RING(port, RX_B);
2105 port->ip_outring = RING(port, TX_B);
2106 DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p "
2107 "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
2108 "ip_outring 0x%p\n",
2109 __func__,
2110 (void *)port->ip_cpu_ringbuf,
2111 (void *)port->ip_dma_ringbuf,
2112 (void *)port->ip_inring,
2113 (void *)port->ip_outring));
2114 }
2115
2116 DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p",
2117 __func__,
2118 phys_port, (void *)port, (void *)card_ptr));
2119 DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n",
2120 (void *)port->ip_serial_regs,
2121 (void *)port->ip_uart_regs));
2122
2123 /* Initialize the hardware for IOC3 */
2124 port_init(port);
2125
2126 DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p "
2127 "outring 0x%p\n",
2128 __func__,
2129 phys_port, (void *)port,
2130 (void *)port->ip_inring,
2131 (void *)port->ip_outring));
2132
2133 }
2134
2135 /* register port with the serial core */
2136
2137 ret = ioc3_serial_core_attach(is, idd);
2138 if (ret)
2139 goto out4;
2140
2141 Num_of_ioc3_cards++;
2142
2143 return ret;
2144
2145 /* error exits that give back resources */
2146out4:
2147 for (cnt = 0; cnt < phys_port; cnt++)
2148 kfree(ports[cnt]);
2149
2150 kfree(card_ptr);
2151 return ret;
2152}
2153
2154static struct ioc3_submodule ioc3uart_ops = {
2155 .name = "IOC3uart",
2156 .probe = ioc3uart_probe,
2157 .remove = ioc3uart_remove,
2158 /* call .intr for both ports initially */
2159 .irq_mask = SIO_IR_SA | SIO_IR_SB,
2160 .intr = ioc3uart_intr,
2161 .owner = THIS_MODULE,
2162};
2163
2164/**
2165 * ioc3_detect - module init called,
2166 */
2167static int __init ioc3uart_init(void)
2168{
2169 int ret;
2170
2171 /* register with serial core */
2172 if ((ret = uart_register_driver(&ioc3_uart)) < 0) {
2173 printk(KERN_WARNING
2174 "%s: Couldn't register IOC3 uart serial driver\n",
2175 __func__);
2176 return ret;
2177 }
2178 ret = ioc3_register_submodule(&ioc3uart_ops);
2179 if (ret)
2180 uart_unregister_driver(&ioc3_uart);
2181 return ret;
2182}
2183
2184static void __exit ioc3uart_exit(void)
2185{
2186 ioc3_unregister_submodule(&ioc3uart_ops);
2187 uart_unregister_driver(&ioc3_uart);
2188}
2189
2190module_init(ioc3uart_init);
2191module_exit(ioc3uart_exit);
2192
2193MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>");
2194MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card");
2195MODULE_LICENSE("GPL");