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1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/*
3 * Copyright (C) 2012-2014, 2018-2019, 2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#ifndef __iwl_fw_api_config_h__
8#define __iwl_fw_api_config_h__
9
10/*
11 * struct iwl_dqa_enable_cmd
12 * @cmd_queue: the TXQ number of the command queue
13 */
14struct iwl_dqa_enable_cmd {
15 __le32 cmd_queue;
16} __packed; /* DQA_CONTROL_CMD_API_S_VER_1 */
17
18/*
19 * struct iwl_tx_ant_cfg_cmd
20 * @valid: valid antenna configuration
21 */
22struct iwl_tx_ant_cfg_cmd {
23 __le32 valid;
24} __packed;
25
26/**
27 * struct iwl_calib_ctrl - Calibration control struct.
28 * Sent as part of the phy configuration command.
29 * @flow_trigger: bitmap for which calibrations to perform according to
30 * flow triggers, using &enum iwl_calib_cfg
31 * @event_trigger: bitmap for which calibrations to perform according to
32 * event triggers, using &enum iwl_calib_cfg
33 */
34struct iwl_calib_ctrl {
35 __le32 flow_trigger;
36 __le32 event_trigger;
37} __packed;
38
39/* This enum defines the bitmap of various calibrations to enable in both
40 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
41 */
42enum iwl_calib_cfg {
43 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
44 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
45 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
46 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
47 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
48 IWL_CALIB_CFG_DC_IDX = BIT(5),
49 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
50 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
51 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
52 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
53 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
54 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
55 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
56 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
57 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
58 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
59 IWL_CALIB_CFG_DAC_IDX = BIT(16),
60 IWL_CALIB_CFG_ABS_IDX = BIT(17),
61 IWL_CALIB_CFG_AGC_IDX = BIT(18),
62};
63
64/**
65 * struct iwl_phy_specific_cfg - specific PHY filter configuration
66 *
67 * Sent as part of the phy configuration command (v3) to configure specific FW
68 * defined PHY filters that can be applied to each antenna.
69 *
70 * @filter_cfg_chains: filter config id for LMAC1 chain A, LMAC1 chain B,
71 * LMAC2 chain A, LMAC2 chain B (in that order)
72 * values: 0: no filter; 0xffffffff: reserved; otherwise: filter id
73 */
74struct iwl_phy_specific_cfg {
75 __le32 filter_cfg_chains[4];
76} __packed; /* PHY_SPECIFIC_CONFIGURATION_API_VER_1*/
77
78/**
79 * struct iwl_phy_cfg_cmd - Phy configuration command
80 *
81 * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
82 * @calib_control: calibration control data
83 */
84struct iwl_phy_cfg_cmd_v1 {
85 __le32 phy_cfg;
86 struct iwl_calib_ctrl calib_control;
87} __packed;
88
89/**
90 * struct iwl_phy_cfg_cmd_v3 - Phy configuration command (v3)
91 *
92 * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
93 * @calib_control: calibration control data
94 * @phy_specific_cfg: configure predefined PHY filters
95 */
96struct iwl_phy_cfg_cmd_v3 {
97 __le32 phy_cfg;
98 struct iwl_calib_ctrl calib_control;
99 struct iwl_phy_specific_cfg phy_specific_cfg;
100} __packed; /* PHY_CONFIGURATION_CMD_API_S_VER_3 */
101
102/*
103 * enum iwl_dc2dc_config_id - flag ids
104 *
105 * Ids of dc2dc configuration flags
106 */
107enum iwl_dc2dc_config_id {
108 DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */
109 DCDC_FREQ_TUNE_SET = 0x2,
110}; /* MARKER_ID_API_E_VER_1 */
111
112#endif /* __iwl_fw_api_config_h__ */
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called COPYING.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <linuxwifi@intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 * BSD LICENSE
29 *
30 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
31 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
32 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
33 * All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 *
39 * * Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * * Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in
43 * the documentation and/or other materials provided with the
44 * distribution.
45 * * Neither the name Intel Corporation nor the names of its
46 * contributors may be used to endorse or promote products derived
47 * from this software without specific prior written permission.
48 *
49 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
50 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
51 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
52 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
53 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
54 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
55 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60 *
61 *****************************************************************************/
62
63#ifndef __iwl_fw_api_config_h__
64#define __iwl_fw_api_config_h__
65
66/*
67 * struct iwl_dqa_enable_cmd
68 * @cmd_queue: the TXQ number of the command queue
69 */
70struct iwl_dqa_enable_cmd {
71 __le32 cmd_queue;
72} __packed; /* DQA_CONTROL_CMD_API_S_VER_1 */
73
74/*
75 * struct iwl_tx_ant_cfg_cmd
76 * @valid: valid antenna configuration
77 */
78struct iwl_tx_ant_cfg_cmd {
79 __le32 valid;
80} __packed;
81
82/**
83 * struct iwl_calib_ctrl - Calibration control struct.
84 * Sent as part of the phy configuration command.
85 * @flow_trigger: bitmap for which calibrations to perform according to
86 * flow triggers, using &enum iwl_calib_cfg
87 * @event_trigger: bitmap for which calibrations to perform according to
88 * event triggers, using &enum iwl_calib_cfg
89 */
90struct iwl_calib_ctrl {
91 __le32 flow_trigger;
92 __le32 event_trigger;
93} __packed;
94
95/* This enum defines the bitmap of various calibrations to enable in both
96 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
97 */
98enum iwl_calib_cfg {
99 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
100 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
101 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
102 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
103 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
104 IWL_CALIB_CFG_DC_IDX = BIT(5),
105 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
106 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
107 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
108 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
109 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
110 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
111 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
112 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
113 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
114 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
115 IWL_CALIB_CFG_DAC_IDX = BIT(16),
116 IWL_CALIB_CFG_ABS_IDX = BIT(17),
117 IWL_CALIB_CFG_AGC_IDX = BIT(18),
118};
119
120/**
121 * struct iwl_phy_cfg_cmd - Phy configuration command
122 * @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
123 * @calib_control: calibration control data
124 */
125struct iwl_phy_cfg_cmd {
126 __le32 phy_cfg;
127 struct iwl_calib_ctrl calib_control;
128} __packed;
129
130#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
131#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
132#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
133#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
134#define PHY_CFG_TX_CHAIN_A BIT(8)
135#define PHY_CFG_TX_CHAIN_B BIT(9)
136#define PHY_CFG_TX_CHAIN_C BIT(10)
137#define PHY_CFG_RX_CHAIN_A BIT(12)
138#define PHY_CFG_RX_CHAIN_B BIT(13)
139#define PHY_CFG_RX_CHAIN_C BIT(14)
140
141/*
142 * enum iwl_dc2dc_config_id - flag ids
143 *
144 * Ids of dc2dc configuration flags
145 */
146enum iwl_dc2dc_config_id {
147 DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */
148 DCDC_FREQ_TUNE_SET = 0x2,
149}; /* MARKER_ID_API_E_VER_1 */
150
151/**
152 * struct iwl_dc2dc_config_cmd - configure dc2dc values
153 *
154 * (DC2DC_CONFIG_CMD = 0x83)
155 *
156 * Set/Get & configure dc2dc values.
157 * The command always returns the current dc2dc values.
158 *
159 * @flags: set/get dc2dc
160 * @enable_low_power_mode: not used.
161 * @dc2dc_freq_tune0: frequency divider - digital domain
162 * @dc2dc_freq_tune1: frequency divider - analog domain
163 */
164struct iwl_dc2dc_config_cmd {
165 __le32 flags;
166 __le32 enable_low_power_mode; /* not used */
167 __le32 dc2dc_freq_tune0;
168 __le32 dc2dc_freq_tune1;
169} __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */
170
171/**
172 * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd
173 *
174 * Current dc2dc values returned by the FW.
175 *
176 * @dc2dc_freq_tune0: frequency divider - digital domain
177 * @dc2dc_freq_tune1: frequency divider - analog domain
178 */
179struct iwl_dc2dc_config_resp {
180 __le32 dc2dc_freq_tune0;
181 __le32 dc2dc_freq_tune1;
182} __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */
183
184#endif /* __iwl_fw_api_config_h__ */