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1/* SPDX-License-Identifier: GPL-2.0-only */
2/******************************************************************************
3
4 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
5
6
7 Contact Information:
8 Intel Linux Wireless <ilw@linux.intel.com>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10
11******************************************************************************/
12#ifndef _IPW2100_H
13#define _IPW2100_H
14
15#include <linux/sched.h>
16#include <linux/interrupt.h>
17#include <linux/netdevice.h>
18#include <linux/etherdevice.h>
19#include <linux/list.h>
20#include <linux/delay.h>
21#include <linux/skbuff.h>
22#include <asm/io.h>
23#include <linux/socket.h>
24#include <linux/if_arp.h>
25#include <linux/wireless.h>
26#include <net/iw_handler.h> // new driver API
27
28#ifdef CONFIG_IPW2100_MONITOR
29#include <net/ieee80211_radiotap.h>
30#endif
31
32#include <linux/workqueue.h>
33#include <linux/mutex.h>
34
35#include "libipw.h"
36
37struct ipw2100_priv;
38struct ipw2100_tx_packet;
39struct ipw2100_rx_packet;
40
41#define IPW_DL_UNINIT 0x80000000
42#define IPW_DL_NONE 0x00000000
43#define IPW_DL_ALL 0x7FFFFFFF
44
45/*
46 * To use the debug system;
47 *
48 * If you are defining a new debug classification, simply add it to the #define
49 * list here in the form of:
50 *
51 * #define IPW_DL_xxxx VALUE
52 *
53 * shifting value to the left one bit from the previous entry. xxxx should be
54 * the name of the classification (for example, WEP)
55 *
56 * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
57 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
58 * to send output to that classification.
59 *
60 * To add your debug level to the list of levels seen when you perform
61 *
62 * % cat /proc/net/ipw2100/debug_level
63 *
64 * you simply need to add your entry to the ipw2100_debug_levels array.
65 *
66 * If you do not see debug_level in /proc/net/ipw2100 then you do not have
67 * CONFIG_IPW2100_DEBUG defined in your kernel configuration
68 *
69 */
70
71#define IPW_DL_ERROR (1<<0)
72#define IPW_DL_WARNING (1<<1)
73#define IPW_DL_INFO (1<<2)
74#define IPW_DL_WX (1<<3)
75#define IPW_DL_HC (1<<5)
76#define IPW_DL_STATE (1<<6)
77
78#define IPW_DL_NOTIF (1<<10)
79#define IPW_DL_SCAN (1<<11)
80#define IPW_DL_ASSOC (1<<12)
81#define IPW_DL_DROP (1<<13)
82
83#define IPW_DL_IOCTL (1<<14)
84#define IPW_DL_RF_KILL (1<<17)
85
86#define IPW_DL_MANAGE (1<<15)
87#define IPW_DL_FW (1<<16)
88
89#define IPW_DL_FRAG (1<<21)
90#define IPW_DL_WEP (1<<22)
91#define IPW_DL_TX (1<<23)
92#define IPW_DL_RX (1<<24)
93#define IPW_DL_ISR (1<<25)
94#define IPW_DL_IO (1<<26)
95#define IPW_DL_TRACE (1<<28)
96
97#define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
98#define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
99#define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
100#define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
101#define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
102#define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
103#define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
104#define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
105#define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
106#define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
107#define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
108#define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
109#define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
110#define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
111#define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
112#define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
113#define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
114#define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
115#define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
116#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
117#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
118
119enum {
120 IPW_HW_STATE_DISABLED = 1,
121 IPW_HW_STATE_ENABLED = 0
122};
123
124extern const char *port_type_str[];
125extern const char *band_str[];
126
127#define NUMBER_OF_BD_PER_COMMAND_PACKET 1
128#define NUMBER_OF_BD_PER_DATA_PACKET 2
129
130#define IPW_MAX_BDS 6
131#define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
132#define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
133
134#define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
135 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
136
137struct bd_status {
138 union {
139 struct {
140 u8 nlf:1, txType:2, intEnabled:1, reserved:4;
141 } fields;
142 u8 field;
143 } info;
144} __packed;
145
146struct ipw2100_bd {
147 u32 host_addr;
148 u32 buf_length;
149 struct bd_status status;
150 /* number of fragments for frame (should be set only for
151 * 1st TBD) */
152 u8 num_fragments;
153 u8 reserved[6];
154} __packed;
155
156#define IPW_BD_QUEUE_LENGTH(n) (1<<n)
157#define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
158
159#define IPW_BD_STATUS_TX_FRAME_802_3 0x00
160#define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
161#define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
162#define IPW_BD_STATUS_TX_FRAME_802_11 0x04
163#define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
164
165struct ipw2100_bd_queue {
166 /* driver (virtual) pointer to queue */
167 struct ipw2100_bd *drv;
168
169 /* firmware (physical) pointer to queue */
170 dma_addr_t nic;
171
172 /* Length of phy memory allocated for BDs */
173 u32 size;
174
175 /* Number of BDs in queue (and in array) */
176 u32 entries;
177
178 /* Number of available BDs (invalid for NIC BDs) */
179 u32 available;
180
181 /* Offset of oldest used BD in array (next one to
182 * check for completion) */
183 u32 oldest;
184
185 /* Offset of next available (unused) BD */
186 u32 next;
187};
188
189#define RX_QUEUE_LENGTH 256
190#define TX_QUEUE_LENGTH 256
191#define HW_QUEUE_LENGTH 256
192
193#define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
194
195#define STATUS_TYPE_MASK 0x0000000f
196#define COMMAND_STATUS_VAL 0
197#define STATUS_CHANGE_VAL 1
198#define P80211_DATA_VAL 2
199#define P8023_DATA_VAL 3
200#define HOST_NOTIFICATION_VAL 4
201
202#define IPW2100_RSSI_TO_DBM (-98)
203
204struct ipw2100_status {
205 u32 frame_size;
206 u16 status_fields;
207 u8 flags;
208#define IPW_STATUS_FLAG_DECRYPTED (1<<0)
209#define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
210#define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
211 u8 rssi;
212} __packed;
213
214struct ipw2100_status_queue {
215 /* driver (virtual) pointer to queue */
216 struct ipw2100_status *drv;
217
218 /* firmware (physical) pointer to queue */
219 dma_addr_t nic;
220
221 /* Length of phy memory allocated for BDs */
222 u32 size;
223};
224
225#define HOST_COMMAND_PARAMS_REG_LEN 100
226#define CMD_STATUS_PARAMS_REG_LEN 3
227
228#define IPW_WPA_CAPABILITIES 0x1
229#define IPW_WPA_LISTENINTERVAL 0x2
230#define IPW_WPA_AP_ADDRESS 0x4
231
232#define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
233
234struct ipw2100_wpa_assoc_frame {
235 u16 fixed_ie_mask;
236 struct {
237 u16 capab_info;
238 u16 listen_interval;
239 u8 current_ap[ETH_ALEN];
240 } fixed_ies;
241 u32 var_ie_len;
242 u8 var_ie[IPW_MAX_VAR_IE_LEN];
243};
244
245#define IPW_BSS 1
246#define IPW_MONITOR 2
247#define IPW_IBSS 3
248
249/**
250 * @struct _tx_cmd - HWCommand
251 * @brief H/W command structure.
252 */
253struct ipw2100_cmd_header {
254 u32 host_command_reg;
255 u32 host_command_reg1;
256 u32 sequence;
257 u32 host_command_len_reg;
258 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
259 u32 cmd_status_reg;
260 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
261 u32 rxq_base_ptr;
262 u32 rxq_next_ptr;
263 u32 rxq_host_ptr;
264 u32 txq_base_ptr;
265 u32 txq_next_ptr;
266 u32 txq_host_ptr;
267 u32 tx_status_reg;
268 u32 reserved;
269 u32 status_change_reg;
270 u32 reserved1[3];
271 u32 *ordinal1_ptr;
272 u32 *ordinal2_ptr;
273} __packed;
274
275struct ipw2100_data_header {
276 u32 host_command_reg;
277 u32 host_command_reg1;
278 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
279 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
280 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
281 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
282 u8 key[16];
283 u8 reserved[10]; // f/w reserved
284 u8 src_addr[ETH_ALEN];
285 u8 dst_addr[ETH_ALEN];
286 u16 fragment_size;
287} __packed;
288
289/* Host command data structure */
290struct host_command {
291 u32 host_command; // COMMAND ID
292 u32 host_command1; // COMMAND ID
293 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
294 u32 host_command_length; // LENGTH
295 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
296} __packed;
297
298typedef enum {
299 POWER_ON_RESET,
300 EXIT_POWER_DOWN_RESET,
301 SW_RESET,
302 EEPROM_RW,
303 SW_RE_INIT
304} ipw2100_reset_event;
305
306enum {
307 COMMAND = 0xCAFE,
308 DATA,
309 RX
310};
311
312struct ipw2100_tx_packet {
313 int type;
314 int index;
315 union {
316 struct { /* COMMAND */
317 struct ipw2100_cmd_header *cmd;
318 dma_addr_t cmd_phys;
319 } c_struct;
320 struct { /* DATA */
321 struct ipw2100_data_header *data;
322 dma_addr_t data_phys;
323 struct libipw_txb *txb;
324 } d_struct;
325 } info;
326 int jiffy_start;
327
328 struct list_head list;
329};
330
331struct ipw2100_rx_packet {
332 struct ipw2100_rx *rxp;
333 dma_addr_t dma_addr;
334 int jiffy_start;
335 struct sk_buff *skb;
336 struct list_head list;
337};
338
339#define FRAG_DISABLED (1<<31)
340#define RTS_DISABLED (1<<31)
341#define MAX_RTS_THRESHOLD 2304U
342#define MIN_RTS_THRESHOLD 1U
343#define DEFAULT_RTS_THRESHOLD 1000U
344
345#define DEFAULT_BEACON_INTERVAL 100U
346#define DEFAULT_SHORT_RETRY_LIMIT 7U
347#define DEFAULT_LONG_RETRY_LIMIT 4U
348
349struct ipw2100_ordinals {
350 u32 table1_addr;
351 u32 table2_addr;
352 u32 table1_size;
353 u32 table2_size;
354};
355
356/* Host Notification header */
357struct ipw2100_notification {
358 u32 hnhdr_subtype; /* type of host notification */
359 u32 hnhdr_size; /* size in bytes of data
360 or number of entries, if table.
361 Does NOT include header */
362} __packed;
363
364#define MAX_KEY_SIZE 16
365#define MAX_KEYS 8
366
367#define IPW2100_WEP_ENABLE (1<<1)
368#define IPW2100_WEP_DROP_CLEAR (1<<2)
369
370#define IPW_NONE_CIPHER (1<<0)
371#define IPW_WEP40_CIPHER (1<<1)
372#define IPW_TKIP_CIPHER (1<<2)
373#define IPW_CCMP_CIPHER (1<<4)
374#define IPW_WEP104_CIPHER (1<<5)
375#define IPW_CKIP_CIPHER (1<<6)
376
377#define IPW_AUTH_OPEN 0
378#define IPW_AUTH_SHARED 1
379#define IPW_AUTH_LEAP 2
380#define IPW_AUTH_LEAP_CISCO_ID 0x80
381
382struct statistic {
383 int value;
384 int hi;
385 int lo;
386};
387
388#define INIT_STAT(x) do { \
389 (x)->value = (x)->hi = 0; \
390 (x)->lo = 0x7fffffff; \
391} while (0)
392#define SET_STAT(x,y) do { \
393 (x)->value = y; \
394 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
395 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
396} while (0)
397#define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
398while (0)
399#define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
400while (0)
401
402#define IPW2100_ERROR_QUEUE 5
403
404/* Power management code: enable or disable? */
405enum {
406#ifdef CONFIG_PM
407 IPW2100_PM_DISABLED = 0,
408 PM_STATE_SIZE = 16,
409#else
410 IPW2100_PM_DISABLED = 1,
411 PM_STATE_SIZE = 0,
412#endif
413};
414
415#define STATUS_POWERED (1<<0)
416#define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
417#define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
418#define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
419#define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
420#define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
421#define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
422#define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
423#define STATUS_INT_ENABLED (1<<11)
424#define STATUS_RF_KILL_HW (1<<12)
425#define STATUS_RF_KILL_SW (1<<13)
426#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
427#define STATUS_EXIT_PENDING (1<<14)
428
429#define STATUS_SCAN_PENDING (1<<23)
430#define STATUS_SCANNING (1<<24)
431#define STATUS_SCAN_ABORTING (1<<25)
432#define STATUS_SCAN_COMPLETE (1<<26)
433#define STATUS_WX_EVENT_PENDING (1<<27)
434#define STATUS_RESET_PENDING (1<<29)
435#define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
436
437/* Internal NIC states */
438#define IPW_STATE_INITIALIZED (1<<0)
439#define IPW_STATE_COUNTRY_FOUND (1<<1)
440#define IPW_STATE_ASSOCIATED (1<<2)
441#define IPW_STATE_ASSN_LOST (1<<3)
442#define IPW_STATE_ASSN_CHANGED (1<<4)
443#define IPW_STATE_SCAN_COMPLETE (1<<5)
444#define IPW_STATE_ENTERED_PSP (1<<6)
445#define IPW_STATE_LEFT_PSP (1<<7)
446#define IPW_STATE_RF_KILL (1<<8)
447#define IPW_STATE_DISABLED (1<<9)
448#define IPW_STATE_POWER_DOWN (1<<10)
449#define IPW_STATE_SCANNING (1<<11)
450
451#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
452#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
453#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
454#define CFG_CUSTOM_MAC (1<<3)
455#define CFG_LONG_PREAMBLE (1<<4)
456#define CFG_ASSOCIATE (1<<6)
457#define CFG_FIXED_RATE (1<<7)
458#define CFG_ADHOC_CREATE (1<<8)
459#define CFG_PASSIVE_SCAN (1<<10)
460#ifdef CONFIG_IPW2100_MONITOR
461#define CFG_CRC_CHECK (1<<11)
462#endif
463
464#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
465#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
466
467struct ipw2100_priv {
468 void __iomem *ioaddr;
469
470 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
471 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
472
473 struct libipw_device *ieee;
474 unsigned long status;
475 unsigned long config;
476 unsigned long capability;
477
478 /* Statistics */
479 int resets;
480 time64_t reset_backoff;
481
482 /* Context */
483 u8 essid[IW_ESSID_MAX_SIZE];
484 u8 essid_len;
485 u8 bssid[ETH_ALEN];
486 u8 channel;
487 int last_mode;
488
489 time64_t connect_start;
490 time64_t last_reset;
491
492 u32 channel_mask;
493 u32 fatal_error;
494 u32 fatal_errors[IPW2100_ERROR_QUEUE];
495 u32 fatal_index;
496 int eeprom_version;
497 int firmware_version;
498 unsigned long hw_features;
499 int hangs;
500 u32 last_rtc;
501 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
502 u8 *snapshot[0x30];
503
504 u8 mandatory_bssid_mac[ETH_ALEN];
505 u8 mac_addr[ETH_ALEN];
506
507 int power_mode;
508
509 int messages_sent;
510
511 int short_retry_limit;
512 int long_retry_limit;
513
514 u32 rts_threshold;
515 u32 frag_threshold;
516
517 int in_isr;
518
519 u32 tx_rates;
520 int tx_power;
521 u32 beacon_interval;
522
523 char nick[IW_ESSID_MAX_SIZE + 1];
524
525 struct ipw2100_status_queue status_queue;
526
527 struct statistic txq_stat;
528 struct statistic rxq_stat;
529 struct ipw2100_bd_queue rx_queue;
530 struct ipw2100_bd_queue tx_queue;
531 struct ipw2100_rx_packet *rx_buffers;
532
533 struct statistic fw_pend_stat;
534 struct list_head fw_pend_list;
535
536 struct statistic msg_free_stat;
537 struct statistic msg_pend_stat;
538 struct list_head msg_free_list;
539 struct list_head msg_pend_list;
540 struct ipw2100_tx_packet *msg_buffers;
541
542 struct statistic tx_free_stat;
543 struct statistic tx_pend_stat;
544 struct list_head tx_free_list;
545 struct list_head tx_pend_list;
546 struct ipw2100_tx_packet *tx_buffers;
547
548 struct ipw2100_ordinals ordinals;
549
550 struct pci_dev *pci_dev;
551
552 struct proc_dir_entry *dir_dev;
553
554 struct net_device *net_dev;
555 struct iw_statistics wstats;
556
557 struct iw_public_data wireless_data;
558
559 struct tasklet_struct irq_tasklet;
560
561 struct delayed_work reset_work;
562 struct delayed_work security_work;
563 struct delayed_work wx_event_work;
564 struct delayed_work hang_check;
565 struct delayed_work rf_kill;
566 struct delayed_work scan_event;
567
568 int user_requested_scan;
569
570 /* Track time in suspend, using CLOCK_BOOTTIME */
571 time64_t suspend_at;
572 time64_t suspend_time;
573
574 u32 interrupts;
575 int tx_interrupts;
576 int rx_interrupts;
577 int inta_other;
578
579 spinlock_t low_lock;
580 struct mutex action_mutex;
581 struct mutex adapter_mutex;
582
583 wait_queue_head_t wait_command_queue;
584};
585
586/*********************************************************
587 * Host Command -> From Driver to FW
588 *********************************************************/
589
590/**
591 * Host command identifiers
592 */
593#define HOST_COMPLETE 2
594#define SYSTEM_CONFIG 6
595#define SSID 8
596#define MANDATORY_BSSID 9
597#define AUTHENTICATION_TYPE 10
598#define ADAPTER_ADDRESS 11
599#define PORT_TYPE 12
600#define INTERNATIONAL_MODE 13
601#define CHANNEL 14
602#define RTS_THRESHOLD 15
603#define FRAG_THRESHOLD 16
604#define POWER_MODE 17
605#define TX_RATES 18
606#define BASIC_TX_RATES 19
607#define WEP_KEY_INFO 20
608#define WEP_KEY_INDEX 25
609#define WEP_FLAGS 26
610#define ADD_MULTICAST 27
611#define CLEAR_ALL_MULTICAST 28
612#define BEACON_INTERVAL 29
613#define ATIM_WINDOW 30
614#define CLEAR_STATISTICS 31
615#define SEND 33
616#define TX_POWER_INDEX 36
617#define BROADCAST_SCAN 43
618#define CARD_DISABLE 44
619#define PREFERRED_BSSID 45
620#define SET_SCAN_OPTIONS 46
621#define SCAN_DWELL_TIME 47
622#define SWEEP_TABLE 48
623#define AP_OR_STATION_TABLE 49
624#define GROUP_ORDINALS 50
625#define SHORT_RETRY_LIMIT 51
626#define LONG_RETRY_LIMIT 52
627
628#define HOST_PRE_POWER_DOWN 58
629#define CARD_DISABLE_PHY_OFF 61
630#define MSDU_TX_RATES 62
631
632/* Rogue AP Detection */
633#define SET_STATION_STAT_BITS 64
634#define CLEAR_STATIONS_STAT_BITS 65
635#define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
636#define SET_SECURITY_INFORMATION 67
637#define DISASSOCIATION_BSSID 68
638#define SET_WPA_IE 69
639
640/* system configuration bit mask: */
641#define IPW_CFG_MONITOR 0x00004
642#define IPW_CFG_PREAMBLE_AUTO 0x00010
643#define IPW_CFG_IBSS_AUTO_START 0x00020
644#define IPW_CFG_LOOPBACK 0x00100
645#define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
646#define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
647#define IPW_CFG_802_1x_ENABLE 0x04000
648#define IPW_CFG_BSS_MASK 0x08000
649#define IPW_CFG_IBSS_MASK 0x10000
650
651#define IPW_SCAN_NOASSOCIATE (1<<0)
652#define IPW_SCAN_MIXED_CELL (1<<1)
653/* RESERVED (1<<2) */
654#define IPW_SCAN_PASSIVE (1<<3)
655
656#define IPW_NIC_FATAL_ERROR 0x2A7F0
657#define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
658#define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
659#define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
660#define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
661#define IPW2100_ERR_FW_LOAD (0x12 << 24)
662
663#define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
664#define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
665
666#define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
667#define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
668#define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
669#define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
670
671#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
672#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
673#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
674
675#define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
676 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
677
678#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
679 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
680
681#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
682#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
683
684#define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
685#define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
686#define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
687#define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
688#define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
689#define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
690#define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
691#define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
692#define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
693#define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
694#define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
695
696#define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
697#define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
698#define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
699#define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
700#define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
701#define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
702#define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
703
704#define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
705#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
706#define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
707#define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
708#define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
709#define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
710#define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
711#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
712#define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
713
714#define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
715#define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
716#define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
717#define IPW_BIT_GPIO_RF_KILL 0x00010000
718
719#define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
720
721#define IPW_REG_DOMAIN_0_OFFSET 0x0000
722#define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
723
724#define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
725#define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
726#define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
727#define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
728#define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
729#define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
730#define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
731#define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
732#define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
733#define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
734#define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
735#define IPW_REG_FW_COMPATIBILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
736
737#define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
738
739#define IPW_INTERRUPT_MASK 0xC1010013
740
741#define IPW2100_CONTROL_REG 0x220000
742#define IPW2100_CONTROL_PHY_OFF 0x8
743
744#define IPW2100_COMMAND 0x00300004
745#define IPW2100_COMMAND_PHY_ON 0x0
746#define IPW2100_COMMAND_PHY_OFF 0x1
747
748/* in DEBUG_AREA, values of memory always 0xd55555d5 */
749#define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
750#define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
751#define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
752
753#define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
754
755#define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
756#define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
757#define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
758
759// BD ring queue read/write difference
760#define IPW_BD_QUEUE_W_R_MIN_SPARE 2
761
762#define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
763
764#define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
765#define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
766
767#define IPW_HEADER_802_11_SIZE sizeof(struct libipw_hdr_3addr)
768#define IPW_MAX_80211_PAYLOAD_SIZE 2304U
769#define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
770#define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
771#define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
772#define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
773 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
774 sizeof(struct ethhdr))
775
776#define IPW_802_11_FCS_LENGTH 4
777#define IPW_RX_NIC_BUFFER_LENGTH \
778 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
779 IPW_802_11_FCS_LENGTH)
780
781#define IPW_802_11_PAYLOAD_OFFSET \
782 (sizeof(struct libipw_hdr_3addr) + \
783 sizeof(struct libipw_snap_hdr))
784
785struct ipw2100_rx {
786 union {
787 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
788 struct libipw_hdr_4addr header;
789 u32 status;
790 struct ipw2100_notification notification;
791 struct ipw2100_cmd_header command;
792 } rx_data;
793} __packed;
794
795/* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */
796#define TX_RATE_1_MBIT 0x0001
797#define TX_RATE_2_MBIT 0x0002
798#define TX_RATE_5_5_MBIT 0x0004
799#define TX_RATE_11_MBIT 0x0008
800#define TX_RATE_MASK 0x000F
801#define DEFAULT_TX_RATES 0x000F
802
803#define IPW_POWER_MODE_CAM 0x00 //(always on)
804#define IPW_POWER_INDEX_1 0x01
805#define IPW_POWER_INDEX_2 0x02
806#define IPW_POWER_INDEX_3 0x03
807#define IPW_POWER_INDEX_4 0x04
808#define IPW_POWER_INDEX_5 0x05
809#define IPW_POWER_AUTO 0x06
810#define IPW_POWER_MASK 0x0F
811#define IPW_POWER_ENABLED 0x10
812#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
813
814#define IPW_TX_POWER_AUTO 0
815#define IPW_TX_POWER_ENHANCED 1
816
817#define IPW_TX_POWER_DEFAULT 32
818#define IPW_TX_POWER_MIN 0
819#define IPW_TX_POWER_MAX 16
820#define IPW_TX_POWER_MIN_DBM (-12)
821#define IPW_TX_POWER_MAX_DBM 16
822
823#define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
824#define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
825
826#define REG_MIN_CHANNEL 0
827#define REG_MAX_CHANNEL 14
828
829#define REG_CHANNEL_MASK 0x00003FFF
830#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
831
832#define DIVERSITY_EITHER 0 // Use both antennas
833#define DIVERSITY_ANTENNA_A 1 // Use antenna A
834#define DIVERSITY_ANTENNA_B 2 // Use antenna B
835
836#define HOST_COMMAND_WAIT 0
837#define HOST_COMMAND_NO_WAIT 1
838
839#define LOCK_NONE 0
840#define LOCK_DRIVER 1
841#define LOCK_FW 2
842
843#define TYPE_SWEEP_ORD 0x000D
844#define TYPE_IBSS_STTN_ORD 0x000E
845#define TYPE_BSS_AP_ORD 0x000F
846#define TYPE_RAW_BEACON_ENTRY 0x0010
847#define TYPE_CALIBRATION_DATA 0x0011
848#define TYPE_ROGUE_AP_DATA 0x0012
849#define TYPE_ASSOCIATION_REQUEST 0x0013
850#define TYPE_REASSOCIATION_REQUEST 0x0014
851
852#define HW_FEATURE_RFKILL 0x0001
853#define RF_KILLSWITCH_OFF 1
854#define RF_KILLSWITCH_ON 0
855
856#define IPW_COMMAND_POOL_SIZE 40
857
858#define IPW_START_ORD_TAB_1 1
859#define IPW_START_ORD_TAB_2 1000
860
861#define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
862
863#define IS_ORDINAL_TABLE_ONE(mgr,id) \
864 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
865#define IS_ORDINAL_TABLE_TWO(mgr,id) \
866 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
867
868#define BSS_ID_LENGTH 6
869
870// Fixed size data: Ordinal Table 1
871typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
872// Transmit statistics
873 IPW_ORD_STAT_TX_HOST_REQUESTS = 1, // # of requested Host Tx's (MSDU)
874 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
875 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
876
877 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
878 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
879 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
880 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
881 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
882
883 IPW_ORD_STAT_TX_NODIR_DATA1 = 13, // # of successful Non_Directed Tx's (MSDU) @ 1MB
884 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
885 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
886 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
887
888 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
889 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
890 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
891 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
892 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
893 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
894 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
895 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
896 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
897 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
898 IPW_ORD_STAT_TX_BEACON, // # of tx beacon
899 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
900 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
901 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
902 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
903
904 IPW_ORD_STAT_TX_TOTAL_BYTES = 41, // Total successful Tx data bytes
905 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
906 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
907 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
908 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
909 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
910
911 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
912 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
913 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP, // # of times max tries in a hop failed
914 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
915 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
916 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
917 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
918 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
919 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
920
921 // Receive statistics
922 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
923 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
924 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
925 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
926 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
927 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
928 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
929
930 IPW_ORD_STAT_RX_NODIR_DATA = 71, // # of nondirected packets
931 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
932 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
933 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
934 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
935
936 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
937 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
938 IPW_ORD_STAT_RX_RTS, // # of Rx RTS
939 IPW_ORD_STAT_RX_CTS, // # of Rx CTS
940 IPW_ORD_STAT_RX_ACK, // # of Rx ACK
941 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
942 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
943 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
944 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
945 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
946 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
947 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
948 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
949 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
950 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
951 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
952 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
953 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
954
955 IPW_ORD_STAT_RX_TOTAL_BYTES = 101, // Total rx data bytes received
956 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
957 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
958 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
959 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
960 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
961
962 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
963 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
964 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
965 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
966 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
967
968 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
969 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
970 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
971 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
972 IPW_ORD_SYS_BOOT_TIME, // # Boot time
973 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
974 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
975 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
976 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
977 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
978 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
979 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
980 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
981 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
982
983// PSP Statistics
984 IPW_ORD_STAT_PSP_SUSPENSION = 137, // # of times adapter suspended
985 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
986 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
987 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT, // # of timeouts waiting for last broadcast/muticast pkt
988 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
989 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
990 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
991
992// Association and roaming
993 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
994 IPW_ORD_STAT_PERCENT_MISSED_BCNS, // current calculation of % missed beacons
995 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
996 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
997 // AP table entry. set to 0 if not associated
998 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's described in the AP table
999 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
1000 IPW_ORD_STAT_AP_ASSNS, // # of associations
1001 IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1002 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
1003 IPW_ORD_STAT_FULL_SCANS, // # of full scans
1004
1005 IPW_ORD_CARD_DISABLED, // # Card Disabled
1006 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
1007 IPW_FILLER_40,
1008 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1009 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
1010 // hops or no prob_ responses in last 3 minutes
1011 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
1012 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
1013 // load at the AP
1014 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
1015 // eligible group
1016 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
1017 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
1018 IPW_FILLER_41,
1019 IPW_FILLER_42,
1020 IPW_FILLER_43,
1021 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1022 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
1023 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
1024
1025// Other statistics
1026 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
1027 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1028 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
1029 IPW_ORD_SELF_TEST_STATUS, //NS //
1030 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
1031 IPW_ORD_POWER_MGMT_INDEX, //NS //
1032 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
1033 IPW_ORD_COUNTRY_CHANNELS, // channels supported by country
1034// IPW_ORD_COUNTRY_CHANNELS:
1035// For 11b the lower 2-byte are used for channels from 1-14
1036// and the higher 2-byte are not used.
1037 IPW_ORD_RESET_CNT, // # of adapter resets (warm)
1038 IPW_ORD_BEACON_INTERVAL, // Beacon interval
1039
1040 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
1041 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
1042 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
1043 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1044 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
1045 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
1046
1047 IPW_ORD_RTC_TIME = 190, // current RTC time
1048 IPW_ORD_PORT_TYPE, // operating mode
1049 IPW_ORD_CURRENT_TX_RATE, // current tx rate
1050 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
1051 IPW_ORD_ATIM_WINDOW, // current ATIM Window
1052 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
1053 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
1054 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
1055 IPW_ORD_CAPABILITIES, // Management frame capability field
1056 IPW_ORD_AUTH_TYPE, // Type of authentication
1057 IPW_ORD_RADIO_TYPE, // Adapter card platform type
1058 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
1059 IPW_ORD_INT_MODE, // International mode
1060 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
1061 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1062 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
1063 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
1064 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
1065
1066 IPW_ORD_MAC_VERSION = 209, // MAC Version
1067 IPW_ORD_MAC_REVISION, // MAC Revision
1068 IPW_ORD_RADIO_VERSION, // Radio Version
1069 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1070 IPW_ORD_UCODE_VERSION, // Ucode Version
1071 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
1072} ORDINALTABLE1;
1073
1074// ordinal table 2
1075// Variable length data:
1076#define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
1077
1078typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1079 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
1080 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
1081 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
1082 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
1083 IPW_FILL_1, //NS //
1084 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
1085 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
1086 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
1087 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1088 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
1089 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
1090 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
1091 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1092 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1093 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
1094 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
1095 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
1096 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1097 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1098} ORDINALTABLE2; // NS - means Not Supported by FW
1099
1100#define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
1101
1102#ifndef WIRELESS_SPY
1103#define WIRELESS_SPY // enable iwspy support
1104#endif
1105
1106#define IPW_HOST_FW_SHARED_AREA0 0x0002f200
1107#define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
1108
1109#define IPW_HOST_FW_SHARED_AREA1 0x0002f610
1110#define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
1111
1112#define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
1113#define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
1114
1115#define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
1116#define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
1117
1118#define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
1119#define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
1120
1121struct ipw2100_fw_chunk {
1122 unsigned char *buf;
1123 long len;
1124 long pos;
1125 struct list_head list;
1126};
1127
1128struct ipw2100_fw_chunk_set {
1129 const void *data;
1130 unsigned long size;
1131};
1132
1133struct ipw2100_fw {
1134 int version;
1135 struct ipw2100_fw_chunk_set fw;
1136 struct ipw2100_fw_chunk_set uc;
1137 const struct firmware *fw_entry;
1138};
1139
1140#define MAX_FW_VERSION_LEN 14
1141
1142#endif /* _IPW2100_H */
1/******************************************************************************
2
3 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 Intel Linux Wireless <ilw@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************/
26#ifndef _IPW2100_H
27#define _IPW2100_H
28
29#include <linux/sched.h>
30#include <linux/interrupt.h>
31#include <linux/netdevice.h>
32#include <linux/etherdevice.h>
33#include <linux/list.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <asm/io.h>
37#include <linux/socket.h>
38#include <linux/if_arp.h>
39#include <linux/wireless.h>
40#include <net/iw_handler.h> // new driver API
41
42#ifdef CONFIG_IPW2100_MONITOR
43#include <net/ieee80211_radiotap.h>
44#endif
45
46#include <linux/workqueue.h>
47#include <linux/mutex.h>
48
49#include "libipw.h"
50
51struct ipw2100_priv;
52struct ipw2100_tx_packet;
53struct ipw2100_rx_packet;
54
55#define IPW_DL_UNINIT 0x80000000
56#define IPW_DL_NONE 0x00000000
57#define IPW_DL_ALL 0x7FFFFFFF
58
59/*
60 * To use the debug system;
61 *
62 * If you are defining a new debug classification, simply add it to the #define
63 * list here in the form of:
64 *
65 * #define IPW_DL_xxxx VALUE
66 *
67 * shifting value to the left one bit from the previous entry. xxxx should be
68 * the name of the classification (for example, WEP)
69 *
70 * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
71 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
72 * to send output to that classification.
73 *
74 * To add your debug level to the list of levels seen when you perform
75 *
76 * % cat /proc/net/ipw2100/debug_level
77 *
78 * you simply need to add your entry to the ipw2100_debug_levels array.
79 *
80 * If you do not see debug_level in /proc/net/ipw2100 then you do not have
81 * CONFIG_IPW2100_DEBUG defined in your kernel configuration
82 *
83 */
84
85#define IPW_DL_ERROR (1<<0)
86#define IPW_DL_WARNING (1<<1)
87#define IPW_DL_INFO (1<<2)
88#define IPW_DL_WX (1<<3)
89#define IPW_DL_HC (1<<5)
90#define IPW_DL_STATE (1<<6)
91
92#define IPW_DL_NOTIF (1<<10)
93#define IPW_DL_SCAN (1<<11)
94#define IPW_DL_ASSOC (1<<12)
95#define IPW_DL_DROP (1<<13)
96
97#define IPW_DL_IOCTL (1<<14)
98#define IPW_DL_RF_KILL (1<<17)
99
100#define IPW_DL_MANAGE (1<<15)
101#define IPW_DL_FW (1<<16)
102
103#define IPW_DL_FRAG (1<<21)
104#define IPW_DL_WEP (1<<22)
105#define IPW_DL_TX (1<<23)
106#define IPW_DL_RX (1<<24)
107#define IPW_DL_ISR (1<<25)
108#define IPW_DL_IO (1<<26)
109#define IPW_DL_TRACE (1<<28)
110
111#define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
112#define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
113#define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
114#define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
115#define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
116#define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
117#define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
118#define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
119#define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
120#define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
121#define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
122#define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
123#define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
124#define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
125#define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
126#define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
127#define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
128#define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
129#define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
130#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
131#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
132
133enum {
134 IPW_HW_STATE_DISABLED = 1,
135 IPW_HW_STATE_ENABLED = 0
136};
137
138extern const char *port_type_str[];
139extern const char *band_str[];
140
141#define NUMBER_OF_BD_PER_COMMAND_PACKET 1
142#define NUMBER_OF_BD_PER_DATA_PACKET 2
143
144#define IPW_MAX_BDS 6
145#define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
146#define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
147
148#define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
149 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
150
151struct bd_status {
152 union {
153 struct {
154 u8 nlf:1, txType:2, intEnabled:1, reserved:4;
155 } fields;
156 u8 field;
157 } info;
158} __packed;
159
160struct ipw2100_bd {
161 u32 host_addr;
162 u32 buf_length;
163 struct bd_status status;
164 /* number of fragments for frame (should be set only for
165 * 1st TBD) */
166 u8 num_fragments;
167 u8 reserved[6];
168} __packed;
169
170#define IPW_BD_QUEUE_LENGTH(n) (1<<n)
171#define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
172
173#define IPW_BD_STATUS_TX_FRAME_802_3 0x00
174#define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
175#define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
176#define IPW_BD_STATUS_TX_FRAME_802_11 0x04
177#define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
178
179struct ipw2100_bd_queue {
180 /* driver (virtual) pointer to queue */
181 struct ipw2100_bd *drv;
182
183 /* firmware (physical) pointer to queue */
184 dma_addr_t nic;
185
186 /* Length of phy memory allocated for BDs */
187 u32 size;
188
189 /* Number of BDs in queue (and in array) */
190 u32 entries;
191
192 /* Number of available BDs (invalid for NIC BDs) */
193 u32 available;
194
195 /* Offset of oldest used BD in array (next one to
196 * check for completion) */
197 u32 oldest;
198
199 /* Offset of next available (unused) BD */
200 u32 next;
201};
202
203#define RX_QUEUE_LENGTH 256
204#define TX_QUEUE_LENGTH 256
205#define HW_QUEUE_LENGTH 256
206
207#define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
208
209#define STATUS_TYPE_MASK 0x0000000f
210#define COMMAND_STATUS_VAL 0
211#define STATUS_CHANGE_VAL 1
212#define P80211_DATA_VAL 2
213#define P8023_DATA_VAL 3
214#define HOST_NOTIFICATION_VAL 4
215
216#define IPW2100_RSSI_TO_DBM (-98)
217
218struct ipw2100_status {
219 u32 frame_size;
220 u16 status_fields;
221 u8 flags;
222#define IPW_STATUS_FLAG_DECRYPTED (1<<0)
223#define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
224#define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
225 u8 rssi;
226} __packed;
227
228struct ipw2100_status_queue {
229 /* driver (virtual) pointer to queue */
230 struct ipw2100_status *drv;
231
232 /* firmware (physical) pointer to queue */
233 dma_addr_t nic;
234
235 /* Length of phy memory allocated for BDs */
236 u32 size;
237};
238
239#define HOST_COMMAND_PARAMS_REG_LEN 100
240#define CMD_STATUS_PARAMS_REG_LEN 3
241
242#define IPW_WPA_CAPABILITIES 0x1
243#define IPW_WPA_LISTENINTERVAL 0x2
244#define IPW_WPA_AP_ADDRESS 0x4
245
246#define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
247
248struct ipw2100_wpa_assoc_frame {
249 u16 fixed_ie_mask;
250 struct {
251 u16 capab_info;
252 u16 listen_interval;
253 u8 current_ap[ETH_ALEN];
254 } fixed_ies;
255 u32 var_ie_len;
256 u8 var_ie[IPW_MAX_VAR_IE_LEN];
257};
258
259#define IPW_BSS 1
260#define IPW_MONITOR 2
261#define IPW_IBSS 3
262
263/**
264 * @struct _tx_cmd - HWCommand
265 * @brief H/W command structure.
266 */
267struct ipw2100_cmd_header {
268 u32 host_command_reg;
269 u32 host_command_reg1;
270 u32 sequence;
271 u32 host_command_len_reg;
272 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
273 u32 cmd_status_reg;
274 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
275 u32 rxq_base_ptr;
276 u32 rxq_next_ptr;
277 u32 rxq_host_ptr;
278 u32 txq_base_ptr;
279 u32 txq_next_ptr;
280 u32 txq_host_ptr;
281 u32 tx_status_reg;
282 u32 reserved;
283 u32 status_change_reg;
284 u32 reserved1[3];
285 u32 *ordinal1_ptr;
286 u32 *ordinal2_ptr;
287} __packed;
288
289struct ipw2100_data_header {
290 u32 host_command_reg;
291 u32 host_command_reg1;
292 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
293 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
294 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
295 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
296 u8 key[16];
297 u8 reserved[10]; // f/w reserved
298 u8 src_addr[ETH_ALEN];
299 u8 dst_addr[ETH_ALEN];
300 u16 fragment_size;
301} __packed;
302
303/* Host command data structure */
304struct host_command {
305 u32 host_command; // COMMAND ID
306 u32 host_command1; // COMMAND ID
307 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
308 u32 host_command_length; // LENGTH
309 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
310} __packed;
311
312typedef enum {
313 POWER_ON_RESET,
314 EXIT_POWER_DOWN_RESET,
315 SW_RESET,
316 EEPROM_RW,
317 SW_RE_INIT
318} ipw2100_reset_event;
319
320enum {
321 COMMAND = 0xCAFE,
322 DATA,
323 RX
324};
325
326struct ipw2100_tx_packet {
327 int type;
328 int index;
329 union {
330 struct { /* COMMAND */
331 struct ipw2100_cmd_header *cmd;
332 dma_addr_t cmd_phys;
333 } c_struct;
334 struct { /* DATA */
335 struct ipw2100_data_header *data;
336 dma_addr_t data_phys;
337 struct libipw_txb *txb;
338 } d_struct;
339 } info;
340 int jiffy_start;
341
342 struct list_head list;
343};
344
345struct ipw2100_rx_packet {
346 struct ipw2100_rx *rxp;
347 dma_addr_t dma_addr;
348 int jiffy_start;
349 struct sk_buff *skb;
350 struct list_head list;
351};
352
353#define FRAG_DISABLED (1<<31)
354#define RTS_DISABLED (1<<31)
355#define MAX_RTS_THRESHOLD 2304U
356#define MIN_RTS_THRESHOLD 1U
357#define DEFAULT_RTS_THRESHOLD 1000U
358
359#define DEFAULT_BEACON_INTERVAL 100U
360#define DEFAULT_SHORT_RETRY_LIMIT 7U
361#define DEFAULT_LONG_RETRY_LIMIT 4U
362
363struct ipw2100_ordinals {
364 u32 table1_addr;
365 u32 table2_addr;
366 u32 table1_size;
367 u32 table2_size;
368};
369
370/* Host Notification header */
371struct ipw2100_notification {
372 u32 hnhdr_subtype; /* type of host notification */
373 u32 hnhdr_size; /* size in bytes of data
374 or number of entries, if table.
375 Does NOT include header */
376} __packed;
377
378#define MAX_KEY_SIZE 16
379#define MAX_KEYS 8
380
381#define IPW2100_WEP_ENABLE (1<<1)
382#define IPW2100_WEP_DROP_CLEAR (1<<2)
383
384#define IPW_NONE_CIPHER (1<<0)
385#define IPW_WEP40_CIPHER (1<<1)
386#define IPW_TKIP_CIPHER (1<<2)
387#define IPW_CCMP_CIPHER (1<<4)
388#define IPW_WEP104_CIPHER (1<<5)
389#define IPW_CKIP_CIPHER (1<<6)
390
391#define IPW_AUTH_OPEN 0
392#define IPW_AUTH_SHARED 1
393#define IPW_AUTH_LEAP 2
394#define IPW_AUTH_LEAP_CISCO_ID 0x80
395
396struct statistic {
397 int value;
398 int hi;
399 int lo;
400};
401
402#define INIT_STAT(x) do { \
403 (x)->value = (x)->hi = 0; \
404 (x)->lo = 0x7fffffff; \
405} while (0)
406#define SET_STAT(x,y) do { \
407 (x)->value = y; \
408 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
409 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
410} while (0)
411#define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
412while (0)
413#define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
414while (0)
415
416#define IPW2100_ERROR_QUEUE 5
417
418/* Power management code: enable or disable? */
419enum {
420#ifdef CONFIG_PM
421 IPW2100_PM_DISABLED = 0,
422 PM_STATE_SIZE = 16,
423#else
424 IPW2100_PM_DISABLED = 1,
425 PM_STATE_SIZE = 0,
426#endif
427};
428
429#define STATUS_POWERED (1<<0)
430#define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
431#define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
432#define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
433#define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
434#define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
435#define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
436#define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
437#define STATUS_INT_ENABLED (1<<11)
438#define STATUS_RF_KILL_HW (1<<12)
439#define STATUS_RF_KILL_SW (1<<13)
440#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
441#define STATUS_EXIT_PENDING (1<<14)
442
443#define STATUS_SCAN_PENDING (1<<23)
444#define STATUS_SCANNING (1<<24)
445#define STATUS_SCAN_ABORTING (1<<25)
446#define STATUS_SCAN_COMPLETE (1<<26)
447#define STATUS_WX_EVENT_PENDING (1<<27)
448#define STATUS_RESET_PENDING (1<<29)
449#define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
450
451/* Internal NIC states */
452#define IPW_STATE_INITIALIZED (1<<0)
453#define IPW_STATE_COUNTRY_FOUND (1<<1)
454#define IPW_STATE_ASSOCIATED (1<<2)
455#define IPW_STATE_ASSN_LOST (1<<3)
456#define IPW_STATE_ASSN_CHANGED (1<<4)
457#define IPW_STATE_SCAN_COMPLETE (1<<5)
458#define IPW_STATE_ENTERED_PSP (1<<6)
459#define IPW_STATE_LEFT_PSP (1<<7)
460#define IPW_STATE_RF_KILL (1<<8)
461#define IPW_STATE_DISABLED (1<<9)
462#define IPW_STATE_POWER_DOWN (1<<10)
463#define IPW_STATE_SCANNING (1<<11)
464
465#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
466#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
467#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
468#define CFG_CUSTOM_MAC (1<<3)
469#define CFG_LONG_PREAMBLE (1<<4)
470#define CFG_ASSOCIATE (1<<6)
471#define CFG_FIXED_RATE (1<<7)
472#define CFG_ADHOC_CREATE (1<<8)
473#define CFG_PASSIVE_SCAN (1<<10)
474#ifdef CONFIG_IPW2100_MONITOR
475#define CFG_CRC_CHECK (1<<11)
476#endif
477
478#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
479#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
480
481struct ipw2100_priv {
482 void __iomem *ioaddr;
483
484 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
485 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
486
487 struct libipw_device *ieee;
488 unsigned long status;
489 unsigned long config;
490 unsigned long capability;
491
492 /* Statistics */
493 int resets;
494 int reset_backoff;
495
496 /* Context */
497 u8 essid[IW_ESSID_MAX_SIZE];
498 u8 essid_len;
499 u8 bssid[ETH_ALEN];
500 u8 channel;
501 int last_mode;
502
503 unsigned long connect_start;
504 unsigned long last_reset;
505
506 u32 channel_mask;
507 u32 fatal_error;
508 u32 fatal_errors[IPW2100_ERROR_QUEUE];
509 u32 fatal_index;
510 int eeprom_version;
511 int firmware_version;
512 unsigned long hw_features;
513 int hangs;
514 u32 last_rtc;
515 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
516 u8 *snapshot[0x30];
517
518 u8 mandatory_bssid_mac[ETH_ALEN];
519 u8 mac_addr[ETH_ALEN];
520
521 int power_mode;
522
523 int messages_sent;
524
525 int short_retry_limit;
526 int long_retry_limit;
527
528 u32 rts_threshold;
529 u32 frag_threshold;
530
531 int in_isr;
532
533 u32 tx_rates;
534 int tx_power;
535 u32 beacon_interval;
536
537 char nick[IW_ESSID_MAX_SIZE + 1];
538
539 struct ipw2100_status_queue status_queue;
540
541 struct statistic txq_stat;
542 struct statistic rxq_stat;
543 struct ipw2100_bd_queue rx_queue;
544 struct ipw2100_bd_queue tx_queue;
545 struct ipw2100_rx_packet *rx_buffers;
546
547 struct statistic fw_pend_stat;
548 struct list_head fw_pend_list;
549
550 struct statistic msg_free_stat;
551 struct statistic msg_pend_stat;
552 struct list_head msg_free_list;
553 struct list_head msg_pend_list;
554 struct ipw2100_tx_packet *msg_buffers;
555
556 struct statistic tx_free_stat;
557 struct statistic tx_pend_stat;
558 struct list_head tx_free_list;
559 struct list_head tx_pend_list;
560 struct ipw2100_tx_packet *tx_buffers;
561
562 struct ipw2100_ordinals ordinals;
563
564 struct pci_dev *pci_dev;
565
566 struct proc_dir_entry *dir_dev;
567
568 struct net_device *net_dev;
569 struct iw_statistics wstats;
570
571 struct iw_public_data wireless_data;
572
573 struct tasklet_struct irq_tasklet;
574
575 struct delayed_work reset_work;
576 struct delayed_work security_work;
577 struct delayed_work wx_event_work;
578 struct delayed_work hang_check;
579 struct delayed_work rf_kill;
580 struct delayed_work scan_event;
581
582 int user_requested_scan;
583
584 /* Track time in suspend */
585 unsigned long suspend_at;
586 unsigned long suspend_time;
587
588 u32 interrupts;
589 int tx_interrupts;
590 int rx_interrupts;
591 int inta_other;
592
593 spinlock_t low_lock;
594 struct mutex action_mutex;
595 struct mutex adapter_mutex;
596
597 wait_queue_head_t wait_command_queue;
598};
599
600/*********************************************************
601 * Host Command -> From Driver to FW
602 *********************************************************/
603
604/**
605 * Host command identifiers
606 */
607#define HOST_COMPLETE 2
608#define SYSTEM_CONFIG 6
609#define SSID 8
610#define MANDATORY_BSSID 9
611#define AUTHENTICATION_TYPE 10
612#define ADAPTER_ADDRESS 11
613#define PORT_TYPE 12
614#define INTERNATIONAL_MODE 13
615#define CHANNEL 14
616#define RTS_THRESHOLD 15
617#define FRAG_THRESHOLD 16
618#define POWER_MODE 17
619#define TX_RATES 18
620#define BASIC_TX_RATES 19
621#define WEP_KEY_INFO 20
622#define WEP_KEY_INDEX 25
623#define WEP_FLAGS 26
624#define ADD_MULTICAST 27
625#define CLEAR_ALL_MULTICAST 28
626#define BEACON_INTERVAL 29
627#define ATIM_WINDOW 30
628#define CLEAR_STATISTICS 31
629#define SEND 33
630#define TX_POWER_INDEX 36
631#define BROADCAST_SCAN 43
632#define CARD_DISABLE 44
633#define PREFERRED_BSSID 45
634#define SET_SCAN_OPTIONS 46
635#define SCAN_DWELL_TIME 47
636#define SWEEP_TABLE 48
637#define AP_OR_STATION_TABLE 49
638#define GROUP_ORDINALS 50
639#define SHORT_RETRY_LIMIT 51
640#define LONG_RETRY_LIMIT 52
641
642#define HOST_PRE_POWER_DOWN 58
643#define CARD_DISABLE_PHY_OFF 61
644#define MSDU_TX_RATES 62
645
646/* Rogue AP Detection */
647#define SET_STATION_STAT_BITS 64
648#define CLEAR_STATIONS_STAT_BITS 65
649#define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
650#define SET_SECURITY_INFORMATION 67
651#define DISASSOCIATION_BSSID 68
652#define SET_WPA_IE 69
653
654/* system configuration bit mask: */
655#define IPW_CFG_MONITOR 0x00004
656#define IPW_CFG_PREAMBLE_AUTO 0x00010
657#define IPW_CFG_IBSS_AUTO_START 0x00020
658#define IPW_CFG_LOOPBACK 0x00100
659#define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
660#define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
661#define IPW_CFG_802_1x_ENABLE 0x04000
662#define IPW_CFG_BSS_MASK 0x08000
663#define IPW_CFG_IBSS_MASK 0x10000
664
665#define IPW_SCAN_NOASSOCIATE (1<<0)
666#define IPW_SCAN_MIXED_CELL (1<<1)
667/* RESERVED (1<<2) */
668#define IPW_SCAN_PASSIVE (1<<3)
669
670#define IPW_NIC_FATAL_ERROR 0x2A7F0
671#define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
672#define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
673#define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
674#define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
675#define IPW2100_ERR_FW_LOAD (0x12 << 24)
676
677#define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
678#define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
679
680#define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
681#define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
682#define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
683#define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
684
685#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
686#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
687#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
688
689#define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
690 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
691
692#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
693 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
694
695#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
696#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
697
698#define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
699#define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
700#define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
701#define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
702#define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
703#define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
704#define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
705#define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
706#define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
707#define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
708#define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
709
710#define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
711#define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
712#define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
713#define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
714#define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
715#define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
716#define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
717
718#define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
719#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
720#define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
721#define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
722#define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
723#define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
724#define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
725#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
726#define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
727
728#define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
729#define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
730#define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
731#define IPW_BIT_GPIO_RF_KILL 0x00010000
732
733#define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
734
735#define IPW_REG_DOMAIN_0_OFFSET 0x0000
736#define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
737
738#define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
739#define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
740#define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
741#define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
742#define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
743#define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
744#define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
745#define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
746#define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
747#define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
748#define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
749#define IPW_REG_FW_COMPATIBILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
750
751#define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
752
753#define IPW_INTERRUPT_MASK 0xC1010013
754
755#define IPW2100_CONTROL_REG 0x220000
756#define IPW2100_CONTROL_PHY_OFF 0x8
757
758#define IPW2100_COMMAND 0x00300004
759#define IPW2100_COMMAND_PHY_ON 0x0
760#define IPW2100_COMMAND_PHY_OFF 0x1
761
762/* in DEBUG_AREA, values of memory always 0xd55555d5 */
763#define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
764#define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
765#define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
766
767#define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
768
769#define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
770#define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
771#define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
772
773// BD ring queue read/write difference
774#define IPW_BD_QUEUE_W_R_MIN_SPARE 2
775
776#define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
777
778#define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
779#define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
780
781#define IPW_HEADER_802_11_SIZE sizeof(struct libipw_hdr_3addr)
782#define IPW_MAX_80211_PAYLOAD_SIZE 2304U
783#define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
784#define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
785#define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
786#define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
787 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
788 sizeof(struct ethhdr))
789
790#define IPW_802_11_FCS_LENGTH 4
791#define IPW_RX_NIC_BUFFER_LENGTH \
792 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
793 IPW_802_11_FCS_LENGTH)
794
795#define IPW_802_11_PAYLOAD_OFFSET \
796 (sizeof(struct libipw_hdr_3addr) + \
797 sizeof(struct libipw_snap_hdr))
798
799struct ipw2100_rx {
800 union {
801 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
802 struct libipw_hdr_4addr header;
803 u32 status;
804 struct ipw2100_notification notification;
805 struct ipw2100_cmd_header command;
806 } rx_data;
807} __packed;
808
809/* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */
810#define TX_RATE_1_MBIT 0x0001
811#define TX_RATE_2_MBIT 0x0002
812#define TX_RATE_5_5_MBIT 0x0004
813#define TX_RATE_11_MBIT 0x0008
814#define TX_RATE_MASK 0x000F
815#define DEFAULT_TX_RATES 0x000F
816
817#define IPW_POWER_MODE_CAM 0x00 //(always on)
818#define IPW_POWER_INDEX_1 0x01
819#define IPW_POWER_INDEX_2 0x02
820#define IPW_POWER_INDEX_3 0x03
821#define IPW_POWER_INDEX_4 0x04
822#define IPW_POWER_INDEX_5 0x05
823#define IPW_POWER_AUTO 0x06
824#define IPW_POWER_MASK 0x0F
825#define IPW_POWER_ENABLED 0x10
826#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
827
828#define IPW_TX_POWER_AUTO 0
829#define IPW_TX_POWER_ENHANCED 1
830
831#define IPW_TX_POWER_DEFAULT 32
832#define IPW_TX_POWER_MIN 0
833#define IPW_TX_POWER_MAX 16
834#define IPW_TX_POWER_MIN_DBM (-12)
835#define IPW_TX_POWER_MAX_DBM 16
836
837#define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
838#define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
839
840#define REG_MIN_CHANNEL 0
841#define REG_MAX_CHANNEL 14
842
843#define REG_CHANNEL_MASK 0x00003FFF
844#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
845
846#define DIVERSITY_EITHER 0 // Use both antennas
847#define DIVERSITY_ANTENNA_A 1 // Use antenna A
848#define DIVERSITY_ANTENNA_B 2 // Use antenna B
849
850#define HOST_COMMAND_WAIT 0
851#define HOST_COMMAND_NO_WAIT 1
852
853#define LOCK_NONE 0
854#define LOCK_DRIVER 1
855#define LOCK_FW 2
856
857#define TYPE_SWEEP_ORD 0x000D
858#define TYPE_IBSS_STTN_ORD 0x000E
859#define TYPE_BSS_AP_ORD 0x000F
860#define TYPE_RAW_BEACON_ENTRY 0x0010
861#define TYPE_CALIBRATION_DATA 0x0011
862#define TYPE_ROGUE_AP_DATA 0x0012
863#define TYPE_ASSOCIATION_REQUEST 0x0013
864#define TYPE_REASSOCIATION_REQUEST 0x0014
865
866#define HW_FEATURE_RFKILL 0x0001
867#define RF_KILLSWITCH_OFF 1
868#define RF_KILLSWITCH_ON 0
869
870#define IPW_COMMAND_POOL_SIZE 40
871
872#define IPW_START_ORD_TAB_1 1
873#define IPW_START_ORD_TAB_2 1000
874
875#define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
876
877#define IS_ORDINAL_TABLE_ONE(mgr,id) \
878 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
879#define IS_ORDINAL_TABLE_TWO(mgr,id) \
880 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
881
882#define BSS_ID_LENGTH 6
883
884// Fixed size data: Ordinal Table 1
885typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
886// Transmit statistics
887 IPW_ORD_STAT_TX_HOST_REQUESTS = 1, // # of requested Host Tx's (MSDU)
888 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
889 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
890
891 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
892 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
893 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
894 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
895 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
896
897 IPW_ORD_STAT_TX_NODIR_DATA1 = 13, // # of successful Non_Directed Tx's (MSDU) @ 1MB
898 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
899 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
900 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
901
902 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
903 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
904 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
905 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
906 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
907 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
908 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
909 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
910 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
911 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
912 IPW_ORD_STAT_TX_BEACON, // # of tx beacon
913 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
914 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
915 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
916 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
917
918 IPW_ORD_STAT_TX_TOTAL_BYTES = 41, // Total successful Tx data bytes
919 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
920 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
921 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
922 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
923 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
924
925 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
926 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
927 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP, // # of times max tries in a hop failed
928 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
929 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
930 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
931 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
932 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
933 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
934
935 // Receive statistics
936 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
937 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
938 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
939 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
940 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
941 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
942 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
943
944 IPW_ORD_STAT_RX_NODIR_DATA = 71, // # of nondirected packets
945 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
946 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
947 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
948 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
949
950 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
951 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
952 IPW_ORD_STAT_RX_RTS, // # of Rx RTS
953 IPW_ORD_STAT_RX_CTS, // # of Rx CTS
954 IPW_ORD_STAT_RX_ACK, // # of Rx ACK
955 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
956 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
957 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
958 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
959 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
960 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
961 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
962 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
963 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
964 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
965 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
966 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
967 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
968
969 IPW_ORD_STAT_RX_TOTAL_BYTES = 101, // Total rx data bytes received
970 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
971 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
972 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
973 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
974 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
975
976 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
977 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
978 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
979 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
980 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
981
982 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
983 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
984 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
985 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
986 IPW_ORD_SYS_BOOT_TIME, // # Boot time
987 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
988 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
989 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
990 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
991 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
992 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
993 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
994 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
995 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
996
997// PSP Statistics
998 IPW_ORD_STAT_PSP_SUSPENSION = 137, // # of times adapter suspended
999 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
1000 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
1001 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT, // # of timeouts waiting for last broadcast/muticast pkt
1002 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
1003 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
1004 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
1005
1006// Association and roaming
1007 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
1008 IPW_ORD_STAT_PERCENT_MISSED_BCNS, // current calculation of % missed beacons
1009 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
1010 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
1011 // AP table entry. set to 0 if not associated
1012 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
1013 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
1014 IPW_ORD_STAT_AP_ASSNS, // # of associations
1015 IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1016 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
1017 IPW_ORD_STAT_FULL_SCANS, // # of full scans
1018
1019 IPW_ORD_CARD_DISABLED, // # Card Disabled
1020 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
1021 IPW_FILLER_40,
1022 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1023 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
1024 // hops or no prob_ responses in last 3 minutes
1025 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
1026 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
1027 // load at the AP
1028 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
1029 // eligible group
1030 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
1031 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
1032 IPW_FILLER_41,
1033 IPW_FILLER_42,
1034 IPW_FILLER_43,
1035 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1036 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
1037 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
1038
1039// Other statistics
1040 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
1041 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1042 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
1043 IPW_ORD_SELF_TEST_STATUS, //NS //
1044 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
1045 IPW_ORD_POWER_MGMT_INDEX, //NS //
1046 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
1047 IPW_ORD_COUNTRY_CHANNELS, // channels supported by country
1048// IPW_ORD_COUNTRY_CHANNELS:
1049// For 11b the lower 2-byte are used for channels from 1-14
1050// and the higher 2-byte are not used.
1051 IPW_ORD_RESET_CNT, // # of adapter resets (warm)
1052 IPW_ORD_BEACON_INTERVAL, // Beacon interval
1053
1054 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
1055 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
1056 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
1057 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1058 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
1059 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
1060
1061 IPW_ORD_RTC_TIME = 190, // current RTC time
1062 IPW_ORD_PORT_TYPE, // operating mode
1063 IPW_ORD_CURRENT_TX_RATE, // current tx rate
1064 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
1065 IPW_ORD_ATIM_WINDOW, // current ATIM Window
1066 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
1067 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
1068 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
1069 IPW_ORD_CAPABILITIES, // Management frame capability field
1070 IPW_ORD_AUTH_TYPE, // Type of authentication
1071 IPW_ORD_RADIO_TYPE, // Adapter card platform type
1072 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
1073 IPW_ORD_INT_MODE, // International mode
1074 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
1075 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1076 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
1077 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
1078 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
1079
1080 IPW_ORD_MAC_VERSION = 209, // MAC Version
1081 IPW_ORD_MAC_REVISION, // MAC Revision
1082 IPW_ORD_RADIO_VERSION, // Radio Version
1083 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1084 IPW_ORD_UCODE_VERSION, // Ucode Version
1085 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
1086} ORDINALTABLE1;
1087
1088// ordinal table 2
1089// Variable length data:
1090#define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
1091
1092typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1093 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
1094 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
1095 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
1096 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
1097 IPW_FILL_1, //NS //
1098 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
1099 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
1100 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
1101 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1102 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
1103 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
1104 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
1105 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1106 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1107 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
1108 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
1109 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
1110 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1111 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1112} ORDINALTABLE2; // NS - means Not Supported by FW
1113
1114#define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
1115
1116#ifndef WIRELESS_SPY
1117#define WIRELESS_SPY // enable iwspy support
1118#endif
1119
1120#define IPW_HOST_FW_SHARED_AREA0 0x0002f200
1121#define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
1122
1123#define IPW_HOST_FW_SHARED_AREA1 0x0002f610
1124#define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
1125
1126#define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
1127#define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
1128
1129#define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
1130#define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
1131
1132#define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
1133#define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
1134
1135struct ipw2100_fw_chunk {
1136 unsigned char *buf;
1137 long len;
1138 long pos;
1139 struct list_head list;
1140};
1141
1142struct ipw2100_fw_chunk_set {
1143 const void *data;
1144 unsigned long size;
1145};
1146
1147struct ipw2100_fw {
1148 int version;
1149 struct ipw2100_fw_chunk_set fw;
1150 struct ipw2100_fw_chunk_set uc;
1151 const struct firmware *fw_entry;
1152};
1153
1154#define MAX_FW_VERSION_LEN 14
1155
1156#endif /* _IPW2100_H */