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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/* QLogic qed NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#ifndef _QED_INIT_OPS_H
8#define _QED_INIT_OPS_H
9
10#include <linux/types.h>
11#include <linux/slab.h>
12#include "qed.h"
13
14/**
15 * qed_init_iro_array(): init iro_arr.
16 *
17 * @cdev: Qed dev pointer.
18 *
19 * Return: Void.
20 */
21void qed_init_iro_array(struct qed_dev *cdev);
22
23/**
24 * qed_init_run(): Run the init-sequence.
25 *
26 * @p_hwfn: HW device data.
27 * @p_ptt: P_ptt.
28 * @phase: Phase.
29 * @phase_id: Phase ID.
30 * @modes: Mode.
31 *
32 * Return: _qed_status_t
33 */
34int qed_init_run(struct qed_hwfn *p_hwfn,
35 struct qed_ptt *p_ptt,
36 int phase,
37 int phase_id,
38 int modes);
39
40/**
41 * qed_init_alloc(): Allocate RT array, Store 'values' ptrs.
42 *
43 * @p_hwfn: HW device data.
44 *
45 * Return: _qed_status_t.
46 */
47int qed_init_alloc(struct qed_hwfn *p_hwfn);
48
49/**
50 * qed_init_free(): Init HW function deallocate.
51 *
52 * @p_hwfn: HW device data.
53 *
54 * Return: Void.
55 */
56void qed_init_free(struct qed_hwfn *p_hwfn);
57
58/**
59 * qed_init_store_rt_reg(): Store a configuration value in the RT array.
60 *
61 * @p_hwfn: HW device data.
62 * @rt_offset: RT offset.
63 * @val: Val.
64 *
65 * Return: Void.
66 */
67void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn,
68 u32 rt_offset,
69 u32 val);
70
71#define STORE_RT_REG(hwfn, offset, val) \
72 qed_init_store_rt_reg(hwfn, offset, val)
73
74#define OVERWRITE_RT_REG(hwfn, offset, val) \
75 qed_init_store_rt_reg(hwfn, offset, val)
76
77void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn,
78 u32 rt_offset,
79 u32 *val,
80 size_t size);
81
82#define STORE_RT_REG_AGG(hwfn, offset, val) \
83 qed_init_store_rt_agg(hwfn, offset, (u32 *)&(val), sizeof(val))
84
85/**
86 * qed_gtt_init(): Initialize GTT global windows and set admin window
87 * related params of GTT/PTT to default values.
88 *
89 * @p_hwfn: HW device data.
90 *
91 * Return Void.
92 */
93void qed_gtt_init(struct qed_hwfn *p_hwfn);
94#endif
1/* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#ifndef _QED_INIT_OPS_H
34#define _QED_INIT_OPS_H
35
36#include <linux/types.h>
37#include <linux/slab.h>
38#include "qed.h"
39
40/**
41 * @brief qed_init_iro_array - init iro_arr.
42 *
43 *
44 * @param cdev
45 */
46void qed_init_iro_array(struct qed_dev *cdev);
47
48/**
49 * @brief qed_init_run - Run the init-sequence.
50 *
51 *
52 * @param p_hwfn
53 * @param p_ptt
54 * @param phase
55 * @param phase_id
56 * @param modes
57 * @return _qed_status_t
58 */
59int qed_init_run(struct qed_hwfn *p_hwfn,
60 struct qed_ptt *p_ptt,
61 int phase,
62 int phase_id,
63 int modes);
64
65/**
66 * @brief qed_init_hwfn_allocate - Allocate RT array, Store 'values' ptrs.
67 *
68 *
69 * @param p_hwfn
70 *
71 * @return _qed_status_t
72 */
73int qed_init_alloc(struct qed_hwfn *p_hwfn);
74
75/**
76 * @brief qed_init_hwfn_deallocate
77 *
78 *
79 * @param p_hwfn
80 */
81void qed_init_free(struct qed_hwfn *p_hwfn);
82
83/**
84 * @brief qed_init_clear_rt_data - Clears the runtime init array.
85 *
86 *
87 * @param p_hwfn
88 */
89void qed_init_clear_rt_data(struct qed_hwfn *p_hwfn);
90
91/**
92 * @brief qed_init_store_rt_reg - Store a configuration value in the RT array.
93 *
94 *
95 * @param p_hwfn
96 * @param rt_offset
97 * @param val
98 */
99void qed_init_store_rt_reg(struct qed_hwfn *p_hwfn,
100 u32 rt_offset,
101 u32 val);
102
103#define STORE_RT_REG(hwfn, offset, val) \
104 qed_init_store_rt_reg(hwfn, offset, val)
105
106#define OVERWRITE_RT_REG(hwfn, offset, val) \
107 qed_init_store_rt_reg(hwfn, offset, val)
108
109/**
110 * @brief
111 *
112 *
113 * @param p_hwfn
114 * @param rt_offset
115 * @param val
116 * @param size
117 */
118void qed_init_store_rt_agg(struct qed_hwfn *p_hwfn,
119 u32 rt_offset,
120 u32 *val,
121 size_t size);
122
123#define STORE_RT_REG_AGG(hwfn, offset, val) \
124 qed_init_store_rt_agg(hwfn, offset, (u32 *)&val, sizeof(val))
125
126/**
127 * @brief
128 * Initialize GTT global windows and set admin window
129 * related params of GTT/PTT to default values.
130 *
131 * @param p_hwfn
132 */
133void qed_gtt_init(struct qed_hwfn *p_hwfn);
134#endif