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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 1999 - 2018 Intel Corporation. */
3
4/* PTP 1588 Hardware Clock (PHC)
5 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
6 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
7 */
8
9#include "e1000.h"
10
11#ifdef CONFIG_E1000E_HWTS
12#include <linux/clocksource.h>
13#include <linux/ktime.h>
14#include <asm/tsc.h>
15#endif
16
17/**
18 * e1000e_phc_adjfine - adjust the frequency of the hardware clock
19 * @ptp: ptp clock structure
20 * @delta: Desired frequency chance in scaled parts per million
21 *
22 * Adjust the frequency of the PHC cycle counter by the indicated delta from
23 * the base frequency.
24 *
25 * Scaled parts per million is ppm but with a 16 bit binary fractional field.
26 **/
27static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta)
28{
29 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
30 ptp_clock_info);
31 struct e1000_hw *hw = &adapter->hw;
32 unsigned long flags;
33 u64 incvalue;
34 u32 timinca;
35 s32 ret_val;
36
37 /* Get the System Time Register SYSTIM base frequency */
38 ret_val = e1000e_get_base_timinca(adapter, &timinca);
39 if (ret_val)
40 return ret_val;
41
42 spin_lock_irqsave(&adapter->systim_lock, flags);
43
44 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
45 incvalue = adjust_by_scaled_ppm(incvalue, delta);
46
47 timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
48 timinca |= incvalue;
49
50 ew32(TIMINCA, timinca);
51
52 adapter->ptp_delta = delta;
53
54 spin_unlock_irqrestore(&adapter->systim_lock, flags);
55
56 return 0;
57}
58
59/**
60 * e1000e_phc_adjtime - Shift the time of the hardware clock
61 * @ptp: ptp clock structure
62 * @delta: Desired change in nanoseconds
63 *
64 * Adjust the timer by resetting the timecounter structure.
65 **/
66static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
67{
68 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
69 ptp_clock_info);
70 unsigned long flags;
71
72 spin_lock_irqsave(&adapter->systim_lock, flags);
73 timecounter_adjtime(&adapter->tc, delta);
74 spin_unlock_irqrestore(&adapter->systim_lock, flags);
75
76 return 0;
77}
78
79#ifdef CONFIG_E1000E_HWTS
80#define MAX_HW_WAIT_COUNT (3)
81
82/**
83 * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
84 * @device: current device time
85 * @system: system counter value read synchronously with device time
86 * @ctx: context provided by timekeeping code
87 *
88 * Read device and system (ART) clock simultaneously and return the corrected
89 * clock values in ns.
90 **/
91static int e1000e_phc_get_syncdevicetime(ktime_t *device,
92 struct system_counterval_t *system,
93 void *ctx)
94{
95 struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
96 struct e1000_hw *hw = &adapter->hw;
97 unsigned long flags;
98 int i;
99 u32 tsync_ctrl;
100 u64 dev_cycles;
101 u64 sys_cycles;
102
103 tsync_ctrl = er32(TSYNCTXCTL);
104 tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
105 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
106 ew32(TSYNCTXCTL, tsync_ctrl);
107 for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
108 udelay(1);
109 tsync_ctrl = er32(TSYNCTXCTL);
110 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
111 break;
112 }
113
114 if (i == MAX_HW_WAIT_COUNT)
115 return -ETIMEDOUT;
116
117 dev_cycles = er32(SYSSTMPH);
118 dev_cycles <<= 32;
119 dev_cycles |= er32(SYSSTMPL);
120 spin_lock_irqsave(&adapter->systim_lock, flags);
121 *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
122 spin_unlock_irqrestore(&adapter->systim_lock, flags);
123
124 sys_cycles = er32(PLTSTMPH);
125 sys_cycles <<= 32;
126 sys_cycles |= er32(PLTSTMPL);
127 *system = convert_art_to_tsc(sys_cycles);
128
129 return 0;
130}
131
132/**
133 * e1000e_phc_getcrosststamp - Reads the current system/device cross timestamp
134 * @ptp: ptp clock structure
135 * @xtstamp: structure containing timestamp
136 *
137 * Read device and system (ART) clock simultaneously and return the scaled
138 * clock values in ns.
139 **/
140static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
141 struct system_device_crosststamp *xtstamp)
142{
143 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
144 ptp_clock_info);
145
146 return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
147 adapter, NULL, xtstamp);
148}
149#endif/*CONFIG_E1000E_HWTS*/
150
151/**
152 * e1000e_phc_gettimex - Reads the current time from the hardware clock and
153 * system clock
154 * @ptp: ptp clock structure
155 * @ts: timespec structure to hold the current PHC time
156 * @sts: structure to hold the current system time
157 *
158 * Read the timecounter and return the correct value in ns after converting
159 * it into a struct timespec.
160 **/
161static int e1000e_phc_gettimex(struct ptp_clock_info *ptp,
162 struct timespec64 *ts,
163 struct ptp_system_timestamp *sts)
164{
165 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
166 ptp_clock_info);
167 unsigned long flags;
168 u64 cycles, ns;
169
170 spin_lock_irqsave(&adapter->systim_lock, flags);
171
172 /* NOTE: Non-monotonic SYSTIM readings may be returned */
173 cycles = e1000e_read_systim(adapter, sts);
174 ns = timecounter_cyc2time(&adapter->tc, cycles);
175
176 spin_unlock_irqrestore(&adapter->systim_lock, flags);
177
178 *ts = ns_to_timespec64(ns);
179
180 return 0;
181}
182
183/**
184 * e1000e_phc_settime - Set the current time on the hardware clock
185 * @ptp: ptp clock structure
186 * @ts: timespec containing the new time for the cycle counter
187 *
188 * Reset the timecounter to use a new base value instead of the kernel
189 * wall timer value.
190 **/
191static int e1000e_phc_settime(struct ptp_clock_info *ptp,
192 const struct timespec64 *ts)
193{
194 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
195 ptp_clock_info);
196 unsigned long flags;
197 u64 ns;
198
199 ns = timespec64_to_ns(ts);
200
201 /* reset the timecounter */
202 spin_lock_irqsave(&adapter->systim_lock, flags);
203 timecounter_init(&adapter->tc, &adapter->cc, ns);
204 spin_unlock_irqrestore(&adapter->systim_lock, flags);
205
206 return 0;
207}
208
209/**
210 * e1000e_phc_enable - enable or disable an ancillary feature
211 * @ptp: ptp clock structure
212 * @request: Desired resource to enable or disable
213 * @on: Caller passes one to enable or zero to disable
214 *
215 * Enable (or disable) ancillary features of the PHC subsystem.
216 * Currently, no ancillary features are supported.
217 **/
218static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
219 struct ptp_clock_request __always_unused *request,
220 int __always_unused on)
221{
222 return -EOPNOTSUPP;
223}
224
225static void e1000e_systim_overflow_work(struct work_struct *work)
226{
227 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
228 systim_overflow_work.work);
229 struct e1000_hw *hw = &adapter->hw;
230 struct timespec64 ts;
231 u64 ns;
232
233 /* Update the timecounter */
234 ns = timecounter_read(&adapter->tc);
235
236 ts = ns_to_timespec64(ns);
237 e_dbg("SYSTIM overflow check at %lld.%09lu\n",
238 (long long) ts.tv_sec, ts.tv_nsec);
239
240 schedule_delayed_work(&adapter->systim_overflow_work,
241 E1000_SYSTIM_OVERFLOW_PERIOD);
242}
243
244static const struct ptp_clock_info e1000e_ptp_clock_info = {
245 .owner = THIS_MODULE,
246 .n_alarm = 0,
247 .n_ext_ts = 0,
248 .n_per_out = 0,
249 .n_pins = 0,
250 .pps = 0,
251 .adjfine = e1000e_phc_adjfine,
252 .adjtime = e1000e_phc_adjtime,
253 .gettimex64 = e1000e_phc_gettimex,
254 .settime64 = e1000e_phc_settime,
255 .enable = e1000e_phc_enable,
256};
257
258/**
259 * e1000e_ptp_init - initialize PTP for devices which support it
260 * @adapter: board private structure
261 *
262 * This function performs the required steps for enabling PTP support.
263 * If PTP support has already been loaded it simply calls the cyclecounter
264 * init routine and exits.
265 **/
266void e1000e_ptp_init(struct e1000_adapter *adapter)
267{
268 struct e1000_hw *hw = &adapter->hw;
269
270 adapter->ptp_clock = NULL;
271
272 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
273 return;
274
275 adapter->ptp_clock_info = e1000e_ptp_clock_info;
276
277 snprintf(adapter->ptp_clock_info.name,
278 sizeof(adapter->ptp_clock_info.name), "%pm",
279 adapter->netdev->perm_addr);
280
281 switch (hw->mac.type) {
282 case e1000_pch2lan:
283 adapter->ptp_clock_info.max_adj = MAX_PPB_96MHZ;
284 break;
285 case e1000_pch_lpt:
286 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)
287 adapter->ptp_clock_info.max_adj = MAX_PPB_96MHZ;
288 else
289 adapter->ptp_clock_info.max_adj = MAX_PPB_25MHZ;
290 break;
291 case e1000_pch_spt:
292 adapter->ptp_clock_info.max_adj = MAX_PPB_24MHZ;
293 break;
294 case e1000_pch_cnp:
295 case e1000_pch_tgp:
296 case e1000_pch_adp:
297 case e1000_pch_mtp:
298 case e1000_pch_lnp:
299 case e1000_pch_ptp:
300 case e1000_pch_nvp:
301 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)
302 adapter->ptp_clock_info.max_adj = MAX_PPB_24MHZ;
303 else
304 adapter->ptp_clock_info.max_adj = MAX_PPB_38400KHZ;
305 break;
306 case e1000_82574:
307 case e1000_82583:
308 adapter->ptp_clock_info.max_adj = MAX_PPB_25MHZ;
309 break;
310 default:
311 break;
312 }
313
314#ifdef CONFIG_E1000E_HWTS
315 /* CPU must have ART and GBe must be from Sunrise Point or greater */
316 if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
317 adapter->ptp_clock_info.getcrosststamp =
318 e1000e_phc_getcrosststamp;
319#endif/*CONFIG_E1000E_HWTS*/
320
321 INIT_DELAYED_WORK(&adapter->systim_overflow_work,
322 e1000e_systim_overflow_work);
323
324 schedule_delayed_work(&adapter->systim_overflow_work,
325 E1000_SYSTIM_OVERFLOW_PERIOD);
326
327 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
328 &adapter->pdev->dev);
329 if (IS_ERR(adapter->ptp_clock)) {
330 adapter->ptp_clock = NULL;
331 e_err("ptp_clock_register failed\n");
332 } else if (adapter->ptp_clock) {
333 e_info("registered PHC clock\n");
334 }
335}
336
337/**
338 * e1000e_ptp_remove - disable PTP device and stop the overflow check
339 * @adapter: board private structure
340 *
341 * Stop the PTP support, and cancel the delayed work.
342 **/
343void e1000e_ptp_remove(struct e1000_adapter *adapter)
344{
345 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
346 return;
347
348 cancel_delayed_work_sync(&adapter->systim_overflow_work);
349
350 if (adapter->ptp_clock) {
351 ptp_clock_unregister(adapter->ptp_clock);
352 adapter->ptp_clock = NULL;
353 e_info("removed PHC\n");
354 }
355}
1// SPDX-License-Identifier: GPL-2.0
2/* Intel PRO/1000 Linux driver
3 * Copyright(c) 1999 - 2015 Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in
15 * the file called "COPYING".
16 *
17 * Contact Information:
18 * Linux NICS <linux.nics@intel.com>
19 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
20 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
21 */
22
23/* PTP 1588 Hardware Clock (PHC)
24 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
25 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
26 */
27
28#include "e1000.h"
29
30#ifdef CONFIG_E1000E_HWTS
31#include <linux/clocksource.h>
32#include <linux/ktime.h>
33#include <asm/tsc.h>
34#endif
35
36/**
37 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
38 * @ptp: ptp clock structure
39 * @delta: Desired frequency change in parts per billion
40 *
41 * Adjust the frequency of the PHC cycle counter by the indicated delta from
42 * the base frequency.
43 **/
44static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
45{
46 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
47 ptp_clock_info);
48 struct e1000_hw *hw = &adapter->hw;
49 bool neg_adj = false;
50 unsigned long flags;
51 u64 adjustment;
52 u32 timinca, incvalue;
53 s32 ret_val;
54
55 if ((delta > ptp->max_adj) || (delta <= -1000000000))
56 return -EINVAL;
57
58 if (delta < 0) {
59 neg_adj = true;
60 delta = -delta;
61 }
62
63 /* Get the System Time Register SYSTIM base frequency */
64 ret_val = e1000e_get_base_timinca(adapter, &timinca);
65 if (ret_val)
66 return ret_val;
67
68 spin_lock_irqsave(&adapter->systim_lock, flags);
69
70 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
71
72 adjustment = incvalue;
73 adjustment *= delta;
74 adjustment = div_u64(adjustment, 1000000000);
75
76 incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
77
78 timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
79 timinca |= incvalue;
80
81 ew32(TIMINCA, timinca);
82
83 adapter->ptp_delta = delta;
84
85 spin_unlock_irqrestore(&adapter->systim_lock, flags);
86
87 return 0;
88}
89
90/**
91 * e1000e_phc_adjtime - Shift the time of the hardware clock
92 * @ptp: ptp clock structure
93 * @delta: Desired change in nanoseconds
94 *
95 * Adjust the timer by resetting the timecounter structure.
96 **/
97static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
98{
99 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
100 ptp_clock_info);
101 unsigned long flags;
102
103 spin_lock_irqsave(&adapter->systim_lock, flags);
104 timecounter_adjtime(&adapter->tc, delta);
105 spin_unlock_irqrestore(&adapter->systim_lock, flags);
106
107 return 0;
108}
109
110#ifdef CONFIG_E1000E_HWTS
111#define MAX_HW_WAIT_COUNT (3)
112
113/**
114 * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
115 * @device: current device time
116 * @system: system counter value read synchronously with device time
117 * @ctx: context provided by timekeeping code
118 *
119 * Read device and system (ART) clock simultaneously and return the corrected
120 * clock values in ns.
121 **/
122static int e1000e_phc_get_syncdevicetime(ktime_t *device,
123 struct system_counterval_t *system,
124 void *ctx)
125{
126 struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
127 struct e1000_hw *hw = &adapter->hw;
128 unsigned long flags;
129 int i;
130 u32 tsync_ctrl;
131 u64 dev_cycles;
132 u64 sys_cycles;
133
134 tsync_ctrl = er32(TSYNCTXCTL);
135 tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
136 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
137 ew32(TSYNCTXCTL, tsync_ctrl);
138 for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
139 udelay(1);
140 tsync_ctrl = er32(TSYNCTXCTL);
141 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
142 break;
143 }
144
145 if (i == MAX_HW_WAIT_COUNT)
146 return -ETIMEDOUT;
147
148 dev_cycles = er32(SYSSTMPH);
149 dev_cycles <<= 32;
150 dev_cycles |= er32(SYSSTMPL);
151 spin_lock_irqsave(&adapter->systim_lock, flags);
152 *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
153 spin_unlock_irqrestore(&adapter->systim_lock, flags);
154
155 sys_cycles = er32(PLTSTMPH);
156 sys_cycles <<= 32;
157 sys_cycles |= er32(PLTSTMPL);
158 *system = convert_art_to_tsc(sys_cycles);
159
160 return 0;
161}
162
163/**
164 * e1000e_phc_getsynctime - Reads the current system/device cross timestamp
165 * @ptp: ptp clock structure
166 * @cts: structure containing timestamp
167 *
168 * Read device and system (ART) clock simultaneously and return the scaled
169 * clock values in ns.
170 **/
171static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
172 struct system_device_crosststamp *xtstamp)
173{
174 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
175 ptp_clock_info);
176
177 return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
178 adapter, NULL, xtstamp);
179}
180#endif/*CONFIG_E1000E_HWTS*/
181
182/**
183 * e1000e_phc_gettime - Reads the current time from the hardware clock
184 * @ptp: ptp clock structure
185 * @ts: timespec structure to hold the current time value
186 *
187 * Read the timecounter and return the correct value in ns after converting
188 * it into a struct timespec.
189 **/
190static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
191{
192 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
193 ptp_clock_info);
194 unsigned long flags;
195 u64 ns;
196
197 spin_lock_irqsave(&adapter->systim_lock, flags);
198 ns = timecounter_read(&adapter->tc);
199 spin_unlock_irqrestore(&adapter->systim_lock, flags);
200
201 *ts = ns_to_timespec64(ns);
202
203 return 0;
204}
205
206/**
207 * e1000e_phc_settime - Set the current time on the hardware clock
208 * @ptp: ptp clock structure
209 * @ts: timespec containing the new time for the cycle counter
210 *
211 * Reset the timecounter to use a new base value instead of the kernel
212 * wall timer value.
213 **/
214static int e1000e_phc_settime(struct ptp_clock_info *ptp,
215 const struct timespec64 *ts)
216{
217 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
218 ptp_clock_info);
219 unsigned long flags;
220 u64 ns;
221
222 ns = timespec64_to_ns(ts);
223
224 /* reset the timecounter */
225 spin_lock_irqsave(&adapter->systim_lock, flags);
226 timecounter_init(&adapter->tc, &adapter->cc, ns);
227 spin_unlock_irqrestore(&adapter->systim_lock, flags);
228
229 return 0;
230}
231
232/**
233 * e1000e_phc_enable - enable or disable an ancillary feature
234 * @ptp: ptp clock structure
235 * @request: Desired resource to enable or disable
236 * @on: Caller passes one to enable or zero to disable
237 *
238 * Enable (or disable) ancillary features of the PHC subsystem.
239 * Currently, no ancillary features are supported.
240 **/
241static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
242 struct ptp_clock_request __always_unused *request,
243 int __always_unused on)
244{
245 return -EOPNOTSUPP;
246}
247
248static void e1000e_systim_overflow_work(struct work_struct *work)
249{
250 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
251 systim_overflow_work.work);
252 struct e1000_hw *hw = &adapter->hw;
253 struct timespec64 ts;
254
255 adapter->ptp_clock_info.gettime64(&adapter->ptp_clock_info, &ts);
256
257 e_dbg("SYSTIM overflow check at %lld.%09lu\n",
258 (long long) ts.tv_sec, ts.tv_nsec);
259
260 schedule_delayed_work(&adapter->systim_overflow_work,
261 E1000_SYSTIM_OVERFLOW_PERIOD);
262}
263
264static const struct ptp_clock_info e1000e_ptp_clock_info = {
265 .owner = THIS_MODULE,
266 .n_alarm = 0,
267 .n_ext_ts = 0,
268 .n_per_out = 0,
269 .n_pins = 0,
270 .pps = 0,
271 .adjfreq = e1000e_phc_adjfreq,
272 .adjtime = e1000e_phc_adjtime,
273 .gettime64 = e1000e_phc_gettime,
274 .settime64 = e1000e_phc_settime,
275 .enable = e1000e_phc_enable,
276};
277
278/**
279 * e1000e_ptp_init - initialize PTP for devices which support it
280 * @adapter: board private structure
281 *
282 * This function performs the required steps for enabling PTP support.
283 * If PTP support has already been loaded it simply calls the cyclecounter
284 * init routine and exits.
285 **/
286void e1000e_ptp_init(struct e1000_adapter *adapter)
287{
288 struct e1000_hw *hw = &adapter->hw;
289
290 adapter->ptp_clock = NULL;
291
292 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
293 return;
294
295 adapter->ptp_clock_info = e1000e_ptp_clock_info;
296
297 snprintf(adapter->ptp_clock_info.name,
298 sizeof(adapter->ptp_clock_info.name), "%pm",
299 adapter->netdev->perm_addr);
300
301 switch (hw->mac.type) {
302 case e1000_pch2lan:
303 case e1000_pch_lpt:
304 case e1000_pch_spt:
305 case e1000_pch_cnp:
306 if ((hw->mac.type < e1000_pch_lpt) ||
307 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
308 adapter->ptp_clock_info.max_adj = 24000000 - 1;
309 break;
310 }
311 /* fall-through */
312 case e1000_82574:
313 case e1000_82583:
314 adapter->ptp_clock_info.max_adj = 600000000 - 1;
315 break;
316 default:
317 break;
318 }
319
320#ifdef CONFIG_E1000E_HWTS
321 /* CPU must have ART and GBe must be from Sunrise Point or greater */
322 if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
323 adapter->ptp_clock_info.getcrosststamp =
324 e1000e_phc_getcrosststamp;
325#endif/*CONFIG_E1000E_HWTS*/
326
327 INIT_DELAYED_WORK(&adapter->systim_overflow_work,
328 e1000e_systim_overflow_work);
329
330 schedule_delayed_work(&adapter->systim_overflow_work,
331 E1000_SYSTIM_OVERFLOW_PERIOD);
332
333 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
334 &adapter->pdev->dev);
335 if (IS_ERR(adapter->ptp_clock)) {
336 adapter->ptp_clock = NULL;
337 e_err("ptp_clock_register failed\n");
338 } else if (adapter->ptp_clock) {
339 e_info("registered PHC clock\n");
340 }
341}
342
343/**
344 * e1000e_ptp_remove - disable PTP device and stop the overflow check
345 * @adapter: board private structure
346 *
347 * Stop the PTP support, and cancel the delayed work.
348 **/
349void e1000e_ptp_remove(struct e1000_adapter *adapter)
350{
351 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
352 return;
353
354 cancel_delayed_work_sync(&adapter->systim_overflow_work);
355
356 if (adapter->ptp_clock) {
357 ptp_clock_unregister(adapter->ptp_clock);
358 adapter->ptp_clock = NULL;
359 e_info("removed PHC\n");
360 }
361}