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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for 93xx46 EEPROMs
4 *
5 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
11#include <linux/kernel.h>
12#include <linux/log2.h>
13#include <linux/module.h>
14#include <linux/mutex.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/of_gpio.h>
18#include <linux/slab.h>
19#include <linux/spi/spi.h>
20#include <linux/nvmem-provider.h>
21#include <linux/eeprom_93xx46.h>
22
23#define OP_START 0x4
24#define OP_WRITE (OP_START | 0x1)
25#define OP_READ (OP_START | 0x2)
26#define ADDR_EWDS 0x00
27#define ADDR_ERAL 0x20
28#define ADDR_EWEN 0x30
29
30struct eeprom_93xx46_devtype_data {
31 unsigned int quirks;
32 unsigned char flags;
33};
34
35static const struct eeprom_93xx46_devtype_data at93c46_data = {
36 .flags = EE_SIZE1K,
37};
38
39static const struct eeprom_93xx46_devtype_data at93c56_data = {
40 .flags = EE_SIZE2K,
41};
42
43static const struct eeprom_93xx46_devtype_data at93c66_data = {
44 .flags = EE_SIZE4K,
45};
46
47static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
48 .flags = EE_SIZE1K,
49 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
50 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
51};
52
53static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
54 .flags = EE_SIZE1K,
55 .quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
56};
57
58struct eeprom_93xx46_dev {
59 struct spi_device *spi;
60 struct eeprom_93xx46_platform_data *pdata;
61 struct mutex lock;
62 struct nvmem_config nvmem_config;
63 struct nvmem_device *nvmem;
64 int addrlen;
65 int size;
66};
67
68static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
69{
70 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
71}
72
73static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
74{
75 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
76}
77
78static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
79{
80 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
81}
82
83static int eeprom_93xx46_read(void *priv, unsigned int off,
84 void *val, size_t count)
85{
86 struct eeprom_93xx46_dev *edev = priv;
87 char *buf = val;
88 int err = 0;
89 int bits;
90
91 if (unlikely(off >= edev->size))
92 return 0;
93 if ((off + count) > edev->size)
94 count = edev->size - off;
95 if (unlikely(!count))
96 return count;
97
98 mutex_lock(&edev->lock);
99
100 if (edev->pdata->prepare)
101 edev->pdata->prepare(edev);
102
103 /* The opcode in front of the address is three bits. */
104 bits = edev->addrlen + 3;
105
106 while (count) {
107 struct spi_message m;
108 struct spi_transfer t[2] = { { 0 } };
109 u16 cmd_addr = OP_READ << edev->addrlen;
110 size_t nbytes = count;
111
112 if (edev->pdata->flags & EE_ADDR8) {
113 cmd_addr |= off;
114 if (has_quirk_single_word_read(edev))
115 nbytes = 1;
116 } else {
117 cmd_addr |= (off >> 1);
118 if (has_quirk_single_word_read(edev))
119 nbytes = 2;
120 }
121
122 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
123 cmd_addr, edev->spi->max_speed_hz);
124
125 if (has_quirk_extra_read_cycle(edev)) {
126 cmd_addr <<= 1;
127 bits += 1;
128 }
129
130 spi_message_init(&m);
131
132 t[0].tx_buf = (char *)&cmd_addr;
133 t[0].len = 2;
134 t[0].bits_per_word = bits;
135 spi_message_add_tail(&t[0], &m);
136
137 t[1].rx_buf = buf;
138 t[1].len = count;
139 t[1].bits_per_word = 8;
140 spi_message_add_tail(&t[1], &m);
141
142 err = spi_sync(edev->spi, &m);
143 /* have to wait at least Tcsl ns */
144 ndelay(250);
145
146 if (err) {
147 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
148 nbytes, (int)off, err);
149 break;
150 }
151
152 buf += nbytes;
153 off += nbytes;
154 count -= nbytes;
155 }
156
157 if (edev->pdata->finish)
158 edev->pdata->finish(edev);
159
160 mutex_unlock(&edev->lock);
161
162 return err;
163}
164
165static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
166{
167 struct spi_message m;
168 struct spi_transfer t;
169 int bits, ret;
170 u16 cmd_addr;
171
172 /* The opcode in front of the address is three bits. */
173 bits = edev->addrlen + 3;
174
175 cmd_addr = OP_START << edev->addrlen;
176 if (edev->pdata->flags & EE_ADDR8)
177 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
178 else
179 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
180
181 if (has_quirk_instruction_length(edev)) {
182 cmd_addr <<= 2;
183 bits += 2;
184 }
185
186 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
187 is_on ? "en" : "ds", cmd_addr, bits);
188
189 spi_message_init(&m);
190 memset(&t, 0, sizeof(t));
191
192 t.tx_buf = &cmd_addr;
193 t.len = 2;
194 t.bits_per_word = bits;
195 spi_message_add_tail(&t, &m);
196
197 mutex_lock(&edev->lock);
198
199 if (edev->pdata->prepare)
200 edev->pdata->prepare(edev);
201
202 ret = spi_sync(edev->spi, &m);
203 /* have to wait at least Tcsl ns */
204 ndelay(250);
205 if (ret)
206 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
207 is_on ? "en" : "dis", ret);
208
209 if (edev->pdata->finish)
210 edev->pdata->finish(edev);
211
212 mutex_unlock(&edev->lock);
213 return ret;
214}
215
216static ssize_t
217eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
218 const char *buf, unsigned off)
219{
220 struct spi_message m;
221 struct spi_transfer t[2];
222 int bits, data_len, ret;
223 u16 cmd_addr;
224
225 if (unlikely(off >= edev->size))
226 return -EINVAL;
227
228 /* The opcode in front of the address is three bits. */
229 bits = edev->addrlen + 3;
230
231 cmd_addr = OP_WRITE << edev->addrlen;
232
233 if (edev->pdata->flags & EE_ADDR8) {
234 cmd_addr |= off;
235 data_len = 1;
236 } else {
237 cmd_addr |= (off >> 1);
238 data_len = 2;
239 }
240
241 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
242
243 spi_message_init(&m);
244 memset(t, 0, sizeof(t));
245
246 t[0].tx_buf = (char *)&cmd_addr;
247 t[0].len = 2;
248 t[0].bits_per_word = bits;
249 spi_message_add_tail(&t[0], &m);
250
251 t[1].tx_buf = buf;
252 t[1].len = data_len;
253 t[1].bits_per_word = 8;
254 spi_message_add_tail(&t[1], &m);
255
256 ret = spi_sync(edev->spi, &m);
257 /* have to wait program cycle time Twc ms */
258 mdelay(6);
259 return ret;
260}
261
262static int eeprom_93xx46_write(void *priv, unsigned int off,
263 void *val, size_t count)
264{
265 struct eeprom_93xx46_dev *edev = priv;
266 char *buf = val;
267 int i, ret, step = 1;
268
269 if (unlikely(off >= edev->size))
270 return -EFBIG;
271 if ((off + count) > edev->size)
272 count = edev->size - off;
273 if (unlikely(!count))
274 return count;
275
276 /* only write even number of bytes on 16-bit devices */
277 if (edev->pdata->flags & EE_ADDR16) {
278 step = 2;
279 count &= ~1;
280 }
281
282 /* erase/write enable */
283 ret = eeprom_93xx46_ew(edev, 1);
284 if (ret)
285 return ret;
286
287 mutex_lock(&edev->lock);
288
289 if (edev->pdata->prepare)
290 edev->pdata->prepare(edev);
291
292 for (i = 0; i < count; i += step) {
293 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
294 if (ret) {
295 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
296 (int)off + i, ret);
297 break;
298 }
299 }
300
301 if (edev->pdata->finish)
302 edev->pdata->finish(edev);
303
304 mutex_unlock(&edev->lock);
305
306 /* erase/write disable */
307 eeprom_93xx46_ew(edev, 0);
308 return ret;
309}
310
311static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
312{
313 struct eeprom_93xx46_platform_data *pd = edev->pdata;
314 struct spi_message m;
315 struct spi_transfer t;
316 int bits, ret;
317 u16 cmd_addr;
318
319 /* The opcode in front of the address is three bits. */
320 bits = edev->addrlen + 3;
321
322 cmd_addr = OP_START << edev->addrlen;
323 if (edev->pdata->flags & EE_ADDR8)
324 cmd_addr |= ADDR_ERAL << 1;
325 else
326 cmd_addr |= ADDR_ERAL;
327
328 if (has_quirk_instruction_length(edev)) {
329 cmd_addr <<= 2;
330 bits += 2;
331 }
332
333 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
334
335 spi_message_init(&m);
336 memset(&t, 0, sizeof(t));
337
338 t.tx_buf = &cmd_addr;
339 t.len = 2;
340 t.bits_per_word = bits;
341 spi_message_add_tail(&t, &m);
342
343 mutex_lock(&edev->lock);
344
345 if (edev->pdata->prepare)
346 edev->pdata->prepare(edev);
347
348 ret = spi_sync(edev->spi, &m);
349 if (ret)
350 dev_err(&edev->spi->dev, "erase error %d\n", ret);
351 /* have to wait erase cycle time Tec ms */
352 mdelay(6);
353
354 if (pd->finish)
355 pd->finish(edev);
356
357 mutex_unlock(&edev->lock);
358 return ret;
359}
360
361static ssize_t eeprom_93xx46_store_erase(struct device *dev,
362 struct device_attribute *attr,
363 const char *buf, size_t count)
364{
365 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
366 int erase = 0, ret;
367
368 sscanf(buf, "%d", &erase);
369 if (erase) {
370 ret = eeprom_93xx46_ew(edev, 1);
371 if (ret)
372 return ret;
373 ret = eeprom_93xx46_eral(edev);
374 if (ret)
375 return ret;
376 ret = eeprom_93xx46_ew(edev, 0);
377 if (ret)
378 return ret;
379 }
380 return count;
381}
382static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
383
384static void select_assert(void *context)
385{
386 struct eeprom_93xx46_dev *edev = context;
387
388 gpiod_set_value_cansleep(edev->pdata->select, 1);
389}
390
391static void select_deassert(void *context)
392{
393 struct eeprom_93xx46_dev *edev = context;
394
395 gpiod_set_value_cansleep(edev->pdata->select, 0);
396}
397
398static const struct of_device_id eeprom_93xx46_of_table[] = {
399 { .compatible = "eeprom-93xx46", .data = &at93c46_data, },
400 { .compatible = "atmel,at93c46", .data = &at93c46_data, },
401 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
402 { .compatible = "atmel,at93c56", .data = &at93c56_data, },
403 { .compatible = "atmel,at93c66", .data = &at93c66_data, },
404 { .compatible = "microchip,93lc46b", .data = µchip_93lc46b_data, },
405 {}
406};
407MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
408
409static const struct spi_device_id eeprom_93xx46_spi_ids[] = {
410 { .name = "eeprom-93xx46",
411 .driver_data = (kernel_ulong_t)&at93c46_data, },
412 { .name = "at93c46",
413 .driver_data = (kernel_ulong_t)&at93c46_data, },
414 { .name = "at93c46d",
415 .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, },
416 { .name = "at93c56",
417 .driver_data = (kernel_ulong_t)&at93c56_data, },
418 { .name = "at93c66",
419 .driver_data = (kernel_ulong_t)&at93c66_data, },
420 { .name = "93lc46b",
421 .driver_data = (kernel_ulong_t)µchip_93lc46b_data, },
422 {}
423};
424MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids);
425
426static int eeprom_93xx46_probe_dt(struct spi_device *spi)
427{
428 const struct of_device_id *of_id =
429 of_match_device(eeprom_93xx46_of_table, &spi->dev);
430 struct device_node *np = spi->dev.of_node;
431 struct eeprom_93xx46_platform_data *pd;
432 u32 tmp;
433 int ret;
434
435 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
436 if (!pd)
437 return -ENOMEM;
438
439 ret = of_property_read_u32(np, "data-size", &tmp);
440 if (ret < 0) {
441 dev_err(&spi->dev, "data-size property not found\n");
442 return ret;
443 }
444
445 if (tmp == 8) {
446 pd->flags |= EE_ADDR8;
447 } else if (tmp == 16) {
448 pd->flags |= EE_ADDR16;
449 } else {
450 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
451 return -EINVAL;
452 }
453
454 if (of_property_read_bool(np, "read-only"))
455 pd->flags |= EE_READONLY;
456
457 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
458 GPIOD_OUT_LOW);
459 if (IS_ERR(pd->select))
460 return PTR_ERR(pd->select);
461
462 pd->prepare = select_assert;
463 pd->finish = select_deassert;
464 gpiod_direction_output(pd->select, 0);
465
466 if (of_id->data) {
467 const struct eeprom_93xx46_devtype_data *data = of_id->data;
468
469 pd->quirks = data->quirks;
470 pd->flags |= data->flags;
471 }
472
473 spi->dev.platform_data = pd;
474
475 return 0;
476}
477
478static int eeprom_93xx46_probe(struct spi_device *spi)
479{
480 struct eeprom_93xx46_platform_data *pd;
481 struct eeprom_93xx46_dev *edev;
482 int err;
483
484 if (spi->dev.of_node) {
485 err = eeprom_93xx46_probe_dt(spi);
486 if (err < 0)
487 return err;
488 }
489
490 pd = spi->dev.platform_data;
491 if (!pd) {
492 dev_err(&spi->dev, "missing platform data\n");
493 return -ENODEV;
494 }
495
496 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
497 if (!edev)
498 return -ENOMEM;
499
500 if (pd->flags & EE_SIZE1K)
501 edev->size = 128;
502 else if (pd->flags & EE_SIZE2K)
503 edev->size = 256;
504 else if (pd->flags & EE_SIZE4K)
505 edev->size = 512;
506 else {
507 dev_err(&spi->dev, "unspecified size\n");
508 return -EINVAL;
509 }
510
511 if (pd->flags & EE_ADDR8)
512 edev->addrlen = ilog2(edev->size);
513 else if (pd->flags & EE_ADDR16)
514 edev->addrlen = ilog2(edev->size) - 1;
515 else {
516 dev_err(&spi->dev, "unspecified address type\n");
517 return -EINVAL;
518 }
519
520 mutex_init(&edev->lock);
521
522 edev->spi = spi;
523 edev->pdata = pd;
524
525 edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
526 edev->nvmem_config.name = dev_name(&spi->dev);
527 edev->nvmem_config.dev = &spi->dev;
528 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
529 edev->nvmem_config.root_only = true;
530 edev->nvmem_config.owner = THIS_MODULE;
531 edev->nvmem_config.compat = true;
532 edev->nvmem_config.base_dev = &spi->dev;
533 edev->nvmem_config.reg_read = eeprom_93xx46_read;
534 edev->nvmem_config.reg_write = eeprom_93xx46_write;
535 edev->nvmem_config.priv = edev;
536 edev->nvmem_config.stride = 4;
537 edev->nvmem_config.word_size = 1;
538 edev->nvmem_config.size = edev->size;
539
540 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
541 if (IS_ERR(edev->nvmem))
542 return PTR_ERR(edev->nvmem);
543
544 dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n",
545 (pd->flags & EE_ADDR8) ? 8 : 16,
546 edev->size,
547 (pd->flags & EE_READONLY) ? "(readonly)" : "");
548
549 if (!(pd->flags & EE_READONLY)) {
550 if (device_create_file(&spi->dev, &dev_attr_erase))
551 dev_err(&spi->dev, "can't create erase interface\n");
552 }
553
554 spi_set_drvdata(spi, edev);
555 return 0;
556}
557
558static void eeprom_93xx46_remove(struct spi_device *spi)
559{
560 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
561
562 if (!(edev->pdata->flags & EE_READONLY))
563 device_remove_file(&spi->dev, &dev_attr_erase);
564}
565
566static struct spi_driver eeprom_93xx46_driver = {
567 .driver = {
568 .name = "93xx46",
569 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
570 },
571 .probe = eeprom_93xx46_probe,
572 .remove = eeprom_93xx46_remove,
573 .id_table = eeprom_93xx46_spi_ids,
574};
575
576module_spi_driver(eeprom_93xx46_driver);
577
578MODULE_LICENSE("GPL");
579MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
580MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
581MODULE_ALIAS("spi:93xx46");
582MODULE_ALIAS("spi:eeprom-93xx46");
583MODULE_ALIAS("spi:93lc46b");
1/*
2 * Driver for 93xx46 EEPROMs
3 *
4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/device.h>
13#include <linux/gpio/consumer.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/of_gpio.h>
20#include <linux/slab.h>
21#include <linux/spi/spi.h>
22#include <linux/nvmem-provider.h>
23#include <linux/eeprom_93xx46.h>
24
25#define OP_START 0x4
26#define OP_WRITE (OP_START | 0x1)
27#define OP_READ (OP_START | 0x2)
28#define ADDR_EWDS 0x00
29#define ADDR_ERAL 0x20
30#define ADDR_EWEN 0x30
31
32struct eeprom_93xx46_devtype_data {
33 unsigned int quirks;
34};
35
36static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
37 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
38 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
39};
40
41struct eeprom_93xx46_dev {
42 struct spi_device *spi;
43 struct eeprom_93xx46_platform_data *pdata;
44 struct mutex lock;
45 struct nvmem_config nvmem_config;
46 struct nvmem_device *nvmem;
47 int addrlen;
48 int size;
49};
50
51static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
52{
53 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
54}
55
56static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
57{
58 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
59}
60
61static int eeprom_93xx46_read(void *priv, unsigned int off,
62 void *val, size_t count)
63{
64 struct eeprom_93xx46_dev *edev = priv;
65 char *buf = val;
66 int err = 0;
67
68 if (unlikely(off >= edev->size))
69 return 0;
70 if ((off + count) > edev->size)
71 count = edev->size - off;
72 if (unlikely(!count))
73 return count;
74
75 mutex_lock(&edev->lock);
76
77 if (edev->pdata->prepare)
78 edev->pdata->prepare(edev);
79
80 while (count) {
81 struct spi_message m;
82 struct spi_transfer t[2] = { { 0 } };
83 u16 cmd_addr = OP_READ << edev->addrlen;
84 size_t nbytes = count;
85 int bits;
86
87 if (edev->addrlen == 7) {
88 cmd_addr |= off & 0x7f;
89 bits = 10;
90 if (has_quirk_single_word_read(edev))
91 nbytes = 1;
92 } else {
93 cmd_addr |= (off >> 1) & 0x3f;
94 bits = 9;
95 if (has_quirk_single_word_read(edev))
96 nbytes = 2;
97 }
98
99 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
100 cmd_addr, edev->spi->max_speed_hz);
101
102 spi_message_init(&m);
103
104 t[0].tx_buf = (char *)&cmd_addr;
105 t[0].len = 2;
106 t[0].bits_per_word = bits;
107 spi_message_add_tail(&t[0], &m);
108
109 t[1].rx_buf = buf;
110 t[1].len = count;
111 t[1].bits_per_word = 8;
112 spi_message_add_tail(&t[1], &m);
113
114 err = spi_sync(edev->spi, &m);
115 /* have to wait at least Tcsl ns */
116 ndelay(250);
117
118 if (err) {
119 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
120 nbytes, (int)off, err);
121 break;
122 }
123
124 buf += nbytes;
125 off += nbytes;
126 count -= nbytes;
127 }
128
129 if (edev->pdata->finish)
130 edev->pdata->finish(edev);
131
132 mutex_unlock(&edev->lock);
133
134 return err;
135}
136
137static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
138{
139 struct spi_message m;
140 struct spi_transfer t;
141 int bits, ret;
142 u16 cmd_addr;
143
144 cmd_addr = OP_START << edev->addrlen;
145 if (edev->addrlen == 7) {
146 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
147 bits = 10;
148 } else {
149 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
150 bits = 9;
151 }
152
153 if (has_quirk_instruction_length(edev)) {
154 cmd_addr <<= 2;
155 bits += 2;
156 }
157
158 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
159 is_on ? "en" : "ds", cmd_addr, bits);
160
161 spi_message_init(&m);
162 memset(&t, 0, sizeof(t));
163
164 t.tx_buf = &cmd_addr;
165 t.len = 2;
166 t.bits_per_word = bits;
167 spi_message_add_tail(&t, &m);
168
169 mutex_lock(&edev->lock);
170
171 if (edev->pdata->prepare)
172 edev->pdata->prepare(edev);
173
174 ret = spi_sync(edev->spi, &m);
175 /* have to wait at least Tcsl ns */
176 ndelay(250);
177 if (ret)
178 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
179 is_on ? "en" : "dis", ret);
180
181 if (edev->pdata->finish)
182 edev->pdata->finish(edev);
183
184 mutex_unlock(&edev->lock);
185 return ret;
186}
187
188static ssize_t
189eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
190 const char *buf, unsigned off)
191{
192 struct spi_message m;
193 struct spi_transfer t[2];
194 int bits, data_len, ret;
195 u16 cmd_addr;
196
197 cmd_addr = OP_WRITE << edev->addrlen;
198
199 if (edev->addrlen == 7) {
200 cmd_addr |= off & 0x7f;
201 bits = 10;
202 data_len = 1;
203 } else {
204 cmd_addr |= (off >> 1) & 0x3f;
205 bits = 9;
206 data_len = 2;
207 }
208
209 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
210
211 spi_message_init(&m);
212 memset(t, 0, sizeof(t));
213
214 t[0].tx_buf = (char *)&cmd_addr;
215 t[0].len = 2;
216 t[0].bits_per_word = bits;
217 spi_message_add_tail(&t[0], &m);
218
219 t[1].tx_buf = buf;
220 t[1].len = data_len;
221 t[1].bits_per_word = 8;
222 spi_message_add_tail(&t[1], &m);
223
224 ret = spi_sync(edev->spi, &m);
225 /* have to wait program cycle time Twc ms */
226 mdelay(6);
227 return ret;
228}
229
230static int eeprom_93xx46_write(void *priv, unsigned int off,
231 void *val, size_t count)
232{
233 struct eeprom_93xx46_dev *edev = priv;
234 char *buf = val;
235 int i, ret, step = 1;
236
237 if (unlikely(off >= edev->size))
238 return -EFBIG;
239 if ((off + count) > edev->size)
240 count = edev->size - off;
241 if (unlikely(!count))
242 return count;
243
244 /* only write even number of bytes on 16-bit devices */
245 if (edev->addrlen == 6) {
246 step = 2;
247 count &= ~1;
248 }
249
250 /* erase/write enable */
251 ret = eeprom_93xx46_ew(edev, 1);
252 if (ret)
253 return ret;
254
255 mutex_lock(&edev->lock);
256
257 if (edev->pdata->prepare)
258 edev->pdata->prepare(edev);
259
260 for (i = 0; i < count; i += step) {
261 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
262 if (ret) {
263 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
264 (int)off + i, ret);
265 break;
266 }
267 }
268
269 if (edev->pdata->finish)
270 edev->pdata->finish(edev);
271
272 mutex_unlock(&edev->lock);
273
274 /* erase/write disable */
275 eeprom_93xx46_ew(edev, 0);
276 return ret;
277}
278
279static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
280{
281 struct eeprom_93xx46_platform_data *pd = edev->pdata;
282 struct spi_message m;
283 struct spi_transfer t;
284 int bits, ret;
285 u16 cmd_addr;
286
287 cmd_addr = OP_START << edev->addrlen;
288 if (edev->addrlen == 7) {
289 cmd_addr |= ADDR_ERAL << 1;
290 bits = 10;
291 } else {
292 cmd_addr |= ADDR_ERAL;
293 bits = 9;
294 }
295
296 if (has_quirk_instruction_length(edev)) {
297 cmd_addr <<= 2;
298 bits += 2;
299 }
300
301 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
302
303 spi_message_init(&m);
304 memset(&t, 0, sizeof(t));
305
306 t.tx_buf = &cmd_addr;
307 t.len = 2;
308 t.bits_per_word = bits;
309 spi_message_add_tail(&t, &m);
310
311 mutex_lock(&edev->lock);
312
313 if (edev->pdata->prepare)
314 edev->pdata->prepare(edev);
315
316 ret = spi_sync(edev->spi, &m);
317 if (ret)
318 dev_err(&edev->spi->dev, "erase error %d\n", ret);
319 /* have to wait erase cycle time Tec ms */
320 mdelay(6);
321
322 if (pd->finish)
323 pd->finish(edev);
324
325 mutex_unlock(&edev->lock);
326 return ret;
327}
328
329static ssize_t eeprom_93xx46_store_erase(struct device *dev,
330 struct device_attribute *attr,
331 const char *buf, size_t count)
332{
333 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
334 int erase = 0, ret;
335
336 sscanf(buf, "%d", &erase);
337 if (erase) {
338 ret = eeprom_93xx46_ew(edev, 1);
339 if (ret)
340 return ret;
341 ret = eeprom_93xx46_eral(edev);
342 if (ret)
343 return ret;
344 ret = eeprom_93xx46_ew(edev, 0);
345 if (ret)
346 return ret;
347 }
348 return count;
349}
350static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
351
352static void select_assert(void *context)
353{
354 struct eeprom_93xx46_dev *edev = context;
355
356 gpiod_set_value_cansleep(edev->pdata->select, 1);
357}
358
359static void select_deassert(void *context)
360{
361 struct eeprom_93xx46_dev *edev = context;
362
363 gpiod_set_value_cansleep(edev->pdata->select, 0);
364}
365
366static const struct of_device_id eeprom_93xx46_of_table[] = {
367 { .compatible = "eeprom-93xx46", },
368 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
369 {}
370};
371MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
372
373static int eeprom_93xx46_probe_dt(struct spi_device *spi)
374{
375 const struct of_device_id *of_id =
376 of_match_device(eeprom_93xx46_of_table, &spi->dev);
377 struct device_node *np = spi->dev.of_node;
378 struct eeprom_93xx46_platform_data *pd;
379 u32 tmp;
380 int ret;
381
382 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
383 if (!pd)
384 return -ENOMEM;
385
386 ret = of_property_read_u32(np, "data-size", &tmp);
387 if (ret < 0) {
388 dev_err(&spi->dev, "data-size property not found\n");
389 return ret;
390 }
391
392 if (tmp == 8) {
393 pd->flags |= EE_ADDR8;
394 } else if (tmp == 16) {
395 pd->flags |= EE_ADDR16;
396 } else {
397 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
398 return -EINVAL;
399 }
400
401 if (of_property_read_bool(np, "read-only"))
402 pd->flags |= EE_READONLY;
403
404 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
405 GPIOD_OUT_LOW);
406 if (IS_ERR(pd->select))
407 return PTR_ERR(pd->select);
408
409 pd->prepare = select_assert;
410 pd->finish = select_deassert;
411 gpiod_direction_output(pd->select, 0);
412
413 if (of_id->data) {
414 const struct eeprom_93xx46_devtype_data *data = of_id->data;
415
416 pd->quirks = data->quirks;
417 }
418
419 spi->dev.platform_data = pd;
420
421 return 0;
422}
423
424static int eeprom_93xx46_probe(struct spi_device *spi)
425{
426 struct eeprom_93xx46_platform_data *pd;
427 struct eeprom_93xx46_dev *edev;
428 int err;
429
430 if (spi->dev.of_node) {
431 err = eeprom_93xx46_probe_dt(spi);
432 if (err < 0)
433 return err;
434 }
435
436 pd = spi->dev.platform_data;
437 if (!pd) {
438 dev_err(&spi->dev, "missing platform data\n");
439 return -ENODEV;
440 }
441
442 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
443 if (!edev)
444 return -ENOMEM;
445
446 if (pd->flags & EE_ADDR8)
447 edev->addrlen = 7;
448 else if (pd->flags & EE_ADDR16)
449 edev->addrlen = 6;
450 else {
451 dev_err(&spi->dev, "unspecified address type\n");
452 err = -EINVAL;
453 goto fail;
454 }
455
456 mutex_init(&edev->lock);
457
458 edev->spi = spi;
459 edev->pdata = pd;
460
461 edev->size = 128;
462 edev->nvmem_config.name = dev_name(&spi->dev);
463 edev->nvmem_config.dev = &spi->dev;
464 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
465 edev->nvmem_config.root_only = true;
466 edev->nvmem_config.owner = THIS_MODULE;
467 edev->nvmem_config.compat = true;
468 edev->nvmem_config.base_dev = &spi->dev;
469 edev->nvmem_config.reg_read = eeprom_93xx46_read;
470 edev->nvmem_config.reg_write = eeprom_93xx46_write;
471 edev->nvmem_config.priv = edev;
472 edev->nvmem_config.stride = 4;
473 edev->nvmem_config.word_size = 1;
474 edev->nvmem_config.size = edev->size;
475
476 edev->nvmem = nvmem_register(&edev->nvmem_config);
477 if (IS_ERR(edev->nvmem)) {
478 err = PTR_ERR(edev->nvmem);
479 goto fail;
480 }
481
482 dev_info(&spi->dev, "%d-bit eeprom %s\n",
483 (pd->flags & EE_ADDR8) ? 8 : 16,
484 (pd->flags & EE_READONLY) ? "(readonly)" : "");
485
486 if (!(pd->flags & EE_READONLY)) {
487 if (device_create_file(&spi->dev, &dev_attr_erase))
488 dev_err(&spi->dev, "can't create erase interface\n");
489 }
490
491 spi_set_drvdata(spi, edev);
492 return 0;
493fail:
494 kfree(edev);
495 return err;
496}
497
498static int eeprom_93xx46_remove(struct spi_device *spi)
499{
500 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
501
502 nvmem_unregister(edev->nvmem);
503
504 if (!(edev->pdata->flags & EE_READONLY))
505 device_remove_file(&spi->dev, &dev_attr_erase);
506
507 kfree(edev);
508 return 0;
509}
510
511static struct spi_driver eeprom_93xx46_driver = {
512 .driver = {
513 .name = "93xx46",
514 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
515 },
516 .probe = eeprom_93xx46_probe,
517 .remove = eeprom_93xx46_remove,
518};
519
520module_spi_driver(eeprom_93xx46_driver);
521
522MODULE_LICENSE("GPL");
523MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
524MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
525MODULE_ALIAS("spi:93xx46");