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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 1999, 2010
4 *
5 * Author(s): Hartmut Penner <hp@de.ibm.com>
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>
7 * Rob van der Heij <rvdhei@iae.nl>
8 *
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/asm-offsets.h>
14#include <asm/thread_info.h>
15#include <asm/page.h>
16#include <asm/ptrace.h>
17
18__HEAD
19SYM_CODE_START(startup_continue)
20 larl %r1,tod_clock_base
21 mvc 0(16,%r1),__LC_BOOT_CLOCK
22#
23# Setup stack
24#
25 larl %r14,init_task
26 stg %r14,__LC_CURRENT
27 larl %r15,init_thread_union+STACK_INIT_OFFSET
28 stg %r15,__LC_KERNEL_STACK
29 brasl %r14,sclp_early_adjust_va # allow sclp_early_printk
30 brasl %r14,startup_init # s390 specific early init
31 brasl %r14,start_kernel # common init code
32#
33# We returned from start_kernel ?!? PANIK
34#
35 basr %r13,0
36 lpswe dw_psw-.(%r13) # load disabled wait psw
37SYM_CODE_END(startup_continue)
38
39 .balign 16
40SYM_DATA_LOCAL(dw_psw, .quad 0x0002000180000000,0x0000000000000000)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 1999, 2010
4 *
5 * Author(s): Hartmut Penner <hp@de.ibm.com>
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>
7 * Rob van der Heij <rvdhei@iae.nl>
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
9 *
10 */
11
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/thread_info.h>
16#include <asm/page.h>
17
18__HEAD
19ENTRY(startup_continue)
20 tm __LC_STFLE_FAC_LIST+5,0x80 # LPP available ?
21 jz 0f
22 xc __LC_LPP+1(7,0),__LC_LPP+1 # clear lpp and current_pid
23 mvi __LC_LPP,0x80 # and set LPP_MAGIC
24 .insn s,0xb2800000,__LC_LPP # load program parameter
250: larl %r1,tod_clock_base
26 mvc 0(16,%r1),__LC_BOOT_CLOCK
27 larl %r13,.LPG1 # get base
28 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
29 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
30 # move IPL device to lowcore
31 larl %r0,boot_vdso_data
32 stg %r0,__LC_VDSO_PER_CPU
33#
34# Setup stack
35#
36 larl %r14,init_task
37 stg %r14,__LC_CURRENT
38 larl %r15,init_thread_union
39 aghi %r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER) # init_task_union + THREAD_SIZE
40 stg %r15,__LC_KERNEL_STACK # set end of kernel stack
41 aghi %r15,-160
42#
43# Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
44# and create a kernel NSS if the SAVESYS= parm is defined
45#
46 brasl %r14,startup_init
47 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
48 # virtual and never return ...
49 .align 16
50.LPG1:
51.Lentry:.quad 0x0000000180000000,_stext
52.Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space
53 .quad 0 # cr1: primary space segment table
54 .quad .Lduct # cr2: dispatchable unit control table
55 .quad 0 # cr3: instruction authorization
56 .quad 0xffff # cr4: instruction authorization
57 .quad .Lduct # cr5: primary-aste origin
58 .quad 0 # cr6: I/O interrupts
59 .quad 0 # cr7: secondary space segment table
60 .quad 0 # cr8: access registers translation
61 .quad 0 # cr9: tracing off
62 .quad 0 # cr10: tracing off
63 .quad 0 # cr11: tracing off
64 .quad 0 # cr12: tracing off
65 .quad 0 # cr13: home space segment table
66 .quad 0xc0000000 # cr14: machine check handling off
67 .quad .Llinkage_stack # cr15: linkage stack operations
68.Lpcmsk:.quad 0x0000000180000000
69.L4malign:.quad 0xffffffffffc00000
70.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
71.Lnop: .long 0x07000700
72.Lparmaddr:
73 .quad PARMAREA
74 .align 64
75.Lduct: .long 0,.Laste,.Laste,0,.Lduald,0,0,0
76 .long 0,0,0,0,0,0,0,0
77.Laste: .quad 0,0xffffffffffffffff,0,0,0,0,0,0
78 .align 128
79.Lduald:.rept 8
80 .long 0x80000000,0,0,0 # invalid access-list entries
81 .endr
82.Llinkage_stack:
83 .long 0,0,0x89000000,0,0,0,0x8a000000,0
84
85ENTRY(_ehead)
86
87 .org 0x100000 - 0x11000 # head.o ends at 0x11000
88#
89# startup-code, running in absolute addressing mode
90#
91ENTRY(_stext)
92 basr %r13,0 # get base
93.LPG3:
94# check control registers
95 stctg %c0,%c15,0(%r15)
96 oi 6(%r15),0x60 # enable sigp emergency & external call
97 oi 4(%r15),0x10 # switch on low address proctection
98 lctlg %c0,%c15,0(%r15)
99
100 lam 0,15,.Laregs-.LPG3(%r13) # load acrs needed by uaccess
101 brasl %r14,start_kernel # go to C code
102#
103# We returned from start_kernel ?!? PANIK
104#
105 basr %r13,0
106 lpswe .Ldw-.(%r13) # load disabled wait psw
107
108 .align 8
109.Ldw: .quad 0x0002000180000000,0x0000000000000000
110.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0