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v6.8
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * MPC8641 Silicon/SoC Device Tree Source (post include)
  4 *
  5 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
 
 
 
 
 
 
  6 */
  7
  8&lbc {
  9	#address-cells = <2>;
 10	#size-cells = <1>;
 11	compatible = "fsl,mpc8641-localbus", "simple-bus";
 12	interrupts = <19 2 0 0>;
 13};
 14
 15&soc {
 16	#address-cells = <1>;
 17	#size-cells = <1>;
 18	device_type = "soc";
 19	compatible = "fsl,mpc8641-soc", "simple-bus";
 20	bus-frequency = <0>;
 21
 22	mcm-law@0 {
 23		compatible = "fsl,mcm-law";
 24		reg = <0x0 0x1000>;
 25		fsl,num-laws = <10>;
 26	};
 27
 28	mcm@1000 {
 29		compatible = "fsl,mpc8641-mcm", "fsl,mcm";
 30		reg = <0x1000 0x1000>;
 31		interrupts = <17 2 0 0>;
 32	};
 33
 34/include/ "pq3-i2c-0.dtsi"
 35/include/ "pq3-i2c-1.dtsi"
 36/include/ "pq3-duart-0.dtsi"
 37	serial@4600 {
 38		interrupts = <28 2 0 0>;
 39	};
 40/include/ "pq3-dma-0.dtsi"
 41	dma@21300 {
 42		compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
 43	};
 44	dma-channel@0 {
 45		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 46	};
 47	dma-channel@80 {
 48		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 49	};
 50	dma-channel@100 {
 51		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 52	};
 53	dma-channel@180 {
 54		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 55	};
 56
 57/include/ "pq3-etsec1-0.dtsi"
 58	ethernet@24000 {
 59		model = "TSEC";
 60	};
 61/include/ "pq3-etsec1-1.dtsi"
 62	ethernet@25000 {
 63		model = "TSEC";
 64	};
 65/include/ "pq3-etsec1-2.dtsi"
 66	ethernet@26000 {
 67		model = "TSEC";
 68	};
 69/include/ "pq3-etsec1-3.dtsi"
 70	ethernet@27000 {
 71		model = "TSEC";
 72	};
 73
 74/include/ "qoriq-mpic.dtsi"
 75	msi@41600 {
 76		compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
 77	};
 78	msi@41800 {
 79		compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
 80	};
 81	msi@41a00 {
 82		compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
 83	};
 84
 85	global-utilities@e0000 {
 86		compatible = "fsl,mpc8641-guts";
 87		reg = <0xe0000 0x1000>;
 88		fsl,has-rstcr;
 89	};
 90};
 91
 92&pci0 {
 93	compatible = "fsl,mpc8641-pcie";
 94	device_type = "pci";
 95	#interrupt-cells = <1>;
 96	#size-cells = <2>;
 97	#address-cells = <3>;
 98	bus-range = <0x0 0xff>;
 99	clock-frequency = <100000000>;
100	interrupts = <24 2 0 0>;
101
102	pcie@0 {
103		reg = <0 0 0 0 0>;
104		#interrupt-cells = <1>;
105		#size-cells = <2>;
106		#address-cells = <3>;
107		device_type = "pci";
108		interrupts = <24 2 0 0>;
109		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
110		interrupt-map = <
111			0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
112			0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
113			0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
114			0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
115			>;
116	};
117};
118
119&pci1 {
120	compatible = "fsl,mpc8641-pcie";
121	device_type = "pci";
122	#interrupt-cells = <1>;
123	#size-cells = <2>;
124	#address-cells = <3>;
125	bus-range = <0x0 0xff>;
126	clock-frequency = <100000000>;
127	interrupts = <25 2 0 0>;
128
129	pcie@0 {
130		reg = <0 0 0 0 0>;
131		#interrupt-cells = <1>;
132		#size-cells = <2>;
133		#address-cells = <3>;
134		device_type = "pci";
135		interrupts = <25 2 0 0>;
136		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
137		interrupt-map = <
138			0x0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
139			0x0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
140			0x0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
141			0x0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
142			>;
143	};
144};
v4.17
 
  1/*
  2 * MPC8641 Silicon/SoC Device Tree Source (post include)
  3 *
  4 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
  5 *
  6 * This program is free software; you can redistribute  it and/or modify it
  7 * under  the terms of  the GNU General  Public License as published by the
  8 * Free Software Foundation;  either version 2 of the  License, or (at your
  9 * option) any later version.
 10 *
 11 */
 12
 13&lbc {
 14	#address-cells = <2>;
 15	#size-cells = <1>;
 16	compatible = "fsl,mpc8641-localbus", "simple-bus";
 17	interrupts = <19 2 0 0>;
 18};
 19
 20&soc {
 21	#address-cells = <1>;
 22	#size-cells = <1>;
 23	device_type = "soc";
 24	compatible = "fsl,mpc8641-soc", "simple-bus";
 25	bus-frequency = <0>;
 26
 27	mcm-law@0 {
 28		compatible = "fsl,mcm-law";
 29		reg = <0x0 0x1000>;
 30		fsl,num-laws = <10>;
 31	};
 32
 33	mcm@1000 {
 34		compatible = "fsl,mpc8641-mcm", "fsl,mcm";
 35		reg = <0x1000 0x1000>;
 36		interrupts = <17 2 0 0>;
 37	};
 38
 39/include/ "pq3-i2c-0.dtsi"
 40/include/ "pq3-i2c-1.dtsi"
 41/include/ "pq3-duart-0.dtsi"
 42	serial@4600 {
 43		interrupts = <28 2 0 0>;
 44	};
 45/include/ "pq3-dma-0.dtsi"
 46	dma@21300 {
 47		compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
 48	};
 49	dma-channel@0 {
 50		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 51	};
 52	dma-channel@80 {
 53		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 54	};
 55	dma-channel@100 {
 56		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 57	};
 58	dma-channel@180 {
 59		compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel";
 60	};
 61
 62/include/ "pq3-etsec1-0.dtsi"
 63	ethernet@24000 {
 64		model = "TSEC";
 65	};
 66/include/ "pq3-etsec1-1.dtsi"
 67	ethernet@25000 {
 68		model = "TSEC";
 69	};
 70/include/ "pq3-etsec1-2.dtsi"
 71	ethernet@26000 {
 72		model = "TSEC";
 73	};
 74/include/ "pq3-etsec1-3.dtsi"
 75	ethernet@27000 {
 76		model = "TSEC";
 77	};
 78
 79/include/ "qoriq-mpic.dtsi"
 80	msi@41600 {
 81		compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
 82	};
 83	msi@41800 {
 84		compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
 85	};
 86	msi@41a00 {
 87		compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
 88	};
 89
 90	global-utilities@e0000 {
 91		compatible = "fsl,mpc8641-guts";
 92		reg = <0xe0000 0x1000>;
 93		fsl,has-rstcr;
 94	};
 95};
 96
 97&pci0 {
 98	compatible = "fsl,mpc8641-pcie";
 99	device_type = "pci";
 
100	#size-cells = <2>;
101	#address-cells = <3>;
102	bus-range = <0x0 0xff>;
103	clock-frequency = <100000000>;
104	interrupts = <24 2 0 0>;
105
106	pcie@0 {
107		reg = <0 0 0 0 0>;
108		#interrupt-cells = <1>;
109		#size-cells = <2>;
110		#address-cells = <3>;
111		device_type = "pci";
112		interrupts = <24 2 0 0>;
113		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
114		interrupt-map = <
115			0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
116			0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
117			0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
118			0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
119			>;
120	};
121};
122
123&pci1 {
124	compatible = "fsl,mpc8641-pcie";
125	device_type = "pci";
 
126	#size-cells = <2>;
127	#address-cells = <3>;
128	bus-range = <0x0 0xff>;
129	clock-frequency = <100000000>;
130	interrupts = <25 2 0 0>;
131
132	pcie@0 {
133		reg = <0 0 0 0 0>;
134		#interrupt-cells = <1>;
135		#size-cells = <2>;
136		#address-cells = <3>;
137		device_type = "pci";
138		interrupts = <25 2 0 0>;
139		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
140		interrupt-map = <
141			0x0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
142			0x0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
143			0x0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
144			0x0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
145			>;
146	};
147};