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v6.8
  1/*
  2 * BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
  3 *
  4 * Copyright 2014 Freescale Semiconductor Inc.
  5 *
  6 * Redistribution and use in source and binary forms, with or without
  7 * modification, are permitted provided that the following conditions are met:
  8 *     * Redistributions of source code must retain the above copyright
  9 *       notice, this list of conditions and the following disclaimer.
 10 *     * Redistributions in binary form must reproduce the above copyright
 11 *       notice, this list of conditions and the following disclaimer in the
 12 *       documentation and/or other materials provided with the distribution.
 13 *     * Neither the name of Freescale Semiconductor nor the
 14 *       names of its contributors may be used to endorse or promote products
 15 *       derived from this software without specific prior written permission.
 16 *
 17 *
 18 * ALTERNATIVELY, this software may be distributed under the terms of the
 19 * GNU General Public License ("GPL") as published by the Free Software
 20 * Foundation, either version 2 of that License or (at your option) any
 21 * later version.
 22 *
 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35&ifc {
 36	nor@0,0 {
 37		#address-cells = <1>;
 38		#size-cells = <1>;
 39		compatible = "cfi-flash";
 40		reg = <0x0 0x0 0x8000000>;
 41		bank-width = <2>;
 42		device-width = <1>;
 43	};
 44
 45	nand@1,0 {
 46		#address-cells = <1>;
 47		#size-cells = <1>;
 48		compatible = "fsl,ifc-nand";
 49		reg = <0x1 0x0 0x4000>;
 50	};
 51};
 52
 53&soc {
 54	spi@7000 {
 55		flash@0 {
 56			#address-cells = <1>;
 57			#size-cells = <1>;
 58			compatible = "spansion,s25sl12801", "jedec,spi-nor";
 59			reg = <0>;
 60			spi-max-frequency = <30000000>;
 61		};
 62	};
 63
 64	i2c@3000 {
 65		fpga: fpga@66 {
 66			compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
 67			reg = <0x66>;
 68		};
 69	};
 70
 71	usb@22000 {
 72		phy_type = "ulpi";
 73	};
 74
 75	mdio@24000 {
 76		phy0: ethernet-phy@0 {
 77			reg = <0x0>;
 78		};
 79
 80		phy1: ethernet-phy@1 {
 81			reg = <0x1>;
 82		};
 83
 84		tbi0: tbi-phy@11 {
 85			reg = <0x1f>;
 86			device_type = "tbi-phy";
 87		};
 88	};
 89
 90	ptp_clock@b0e00 {
 91		compatible = "fsl,etsec-ptp";
 92		reg = <0xb0e00 0xb0>;
 93		interrupts = <68 2 0 0 69 2 0 0>;
 94		fsl,tclk-period	= <5>;
 95		fsl,tmr-prsc	= <2>;
 96		fsl,tmr-add	= <0xcccccccd>;
 97		fsl,tmr-fiper1	= <999999995>;
 98		fsl,tmr-fiper2	= <99990>;
 99		fsl,max-adj	= <249999999>;
100	};
101
102	enet0: ethernet@b0000 {
103		phy-handle = <&phy0>;
104		tbi-handle = <&tbi0>;
105		phy-connection-type = "sgmii";
106	};
107
108	enet1: ethernet@b1000 {
109		phy-handle = <&phy1>;
110		tbi-handle = <&tbi0>;
111		phy-connection-type = "sgmii";
112	};
113};
v4.17
  1/*
  2 * BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
  3 *
  4 * Copyright 2014 Freescale Semiconductor Inc.
  5 *
  6 * Redistribution and use in source and binary forms, with or without
  7 * modification, are permitted provided that the following conditions are met:
  8 *     * Redistributions of source code must retain the above copyright
  9 *       notice, this list of conditions and the following disclaimer.
 10 *     * Redistributions in binary form must reproduce the above copyright
 11 *       notice, this list of conditions and the following disclaimer in the
 12 *       documentation and/or other materials provided with the distribution.
 13 *     * Neither the name of Freescale Semiconductor nor the
 14 *       names of its contributors may be used to endorse or promote products
 15 *       derived from this software without specific prior written permission.
 16 *
 17 *
 18 * ALTERNATIVELY, this software may be distributed under the terms of the
 19 * GNU General Public License ("GPL") as published by the Free Software
 20 * Foundation, either version 2 of that License or (at your option) any
 21 * later version.
 22 *
 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35&ifc {
 36	nor@0,0 {
 37		#address-cells = <1>;
 38		#size-cells = <1>;
 39		compatible = "cfi-flash";
 40		reg = <0x0 0x0 0x8000000>;
 41		bank-width = <2>;
 42		device-width = <1>;
 43	};
 44
 45	nand@1,0 {
 46		#address-cells = <1>;
 47		#size-cells = <1>;
 48		compatible = "fsl,ifc-nand";
 49		reg = <0x1 0x0 0x4000>;
 50	};
 51};
 52
 53&soc {
 54	spi@7000 {
 55		flash@0 {
 56			#address-cells = <1>;
 57			#size-cells = <1>;
 58			compatible = "spansion,s25sl12801", "jedec,spi-nor";
 59			reg = <0>;
 60			spi-max-frequency = <30000000>;
 61		};
 62	};
 63
 64	i2c@3000 {
 65		fpga: fpga@66 {
 66			compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
 67			reg = <0x66>;
 68		};
 69	};
 70
 71	usb@22000 {
 72		phy_type = "ulpi";
 73	};
 74
 75	mdio@24000 {
 76		phy0: ethernet-phy@0 {
 77			reg = <0x0>;
 78		};
 79
 80		phy1: ethernet-phy@1 {
 81			reg = <0x1>;
 82		};
 83
 84		tbi0: tbi-phy@11 {
 85			reg = <0x1f>;
 86			device_type = "tbi-phy";
 87		};
 88	};
 89
 90	ptp_clock@b0e00 {
 91		compatible = "fsl,etsec-ptp";
 92		reg = <0xb0e00 0xb0>;
 93		interrupts = <68 2 0 0 69 2 0 0>;
 94		fsl,tclk-period	= <5>;
 95		fsl,tmr-prsc	= <2>;
 96		fsl,tmr-add	= <0xcccccccd>;
 97		fsl,tmr-fiper1	= <999999995>;
 98		fsl,tmr-fiper2	= <99990>;
 99		fsl,max-adj	= <249999999>;
100	};
101
102	enet0: ethernet@b0000 {
103		phy-handle = <&phy0>;
104		tbi-handle = <&tbi0>;
105		phy-connection-type = "sgmii";
106	};
107
108	enet1: ethernet@b1000 {
109		phy-handle = <&phy1>;
110		tbi-handle = <&tbi0>;
111		phy-connection-type = "sgmii";
112	};
113};