1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Joshua Henderson <joshua.henderson@microchip.com>
 4 * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
 
 
 
 
 
 
 
 
 
 5 */
 6#include <linux/init.h>
 7#include <linux/pm.h>
 8#include <asm/reboot.h>
 9#include <asm/mach-pic32/pic32.h>
10
11#define PIC32_RSWRST		0x10
12
13static void pic32_halt(void)
14{
15	while (1) {
16		__asm__(".set push;\n"
17			".set arch=r4000;\n"
18			"wait;\n"
19			".set pop;\n"
20		);
21	}
22}
23
24static void pic32_machine_restart(char *command)
25{
26	void __iomem *reg =
27		ioremap(PIC32_BASE_RESET + PIC32_RSWRST, sizeof(u32));
28
29	pic32_syskey_unlock();
30
31	/* magic write/read */
32	__raw_writel(1, reg);
33	(void)__raw_readl(reg);
34
35	pic32_halt();
36}
37
38static void pic32_machine_halt(void)
39{
40	local_irq_disable();
41
42	pic32_halt();
43}
44
45static int __init mips_reboot_setup(void)
46{
47	_machine_restart = pic32_machine_restart;
48	_machine_halt = pic32_machine_halt;
49	pm_power_off = pic32_machine_halt;
50
51	return 0;
52}
53
54arch_initcall(mips_reboot_setup);

 
 1/*
 2 * Joshua Henderson <joshua.henderson@microchip.com>
 3 * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
 4 *
 5 *  This program is free software; you can distribute it and/or modify it
 6 *  under the terms of the GNU General Public License (Version 2) as
 7 *  published by the Free Software Foundation.
 8 *
 9 *  This program is distributed in the hope it will be useful, but WITHOUT
10 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 *  for more details.
13 */
14#include <linux/init.h>
15#include <linux/pm.h>
16#include <asm/reboot.h>
17#include <asm/mach-pic32/pic32.h>
18
19#define PIC32_RSWRST		0x10
20
21static void pic32_halt(void)
22{
23	while (1) {
24		__asm__(".set push;\n"
25			".set arch=r4000;\n"
26			"wait;\n"
27			".set pop;\n"
28		);
29	}
30}
31
32static void pic32_machine_restart(char *command)
33{
34	void __iomem *reg =
35		ioremap(PIC32_BASE_RESET + PIC32_RSWRST, sizeof(u32));
36
37	pic32_syskey_unlock();
38
39	/* magic write/read */
40	__raw_writel(1, reg);
41	(void)__raw_readl(reg);
42
43	pic32_halt();
44}
45
46static void pic32_machine_halt(void)
47{
48	local_irq_disable();
49
50	pic32_halt();
51}
52
53static int __init mips_reboot_setup(void)
54{
55	_machine_restart = pic32_machine_restart;
56	_machine_halt = pic32_machine_halt;
57	pm_power_off = pic32_machine_halt;
58
59	return 0;
60}
61
62arch_initcall(mips_reboot_setup);