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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
4 *
5 * Copyright (C) 2008 Sergey Lapin
6 * Based on ds1307 driver by James Chapman and David Brownell
7 */
8
9#include <linux/module.h>
10#include <linux/i2c.h>
11#include <linux/rtc.h>
12#include <linux/bcd.h>
13#include <linux/slab.h>
14
15#define FM3130_RTC_CONTROL (0x0)
16#define FM3130_CAL_CONTROL (0x1)
17#define FM3130_RTC_SECONDS (0x2)
18#define FM3130_RTC_MINUTES (0x3)
19#define FM3130_RTC_HOURS (0x4)
20#define FM3130_RTC_DAY (0x5)
21#define FM3130_RTC_DATE (0x6)
22#define FM3130_RTC_MONTHS (0x7)
23#define FM3130_RTC_YEARS (0x8)
24
25#define FM3130_ALARM_SECONDS (0x9)
26#define FM3130_ALARM_MINUTES (0xa)
27#define FM3130_ALARM_HOURS (0xb)
28#define FM3130_ALARM_DATE (0xc)
29#define FM3130_ALARM_MONTHS (0xd)
30#define FM3130_ALARM_WP_CONTROL (0xe)
31
32#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
33#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
34#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
35#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
36#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
37#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
38#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
39#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
40#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
41
42#define FM3130_CLOCK_REGS 7
43#define FM3130_ALARM_REGS 5
44
45struct fm3130 {
46 u8 reg_addr_time;
47 u8 reg_addr_alarm;
48 u8 regs[15];
49 struct i2c_msg msg[4];
50 struct i2c_client *client;
51 struct rtc_device *rtc;
52 int alarm_valid;
53 int data_valid;
54};
55static const struct i2c_device_id fm3130_id[] = {
56 { "fm3130", 0 },
57 { }
58};
59MODULE_DEVICE_TABLE(i2c, fm3130_id);
60
61#define FM3130_MODE_NORMAL 0
62#define FM3130_MODE_WRITE 1
63#define FM3130_MODE_READ 2
64
65static void fm3130_rtc_mode(struct device *dev, int mode)
66{
67 struct fm3130 *fm3130 = dev_get_drvdata(dev);
68
69 fm3130->regs[FM3130_RTC_CONTROL] =
70 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
71 switch (mode) {
72 case FM3130_MODE_NORMAL:
73 fm3130->regs[FM3130_RTC_CONTROL] &=
74 ~(FM3130_RTC_CONTROL_BIT_WRITE |
75 FM3130_RTC_CONTROL_BIT_READ);
76 break;
77 case FM3130_MODE_WRITE:
78 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
79 break;
80 case FM3130_MODE_READ:
81 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
82 break;
83 default:
84 dev_dbg(dev, "invalid mode %d\n", mode);
85 break;
86 }
87
88 i2c_smbus_write_byte_data(fm3130->client,
89 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
90}
91
92static int fm3130_get_time(struct device *dev, struct rtc_time *t)
93{
94 struct fm3130 *fm3130 = dev_get_drvdata(dev);
95 int tmp;
96
97 if (!fm3130->data_valid) {
98 /* We have invalid data in RTC, probably due
99 to battery faults or other problems. Return EIO
100 for now, it will allow us to set data later instead
101 of error during probing which disables device */
102 return -EIO;
103 }
104 fm3130_rtc_mode(dev, FM3130_MODE_READ);
105
106 /* read the RTC date and time registers all at once */
107 tmp = i2c_transfer(fm3130->client->adapter, fm3130->msg, 2);
108 if (tmp != 2) {
109 dev_err(dev, "%s error %d\n", "read", tmp);
110 return -EIO;
111 }
112
113 fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
114
115 dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
116
117 t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
118 t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
119 tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
120 t->tm_hour = bcd2bin(tmp);
121 t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
122 t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
123 tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
124 t->tm_mon = bcd2bin(tmp) - 1;
125
126 /* assume 20YY not 19YY, and ignore CF bit */
127 t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
128
129 dev_dbg(dev, "%s secs=%d, mins=%d, "
130 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
131 "read", t->tm_sec, t->tm_min,
132 t->tm_hour, t->tm_mday,
133 t->tm_mon, t->tm_year, t->tm_wday);
134
135 return 0;
136}
137
138
139static int fm3130_set_time(struct device *dev, struct rtc_time *t)
140{
141 struct fm3130 *fm3130 = dev_get_drvdata(dev);
142 int tmp, i;
143 u8 *buf = fm3130->regs;
144
145 dev_dbg(dev, "%s secs=%d, mins=%d, "
146 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
147 "write", t->tm_sec, t->tm_min,
148 t->tm_hour, t->tm_mday,
149 t->tm_mon, t->tm_year, t->tm_wday);
150
151 /* first register addr */
152 buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
153 buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
154 buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
155 buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
156 buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
157 buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
158
159 /* assume 20YY not 19YY */
160 tmp = t->tm_year - 100;
161 buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
162
163 dev_dbg(dev, "%s: %15ph\n", "write", buf);
164
165 fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
166
167 /* Writing time registers, we don't support multibyte transfers */
168 for (i = 0; i < FM3130_CLOCK_REGS; i++) {
169 i2c_smbus_write_byte_data(fm3130->client,
170 FM3130_RTC_SECONDS + i,
171 fm3130->regs[FM3130_RTC_SECONDS + i]);
172 }
173
174 fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
175
176 /* We assume here that data are valid once written */
177 if (!fm3130->data_valid)
178 fm3130->data_valid = 1;
179 return 0;
180}
181
182static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
183{
184 struct fm3130 *fm3130 = dev_get_drvdata(dev);
185 int tmp;
186 struct rtc_time *tm = &alrm->time;
187
188 if (!fm3130->alarm_valid) {
189 /*
190 * We have invalid alarm in RTC, probably due to battery faults
191 * or other problems. Return EIO for now, it will allow us to
192 * set alarm value later instead of error during probing which
193 * disables device
194 */
195 return -EIO;
196 }
197
198 /* read the RTC alarm registers all at once */
199 tmp = i2c_transfer(fm3130->client->adapter, &fm3130->msg[2], 2);
200 if (tmp != 2) {
201 dev_err(dev, "%s error %d\n", "read", tmp);
202 return -EIO;
203 }
204 dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
205 fm3130->regs[FM3130_ALARM_SECONDS],
206 fm3130->regs[FM3130_ALARM_MINUTES],
207 fm3130->regs[FM3130_ALARM_HOURS],
208 fm3130->regs[FM3130_ALARM_DATE],
209 fm3130->regs[FM3130_ALARM_MONTHS]);
210
211 tm->tm_sec = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
212 tm->tm_min = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
213 tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
214 tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
215 tm->tm_mon = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
216
217 if (tm->tm_mon > 0)
218 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
219
220 dev_dbg(dev, "%s secs=%d, mins=%d, "
221 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
222 "read alarm", tm->tm_sec, tm->tm_min,
223 tm->tm_hour, tm->tm_mday,
224 tm->tm_mon, tm->tm_year, tm->tm_wday);
225
226 /* check if alarm enabled */
227 fm3130->regs[FM3130_RTC_CONTROL] =
228 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
229
230 if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
231 (~fm3130->regs[FM3130_RTC_CONTROL] &
232 FM3130_RTC_CONTROL_BIT_CAL)) {
233 alrm->enabled = 1;
234 }
235
236 return 0;
237}
238
239static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
240{
241 struct fm3130 *fm3130 = dev_get_drvdata(dev);
242 struct rtc_time *tm = &alrm->time;
243 int i;
244
245 dev_dbg(dev, "%s secs=%d, mins=%d, "
246 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
247 "write alarm", tm->tm_sec, tm->tm_min,
248 tm->tm_hour, tm->tm_mday,
249 tm->tm_mon, tm->tm_year, tm->tm_wday);
250
251 fm3130->regs[FM3130_ALARM_SECONDS] =
252 (tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
253
254 fm3130->regs[FM3130_ALARM_MINUTES] =
255 (tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
256
257 fm3130->regs[FM3130_ALARM_HOURS] =
258 (tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
259
260 fm3130->regs[FM3130_ALARM_DATE] =
261 (tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
262
263 fm3130->regs[FM3130_ALARM_MONTHS] =
264 (tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
265
266 dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
267 fm3130->regs[FM3130_ALARM_SECONDS],
268 fm3130->regs[FM3130_ALARM_MINUTES],
269 fm3130->regs[FM3130_ALARM_HOURS],
270 fm3130->regs[FM3130_ALARM_DATE],
271 fm3130->regs[FM3130_ALARM_MONTHS]);
272 /* Writing time registers, we don't support multibyte transfers */
273 for (i = 0; i < FM3130_ALARM_REGS; i++) {
274 i2c_smbus_write_byte_data(fm3130->client,
275 FM3130_ALARM_SECONDS + i,
276 fm3130->regs[FM3130_ALARM_SECONDS + i]);
277 }
278 fm3130->regs[FM3130_RTC_CONTROL] =
279 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
280
281 /* enable or disable alarm */
282 if (alrm->enabled) {
283 i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
284 (fm3130->regs[FM3130_RTC_CONTROL] &
285 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
286 FM3130_RTC_CONTROL_BIT_AEN);
287 } else {
288 i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
289 fm3130->regs[FM3130_RTC_CONTROL] &
290 ~(FM3130_RTC_CONTROL_BIT_CAL) &
291 ~(FM3130_RTC_CONTROL_BIT_AEN));
292 }
293
294 /* We assume here that data is valid once written */
295 if (!fm3130->alarm_valid)
296 fm3130->alarm_valid = 1;
297
298 return 0;
299}
300
301static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
302{
303 struct fm3130 *fm3130 = dev_get_drvdata(dev);
304 int ret = 0;
305
306 fm3130->regs[FM3130_RTC_CONTROL] =
307 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
308
309 dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
310 enabled, fm3130->regs[FM3130_RTC_CONTROL]);
311
312 switch (enabled) {
313 case 0: /* alarm off */
314 ret = i2c_smbus_write_byte_data(fm3130->client,
315 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
316 ~(FM3130_RTC_CONTROL_BIT_CAL) &
317 ~(FM3130_RTC_CONTROL_BIT_AEN));
318 break;
319 case 1: /* alarm on */
320 ret = i2c_smbus_write_byte_data(fm3130->client,
321 FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
322 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
323 FM3130_RTC_CONTROL_BIT_AEN);
324 break;
325 default:
326 ret = -EINVAL;
327 break;
328 }
329
330 return ret;
331}
332
333static const struct rtc_class_ops fm3130_rtc_ops = {
334 .read_time = fm3130_get_time,
335 .set_time = fm3130_set_time,
336 .read_alarm = fm3130_read_alarm,
337 .set_alarm = fm3130_set_alarm,
338 .alarm_irq_enable = fm3130_alarm_irq_enable,
339};
340
341static struct i2c_driver fm3130_driver;
342
343static int fm3130_probe(struct i2c_client *client)
344{
345 struct fm3130 *fm3130;
346 int err = -ENODEV;
347 int tmp;
348 struct i2c_adapter *adapter = client->adapter;
349
350 if (!i2c_check_functionality(adapter,
351 I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
352 return -EIO;
353
354 fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
355
356 if (!fm3130)
357 return -ENOMEM;
358
359 fm3130->client = client;
360 i2c_set_clientdata(client, fm3130);
361 fm3130->reg_addr_time = FM3130_RTC_SECONDS;
362 fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
363
364 /* Messages to read time */
365 fm3130->msg[0].addr = client->addr;
366 fm3130->msg[0].flags = 0;
367 fm3130->msg[0].len = 1;
368 fm3130->msg[0].buf = &fm3130->reg_addr_time;
369
370 fm3130->msg[1].addr = client->addr;
371 fm3130->msg[1].flags = I2C_M_RD;
372 fm3130->msg[1].len = FM3130_CLOCK_REGS;
373 fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
374
375 /* Messages to read alarm */
376 fm3130->msg[2].addr = client->addr;
377 fm3130->msg[2].flags = 0;
378 fm3130->msg[2].len = 1;
379 fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
380
381 fm3130->msg[3].addr = client->addr;
382 fm3130->msg[3].flags = I2C_M_RD;
383 fm3130->msg[3].len = FM3130_ALARM_REGS;
384 fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
385
386 fm3130->alarm_valid = 0;
387 fm3130->data_valid = 0;
388
389 tmp = i2c_transfer(adapter, fm3130->msg, 4);
390 if (tmp != 4) {
391 dev_dbg(&client->dev, "read error %d\n", tmp);
392 err = -EIO;
393 goto exit_free;
394 }
395
396 fm3130->regs[FM3130_RTC_CONTROL] =
397 i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
398 fm3130->regs[FM3130_CAL_CONTROL] =
399 i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
400
401 /* Disabling calibration mode */
402 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
403 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
404 fm3130->regs[FM3130_RTC_CONTROL] &
405 ~(FM3130_RTC_CONTROL_BIT_CAL));
406 dev_warn(&client->dev, "Disabling calibration mode!\n");
407 }
408
409 /* Disabling read and write modes */
410 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
411 fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
412 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
413 fm3130->regs[FM3130_RTC_CONTROL] &
414 ~(FM3130_RTC_CONTROL_BIT_READ |
415 FM3130_RTC_CONTROL_BIT_WRITE));
416 dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
417 }
418
419 /* oscillator off? turn it on, so clock can tick. */
420 if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
421 i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
422 fm3130->regs[FM3130_CAL_CONTROL] &
423 ~(FM3130_CAL_CONTROL_BIT_nOSCEN));
424
425 /* low battery? clear flag, and warn */
426 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
427 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
428 fm3130->regs[FM3130_RTC_CONTROL] &
429 ~(FM3130_RTC_CONTROL_BIT_LB));
430 dev_warn(&client->dev, "Low battery!\n");
431 }
432
433 /* check if Power On Reset bit is set */
434 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
435 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
436 fm3130->regs[FM3130_RTC_CONTROL] &
437 ~FM3130_RTC_CONTROL_BIT_POR);
438 dev_dbg(&client->dev, "POR bit is set\n");
439 }
440 /* ACS is controlled by alarm */
441 i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
442
443 /* alarm registers sanity check */
444 tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
445 if (tmp > 59)
446 goto bad_alarm;
447
448 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
449 if (tmp > 59)
450 goto bad_alarm;
451
452 tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
453 if (tmp > 23)
454 goto bad_alarm;
455
456 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
457 if (tmp == 0 || tmp > 31)
458 goto bad_alarm;
459
460 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
461 if (tmp == 0 || tmp > 12)
462 goto bad_alarm;
463
464 fm3130->alarm_valid = 1;
465
466bad_alarm:
467
468 /* clock registers sanity chek */
469 tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
470 if (tmp > 59)
471 goto bad_clock;
472
473 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
474 if (tmp > 59)
475 goto bad_clock;
476
477 tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
478 if (tmp > 23)
479 goto bad_clock;
480
481 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
482 if (tmp == 0 || tmp > 7)
483 goto bad_clock;
484
485 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
486 if (tmp == 0 || tmp > 31)
487 goto bad_clock;
488
489 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
490 if (tmp == 0 || tmp > 12)
491 goto bad_clock;
492
493 fm3130->data_valid = 1;
494
495bad_clock:
496
497 if (!fm3130->data_valid || !fm3130->alarm_valid)
498 dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
499 fm3130->regs);
500
501 /* We won't bail out here because we just got invalid data.
502 Time setting from u-boot doesn't work anyway */
503 fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
504 &fm3130_rtc_ops, THIS_MODULE);
505 if (IS_ERR(fm3130->rtc)) {
506 err = PTR_ERR(fm3130->rtc);
507 dev_err(&client->dev,
508 "unable to register the class device\n");
509 goto exit_free;
510 }
511 return 0;
512exit_free:
513 return err;
514}
515
516static struct i2c_driver fm3130_driver = {
517 .driver = {
518 .name = "rtc-fm3130",
519 },
520 .probe = fm3130_probe,
521 .id_table = fm3130_id,
522};
523
524module_i2c_driver(fm3130_driver);
525
526MODULE_DESCRIPTION("RTC driver for FM3130");
527MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
528MODULE_LICENSE("GPL");
529
1/*
2 * rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
3 *
4 * Copyright (C) 2008 Sergey Lapin
5 * Based on ds1307 driver by James Chapman and David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/i2c.h>
14#include <linux/rtc.h>
15#include <linux/bcd.h>
16#include <linux/slab.h>
17
18#define FM3130_RTC_CONTROL (0x0)
19#define FM3130_CAL_CONTROL (0x1)
20#define FM3130_RTC_SECONDS (0x2)
21#define FM3130_RTC_MINUTES (0x3)
22#define FM3130_RTC_HOURS (0x4)
23#define FM3130_RTC_DAY (0x5)
24#define FM3130_RTC_DATE (0x6)
25#define FM3130_RTC_MONTHS (0x7)
26#define FM3130_RTC_YEARS (0x8)
27
28#define FM3130_ALARM_SECONDS (0x9)
29#define FM3130_ALARM_MINUTES (0xa)
30#define FM3130_ALARM_HOURS (0xb)
31#define FM3130_ALARM_DATE (0xc)
32#define FM3130_ALARM_MONTHS (0xd)
33#define FM3130_ALARM_WP_CONTROL (0xe)
34
35#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
36#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
37#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
38#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
39#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
40#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
41#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
42#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
43#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
44
45#define FM3130_CLOCK_REGS 7
46#define FM3130_ALARM_REGS 5
47
48struct fm3130 {
49 u8 reg_addr_time;
50 u8 reg_addr_alarm;
51 u8 regs[15];
52 struct i2c_msg msg[4];
53 struct i2c_client *client;
54 struct rtc_device *rtc;
55 int alarm_valid;
56 int data_valid;
57};
58static const struct i2c_device_id fm3130_id[] = {
59 { "fm3130", 0 },
60 { }
61};
62MODULE_DEVICE_TABLE(i2c, fm3130_id);
63
64#define FM3130_MODE_NORMAL 0
65#define FM3130_MODE_WRITE 1
66#define FM3130_MODE_READ 2
67
68static void fm3130_rtc_mode(struct device *dev, int mode)
69{
70 struct fm3130 *fm3130 = dev_get_drvdata(dev);
71
72 fm3130->regs[FM3130_RTC_CONTROL] =
73 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
74 switch (mode) {
75 case FM3130_MODE_NORMAL:
76 fm3130->regs[FM3130_RTC_CONTROL] &=
77 ~(FM3130_RTC_CONTROL_BIT_WRITE |
78 FM3130_RTC_CONTROL_BIT_READ);
79 break;
80 case FM3130_MODE_WRITE:
81 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
82 break;
83 case FM3130_MODE_READ:
84 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
85 break;
86 default:
87 dev_dbg(dev, "invalid mode %d\n", mode);
88 break;
89 }
90
91 i2c_smbus_write_byte_data(fm3130->client,
92 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
93}
94
95static int fm3130_get_time(struct device *dev, struct rtc_time *t)
96{
97 struct fm3130 *fm3130 = dev_get_drvdata(dev);
98 int tmp;
99
100 if (!fm3130->data_valid) {
101 /* We have invalid data in RTC, probably due
102 to battery faults or other problems. Return EIO
103 for now, it will allow us to set data later instead
104 of error during probing which disables device */
105 return -EIO;
106 }
107 fm3130_rtc_mode(dev, FM3130_MODE_READ);
108
109 /* read the RTC date and time registers all at once */
110 tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
111 fm3130->msg, 2);
112 if (tmp != 2) {
113 dev_err(dev, "%s error %d\n", "read", tmp);
114 return -EIO;
115 }
116
117 fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
118
119 dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
120
121 t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
122 t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
123 tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
124 t->tm_hour = bcd2bin(tmp);
125 t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
126 t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
127 tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
128 t->tm_mon = bcd2bin(tmp) - 1;
129
130 /* assume 20YY not 19YY, and ignore CF bit */
131 t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
132
133 dev_dbg(dev, "%s secs=%d, mins=%d, "
134 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
135 "read", t->tm_sec, t->tm_min,
136 t->tm_hour, t->tm_mday,
137 t->tm_mon, t->tm_year, t->tm_wday);
138
139 return 0;
140}
141
142
143static int fm3130_set_time(struct device *dev, struct rtc_time *t)
144{
145 struct fm3130 *fm3130 = dev_get_drvdata(dev);
146 int tmp, i;
147 u8 *buf = fm3130->regs;
148
149 dev_dbg(dev, "%s secs=%d, mins=%d, "
150 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
151 "write", t->tm_sec, t->tm_min,
152 t->tm_hour, t->tm_mday,
153 t->tm_mon, t->tm_year, t->tm_wday);
154
155 /* first register addr */
156 buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
157 buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
158 buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
159 buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
160 buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
161 buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
162
163 /* assume 20YY not 19YY */
164 tmp = t->tm_year - 100;
165 buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
166
167 dev_dbg(dev, "%s: %15ph\n", "write", buf);
168
169 fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
170
171 /* Writing time registers, we don't support multibyte transfers */
172 for (i = 0; i < FM3130_CLOCK_REGS; i++) {
173 i2c_smbus_write_byte_data(fm3130->client,
174 FM3130_RTC_SECONDS + i,
175 fm3130->regs[FM3130_RTC_SECONDS + i]);
176 }
177
178 fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
179
180 /* We assume here that data are valid once written */
181 if (!fm3130->data_valid)
182 fm3130->data_valid = 1;
183 return 0;
184}
185
186static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
187{
188 struct fm3130 *fm3130 = dev_get_drvdata(dev);
189 int tmp;
190 struct rtc_time *tm = &alrm->time;
191
192 if (!fm3130->alarm_valid) {
193 /*
194 * We have invalid alarm in RTC, probably due to battery faults
195 * or other problems. Return EIO for now, it will allow us to
196 * set alarm value later instead of error during probing which
197 * disables device
198 */
199 return -EIO;
200 }
201
202 /* read the RTC alarm registers all at once */
203 tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
204 &fm3130->msg[2], 2);
205 if (tmp != 2) {
206 dev_err(dev, "%s error %d\n", "read", tmp);
207 return -EIO;
208 }
209 dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
210 fm3130->regs[FM3130_ALARM_SECONDS],
211 fm3130->regs[FM3130_ALARM_MINUTES],
212 fm3130->regs[FM3130_ALARM_HOURS],
213 fm3130->regs[FM3130_ALARM_DATE],
214 fm3130->regs[FM3130_ALARM_MONTHS]);
215
216 tm->tm_sec = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
217 tm->tm_min = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
218 tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
219 tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
220 tm->tm_mon = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
221
222 if (tm->tm_mon > 0)
223 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
224
225 dev_dbg(dev, "%s secs=%d, mins=%d, "
226 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
227 "read alarm", tm->tm_sec, tm->tm_min,
228 tm->tm_hour, tm->tm_mday,
229 tm->tm_mon, tm->tm_year, tm->tm_wday);
230
231 /* check if alarm enabled */
232 fm3130->regs[FM3130_RTC_CONTROL] =
233 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
234
235 if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
236 (~fm3130->regs[FM3130_RTC_CONTROL] &
237 FM3130_RTC_CONTROL_BIT_CAL)) {
238 alrm->enabled = 1;
239 }
240
241 return 0;
242}
243
244static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
245{
246 struct fm3130 *fm3130 = dev_get_drvdata(dev);
247 struct rtc_time *tm = &alrm->time;
248 int i;
249
250 dev_dbg(dev, "%s secs=%d, mins=%d, "
251 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
252 "write alarm", tm->tm_sec, tm->tm_min,
253 tm->tm_hour, tm->tm_mday,
254 tm->tm_mon, tm->tm_year, tm->tm_wday);
255
256 fm3130->regs[FM3130_ALARM_SECONDS] =
257 (tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
258
259 fm3130->regs[FM3130_ALARM_MINUTES] =
260 (tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
261
262 fm3130->regs[FM3130_ALARM_HOURS] =
263 (tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
264
265 fm3130->regs[FM3130_ALARM_DATE] =
266 (tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
267
268 fm3130->regs[FM3130_ALARM_MONTHS] =
269 (tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
270
271 dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
272 fm3130->regs[FM3130_ALARM_SECONDS],
273 fm3130->regs[FM3130_ALARM_MINUTES],
274 fm3130->regs[FM3130_ALARM_HOURS],
275 fm3130->regs[FM3130_ALARM_DATE],
276 fm3130->regs[FM3130_ALARM_MONTHS]);
277 /* Writing time registers, we don't support multibyte transfers */
278 for (i = 0; i < FM3130_ALARM_REGS; i++) {
279 i2c_smbus_write_byte_data(fm3130->client,
280 FM3130_ALARM_SECONDS + i,
281 fm3130->regs[FM3130_ALARM_SECONDS + i]);
282 }
283 fm3130->regs[FM3130_RTC_CONTROL] =
284 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
285
286 /* enable or disable alarm */
287 if (alrm->enabled) {
288 i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
289 (fm3130->regs[FM3130_RTC_CONTROL] &
290 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
291 FM3130_RTC_CONTROL_BIT_AEN);
292 } else {
293 i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
294 fm3130->regs[FM3130_RTC_CONTROL] &
295 ~(FM3130_RTC_CONTROL_BIT_CAL) &
296 ~(FM3130_RTC_CONTROL_BIT_AEN));
297 }
298
299 /* We assume here that data is valid once written */
300 if (!fm3130->alarm_valid)
301 fm3130->alarm_valid = 1;
302
303 return 0;
304}
305
306static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
307{
308 struct fm3130 *fm3130 = dev_get_drvdata(dev);
309 int ret = 0;
310
311 fm3130->regs[FM3130_RTC_CONTROL] =
312 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
313
314 dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
315 enabled, fm3130->regs[FM3130_RTC_CONTROL]);
316
317 switch (enabled) {
318 case 0: /* alarm off */
319 ret = i2c_smbus_write_byte_data(fm3130->client,
320 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
321 ~(FM3130_RTC_CONTROL_BIT_CAL) &
322 ~(FM3130_RTC_CONTROL_BIT_AEN));
323 break;
324 case 1: /* alarm on */
325 ret = i2c_smbus_write_byte_data(fm3130->client,
326 FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
327 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
328 FM3130_RTC_CONTROL_BIT_AEN);
329 break;
330 default:
331 ret = -EINVAL;
332 break;
333 }
334
335 return ret;
336}
337
338static const struct rtc_class_ops fm3130_rtc_ops = {
339 .read_time = fm3130_get_time,
340 .set_time = fm3130_set_time,
341 .read_alarm = fm3130_read_alarm,
342 .set_alarm = fm3130_set_alarm,
343 .alarm_irq_enable = fm3130_alarm_irq_enable,
344};
345
346static struct i2c_driver fm3130_driver;
347
348static int fm3130_probe(struct i2c_client *client,
349 const struct i2c_device_id *id)
350{
351 struct fm3130 *fm3130;
352 int err = -ENODEV;
353 int tmp;
354 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
355
356 if (!i2c_check_functionality(adapter,
357 I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
358 return -EIO;
359
360 fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
361
362 if (!fm3130)
363 return -ENOMEM;
364
365 fm3130->client = client;
366 i2c_set_clientdata(client, fm3130);
367 fm3130->reg_addr_time = FM3130_RTC_SECONDS;
368 fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
369
370 /* Messages to read time */
371 fm3130->msg[0].addr = client->addr;
372 fm3130->msg[0].flags = 0;
373 fm3130->msg[0].len = 1;
374 fm3130->msg[0].buf = &fm3130->reg_addr_time;
375
376 fm3130->msg[1].addr = client->addr;
377 fm3130->msg[1].flags = I2C_M_RD;
378 fm3130->msg[1].len = FM3130_CLOCK_REGS;
379 fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
380
381 /* Messages to read alarm */
382 fm3130->msg[2].addr = client->addr;
383 fm3130->msg[2].flags = 0;
384 fm3130->msg[2].len = 1;
385 fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
386
387 fm3130->msg[3].addr = client->addr;
388 fm3130->msg[3].flags = I2C_M_RD;
389 fm3130->msg[3].len = FM3130_ALARM_REGS;
390 fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
391
392 fm3130->alarm_valid = 0;
393 fm3130->data_valid = 0;
394
395 tmp = i2c_transfer(adapter, fm3130->msg, 4);
396 if (tmp != 4) {
397 dev_dbg(&client->dev, "read error %d\n", tmp);
398 err = -EIO;
399 goto exit_free;
400 }
401
402 fm3130->regs[FM3130_RTC_CONTROL] =
403 i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
404 fm3130->regs[FM3130_CAL_CONTROL] =
405 i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
406
407 /* Disabling calibration mode */
408 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
409 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
410 fm3130->regs[FM3130_RTC_CONTROL] &
411 ~(FM3130_RTC_CONTROL_BIT_CAL));
412 dev_warn(&client->dev, "Disabling calibration mode!\n");
413 }
414
415 /* Disabling read and write modes */
416 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
417 fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
418 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
419 fm3130->regs[FM3130_RTC_CONTROL] &
420 ~(FM3130_RTC_CONTROL_BIT_READ |
421 FM3130_RTC_CONTROL_BIT_WRITE));
422 dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
423 }
424
425 /* oscillator off? turn it on, so clock can tick. */
426 if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
427 i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
428 fm3130->regs[FM3130_CAL_CONTROL] &
429 ~(FM3130_CAL_CONTROL_BIT_nOSCEN));
430
431 /* low battery? clear flag, and warn */
432 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
433 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
434 fm3130->regs[FM3130_RTC_CONTROL] &
435 ~(FM3130_RTC_CONTROL_BIT_LB));
436 dev_warn(&client->dev, "Low battery!\n");
437 }
438
439 /* check if Power On Reset bit is set */
440 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
441 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
442 fm3130->regs[FM3130_RTC_CONTROL] &
443 ~FM3130_RTC_CONTROL_BIT_POR);
444 dev_dbg(&client->dev, "POR bit is set\n");
445 }
446 /* ACS is controlled by alarm */
447 i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
448
449 /* alarm registers sanity check */
450 tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
451 if (tmp > 59)
452 goto bad_alarm;
453
454 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
455 if (tmp > 59)
456 goto bad_alarm;
457
458 tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
459 if (tmp > 23)
460 goto bad_alarm;
461
462 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
463 if (tmp == 0 || tmp > 31)
464 goto bad_alarm;
465
466 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
467 if (tmp == 0 || tmp > 12)
468 goto bad_alarm;
469
470 fm3130->alarm_valid = 1;
471
472bad_alarm:
473
474 /* clock registers sanity chek */
475 tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
476 if (tmp > 59)
477 goto bad_clock;
478
479 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
480 if (tmp > 59)
481 goto bad_clock;
482
483 tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
484 if (tmp > 23)
485 goto bad_clock;
486
487 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
488 if (tmp == 0 || tmp > 7)
489 goto bad_clock;
490
491 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
492 if (tmp == 0 || tmp > 31)
493 goto bad_clock;
494
495 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
496 if (tmp == 0 || tmp > 12)
497 goto bad_clock;
498
499 fm3130->data_valid = 1;
500
501bad_clock:
502
503 if (!fm3130->data_valid || !fm3130->alarm_valid)
504 dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
505 fm3130->regs);
506
507 /* We won't bail out here because we just got invalid data.
508 Time setting from u-boot doesn't work anyway */
509 fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
510 &fm3130_rtc_ops, THIS_MODULE);
511 if (IS_ERR(fm3130->rtc)) {
512 err = PTR_ERR(fm3130->rtc);
513 dev_err(&client->dev,
514 "unable to register the class device\n");
515 goto exit_free;
516 }
517 return 0;
518exit_free:
519 return err;
520}
521
522static struct i2c_driver fm3130_driver = {
523 .driver = {
524 .name = "rtc-fm3130",
525 },
526 .probe = fm3130_probe,
527 .id_table = fm3130_id,
528};
529
530module_i2c_driver(fm3130_driver);
531
532MODULE_DESCRIPTION("RTC driver for FM3130");
533MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
534MODULE_LICENSE("GPL");
535