1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Purpose:	PCI Express Port Bus Driver
  4 * Author:	Tom Nguyen <tom.l.nguyen@intel.com>
  5 *
  6 * Copyright (C) 2004 Intel
  7 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  8 */
  9
 10#include <linux/pci.h>
 11#include <linux/kernel.h>
 12#include <linux/errno.h>
 13#include <linux/pm.h>
 14#include <linux/pm_runtime.h>
 15#include <linux/init.h>
 16#include <linux/aer.h>
 17#include <linux/dmi.h>
 18
 19#include "../pci.h"
 20#include "portdrv.h"
 21
 22/* If this switch is set, PCIe port native services should not be enabled. */
 23bool pcie_ports_disabled;
 24
 25/*
 26 * If the user specified "pcie_ports=native", use the PCIe services regardless
 27 * of whether the platform has given us permission.  On ACPI systems, this
 28 * means we ignore _OSC.
 29 */
 30bool pcie_ports_native;
 31
 32static int __init pcie_port_setup(char *str)
 33{
 34	if (!strncmp(str, "compat", 6))
 35		pcie_ports_disabled = true;
 36	else if (!strncmp(str, "native", 6))
 37		pcie_ports_native = true;
 38
 39	return 1;
 40}
 41__setup("pcie_ports=", pcie_port_setup);
 42
 43/* global data */
 44
 45static int pcie_portdrv_restore_config(struct pci_dev *dev)
 46{
 47	int retval;
 48
 49	retval = pci_enable_device(dev);
 50	if (retval)
 51		return retval;
 52	pci_set_master(dev);
 53	return 0;
 54}
 55
 56#ifdef CONFIG_PM
 57static int pcie_port_runtime_suspend(struct device *dev)
 58{
 59	return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
 60}
 61
 62static int pcie_port_runtime_resume(struct device *dev)
 63{
 64	return 0;
 65}
 66
 67static int pcie_port_runtime_idle(struct device *dev)
 68{
 69	/*
 70	 * Assume the PCI core has set bridge_d3 whenever it thinks the port
 71	 * should be good to go to D3.  Everything else, including moving
 72	 * the port to D3, is handled by the PCI core.
 73	 */
 74	return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
 75}
 76
 77static const struct dev_pm_ops pcie_portdrv_pm_ops = {
 78	.suspend	= pcie_port_device_suspend,
 79	.resume		= pcie_port_device_resume,
 80	.freeze		= pcie_port_device_suspend,
 81	.thaw		= pcie_port_device_resume,
 82	.poweroff	= pcie_port_device_suspend,
 83	.restore	= pcie_port_device_resume,
 84	.runtime_suspend = pcie_port_runtime_suspend,
 85	.runtime_resume	= pcie_port_runtime_resume,
 86	.runtime_idle	= pcie_port_runtime_idle,
 87};
 88
 89#define PCIE_PORTDRV_PM_OPS	(&pcie_portdrv_pm_ops)
 90
 91#else /* !PM */
 92
 93#define PCIE_PORTDRV_PM_OPS	NULL
 94#endif /* !PM */
 95
 96/*
 97 * pcie_portdrv_probe - Probe PCI-Express port devices
 98 * @dev: PCI-Express port device being probed
 99 *
100 * If detected invokes the pcie_port_device_register() method for
101 * this port device.
102 *
103 */
104static int pcie_portdrv_probe(struct pci_dev *dev,
105					const struct pci_device_id *id)
106{
107	int status;
108
109	if (!pci_is_pcie(dev) ||
110	    ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
111	     (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
112	     (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
113		return -ENODEV;
114
115	status = pcie_port_device_register(dev);
116	if (status)
117		return status;
118
119	pci_save_state(dev);
120
121	dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_SMART_SUSPEND |
122					   DPM_FLAG_LEAVE_SUSPENDED);
123
124	if (pci_bridge_d3_possible(dev)) {
125		/*
126		 * Keep the port resumed 100ms to make sure things like
127		 * config space accesses from userspace (lspci) will not
128		 * cause the port to repeatedly suspend and resume.
129		 */
130		pm_runtime_set_autosuspend_delay(&dev->dev, 100);
131		pm_runtime_use_autosuspend(&dev->dev);
132		pm_runtime_mark_last_busy(&dev->dev);
133		pm_runtime_put_autosuspend(&dev->dev);
134		pm_runtime_allow(&dev->dev);
135	}
136
137	return 0;
138}
139
140static void pcie_portdrv_remove(struct pci_dev *dev)
141{
142	if (pci_bridge_d3_possible(dev)) {
143		pm_runtime_forbid(&dev->dev);
144		pm_runtime_get_noresume(&dev->dev);
145		pm_runtime_dont_use_autosuspend(&dev->dev);
146	}
147
148	pcie_port_device_remove(dev);
149}
150
151static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
152					enum pci_channel_state error)
153{
154	/* Root Port has no impact. Always recovers. */
155	return PCI_ERS_RESULT_CAN_RECOVER;
156}
157
158static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
159{
160	return PCI_ERS_RESULT_RECOVERED;
161}
162
163static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
164{
165	/* If fatal, restore cfg space for possible link reset at upstream */
166	if (dev->error_state == pci_channel_io_frozen) {
167		dev->state_saved = true;
168		pci_restore_state(dev);
169		pcie_portdrv_restore_config(dev);
170		pci_enable_pcie_error_reporting(dev);
171	}
172
173	return PCI_ERS_RESULT_RECOVERED;
174}
175
176static int resume_iter(struct device *device, void *data)
177{
178	struct pcie_device *pcie_device;
179	struct pcie_port_service_driver *driver;
180
181	if (device->bus == &pcie_port_bus_type && device->driver) {
182		driver = to_service_driver(device->driver);
183		if (driver && driver->error_resume) {
184			pcie_device = to_pcie_device(device);
185
186			/* Forward error message to service drivers */
187			driver->error_resume(pcie_device->port);
188		}
189	}
190
191	return 0;
192}
193
194static void pcie_portdrv_err_resume(struct pci_dev *dev)
195{
196	device_for_each_child(&dev->dev, NULL, resume_iter);
197}
198
199/*
200 * LINUX Device Driver Model
201 */
202static const struct pci_device_id port_pci_ids[] = { {
203	/* handle any PCI-Express port */
204	PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
205	}, { /* end: all zeroes */ }
206};
207
208static const struct pci_error_handlers pcie_portdrv_err_handler = {
209	.error_detected = pcie_portdrv_error_detected,
210	.mmio_enabled = pcie_portdrv_mmio_enabled,
211	.slot_reset = pcie_portdrv_slot_reset,
212	.resume = pcie_portdrv_err_resume,
213};
214
215static struct pci_driver pcie_portdriver = {
216	.name		= "pcieport",
217	.id_table	= &port_pci_ids[0],
218
219	.probe		= pcie_portdrv_probe,
220	.remove		= pcie_portdrv_remove,
221	.shutdown	= pcie_portdrv_remove,
222
223	.err_handler	= &pcie_portdrv_err_handler,
224
225	.driver.pm	= PCIE_PORTDRV_PM_OPS,
226};
227
228static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
229{
230	pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
231		  d->ident);
232	pcie_pme_disable_msi();
233	return 0;
234}
235
236static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
237	/*
238	 * Boxes that should not use MSI for PCIe PME signaling.
239	 */
240	{
241	 .callback = dmi_pcie_pme_disable_msi,
242	 .ident = "MSI Wind U-100",
243	 .matches = {
244		     DMI_MATCH(DMI_SYS_VENDOR,
245				"MICRO-STAR INTERNATIONAL CO., LTD"),
246		     DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
247		     },
248	 },
249	 {}
250};
251
252static int __init pcie_portdrv_init(void)
253{
254	if (pcie_ports_disabled)
255		return -EACCES;
256
257	dmi_check_system(pcie_portdrv_dmi_table);
258
259	return pci_register_driver(&pcie_portdriver);
260}
261device_initcall(pcie_portdrv_init);