1/* SPDX-License-Identifier: GPL-2.0 */
  2/*******************************************************************************
  3
  4  Intel PRO/10GbE Linux driver
  5  Copyright(c) 1999 - 2008 Intel Corporation.
  6
  7  This program is free software; you can redistribute it and/or modify it
  8  under the terms and conditions of the GNU General Public License,
  9  version 2, as published by the Free Software Foundation.
 10
 11  This program is distributed in the hope it will be useful, but WITHOUT
 12  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 14  more details.
 15
 16  You should have received a copy of the GNU General Public License along with
 17  this program; if not, write to the Free Software Foundation, Inc.,
 18  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 19
 20  The full GNU General Public License is included in this distribution in
 21  the file called "COPYING".
 22
 23  Contact Information:
 24  Linux NICS <linux.nics@intel.com>
 25  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 26  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 27
 28*******************************************************************************/
 29
 30#ifndef _IXGB_EE_H_
 31#define _IXGB_EE_H_
 32
 33#define IXGB_EEPROM_SIZE    64	/* Size in words */
 34
 35/* EEPROM Commands */
 36#define EEPROM_READ_OPCODE  0x6	/* EEPROM read opcode */
 37#define EEPROM_WRITE_OPCODE 0x5	/* EEPROM write opcode */
 38#define EEPROM_ERASE_OPCODE 0x7	/* EEPROM erase opcode */
 39#define EEPROM_EWEN_OPCODE  0x13	/* EEPROM erase/write enable */
 40#define EEPROM_EWDS_OPCODE  0x10	/* EEPROM erase/write disable */
 41
 42/* EEPROM MAP (Word Offsets) */
 43#define EEPROM_IA_1_2_REG        0x0000
 44#define EEPROM_IA_3_4_REG        0x0001
 45#define EEPROM_IA_5_6_REG        0x0002
 46#define EEPROM_COMPATIBILITY_REG 0x0003
 47#define EEPROM_PBA_1_2_REG       0x0008
 48#define EEPROM_PBA_3_4_REG       0x0009
 49#define EEPROM_INIT_CONTROL1_REG 0x000A
 50#define EEPROM_SUBSYS_ID_REG     0x000B
 51#define EEPROM_SUBVEND_ID_REG    0x000C
 52#define EEPROM_DEVICE_ID_REG     0x000D
 53#define EEPROM_VENDOR_ID_REG     0x000E
 54#define EEPROM_INIT_CONTROL2_REG 0x000F
 55#define EEPROM_SWDPINS_REG       0x0020
 56#define EEPROM_CIRCUIT_CTRL_REG  0x0021
 57#define EEPROM_D0_D3_POWER_REG   0x0022
 58#define EEPROM_FLASH_VERSION     0x0032
 59#define EEPROM_CHECKSUM_REG      0x003F
 60
 61/* Mask bits for fields in Word 0x0a of the EEPROM */
 62
 63#define EEPROM_ICW1_SIGNATURE_MASK  0xC000
 64#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
 65#define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000
 66
 67/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
 68#define EEPROM_SUM 0xBABA
 69
 70/* EEPROM Map Sizes (Byte Counts) */
 71#define PBA_SIZE 4
 72
 73/* EEPROM Map defines (WORD OFFSETS)*/
 74
 75/* EEPROM structure */
 76struct ixgb_ee_map_type {
 77	u8 mac_addr[ETH_ALEN];
 78	__le16 compatibility;
 79	__le16 reserved1[4];
 80	__le32 pba_number;
 81	__le16 init_ctrl_reg_1;
 82	__le16 subsystem_id;
 83	__le16 subvendor_id;
 84	__le16 device_id;
 85	__le16 vendor_id;
 86	__le16 init_ctrl_reg_2;
 87	__le16 oem_reserved[16];
 88	__le16 swdpins_reg;
 89	__le16 circuit_ctrl_reg;
 90	u8 d3_power;
 91	u8 d0_power;
 92	__le16 reserved2[28];
 93	__le16 checksum;
 94};
 95
 96/* EEPROM Functions */
 97u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
 98
 99bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
100
101void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
102
103void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
104
105#endif				/* IXGB_EE_H */