Loading...
1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2/*
3 * Copyright (c) 2017-2020, Mellanox Technologies inc. All rights reserved.
4 */
5
6#include "cmd.h"
7
8int mlx5r_cmd_query_special_mkeys(struct mlx5_ib_dev *dev)
9{
10 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {};
11 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {};
12 bool is_terminate, is_dump, is_null;
13 int err;
14
15 is_terminate = MLX5_CAP_GEN(dev->mdev, terminate_scatter_list_mkey);
16 is_dump = MLX5_CAP_GEN(dev->mdev, dump_fill_mkey);
17 is_null = MLX5_CAP_GEN(dev->mdev, null_mkey);
18
19 dev->mkeys.terminate_scatter_list_mkey = MLX5_TERMINATE_SCATTER_LIST_LKEY;
20 if (!is_terminate && !is_dump && !is_null)
21 return 0;
22
23 MLX5_SET(query_special_contexts_in, in, opcode,
24 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
25 err = mlx5_cmd_exec_inout(dev->mdev, query_special_contexts, in, out);
26 if (err)
27 return err;
28
29 if (is_dump)
30 dev->mkeys.dump_fill_mkey = MLX5_GET(query_special_contexts_out,
31 out, dump_fill_mkey);
32
33 if (is_null)
34 dev->mkeys.null_mkey = cpu_to_be32(
35 MLX5_GET(query_special_contexts_out, out, null_mkey));
36
37 if (is_terminate)
38 dev->mkeys.terminate_scatter_list_mkey =
39 cpu_to_be32(MLX5_GET(query_special_contexts_out, out,
40 terminate_scatter_list_mkey));
41
42 return 0;
43}
44
45int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
46 void *out)
47{
48 u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = {};
49
50 MLX5_SET(query_cong_params_in, in, opcode,
51 MLX5_CMD_OP_QUERY_CONG_PARAMS);
52 MLX5_SET(query_cong_params_in, in, cong_protocol, cong_point);
53
54 return mlx5_cmd_exec_inout(dev, query_cong_params, in, out);
55}
56
57void mlx5_cmd_destroy_tir(struct mlx5_core_dev *dev, u32 tirn, u16 uid)
58{
59 u32 in[MLX5_ST_SZ_DW(destroy_tir_in)] = {};
60
61 MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR);
62 MLX5_SET(destroy_tir_in, in, tirn, tirn);
63 MLX5_SET(destroy_tir_in, in, uid, uid);
64 mlx5_cmd_exec_in(dev, destroy_tir, in);
65}
66
67void mlx5_cmd_destroy_tis(struct mlx5_core_dev *dev, u32 tisn, u16 uid)
68{
69 u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {};
70
71 MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS);
72 MLX5_SET(destroy_tis_in, in, tisn, tisn);
73 MLX5_SET(destroy_tis_in, in, uid, uid);
74 mlx5_cmd_exec_in(dev, destroy_tis, in);
75}
76
77int mlx5_cmd_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn, u16 uid)
78{
79 u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)] = {};
80
81 MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT);
82 MLX5_SET(destroy_rqt_in, in, rqtn, rqtn);
83 MLX5_SET(destroy_rqt_in, in, uid, uid);
84 return mlx5_cmd_exec_in(dev, destroy_rqt, in);
85}
86
87int mlx5_cmd_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn,
88 u16 uid)
89{
90 u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)] = {};
91 u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)] = {};
92 int err;
93
94 MLX5_SET(alloc_transport_domain_in, in, opcode,
95 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN);
96 MLX5_SET(alloc_transport_domain_in, in, uid, uid);
97
98 err = mlx5_cmd_exec_inout(dev, alloc_transport_domain, in, out);
99 if (!err)
100 *tdn = MLX5_GET(alloc_transport_domain_out, out,
101 transport_domain);
102
103 return err;
104}
105
106void mlx5_cmd_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn,
107 u16 uid)
108{
109 u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)] = {};
110
111 MLX5_SET(dealloc_transport_domain_in, in, opcode,
112 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
113 MLX5_SET(dealloc_transport_domain_in, in, uid, uid);
114 MLX5_SET(dealloc_transport_domain_in, in, transport_domain, tdn);
115 mlx5_cmd_exec_in(dev, dealloc_transport_domain, in);
116}
117
118int mlx5_cmd_dealloc_pd(struct mlx5_core_dev *dev, u32 pdn, u16 uid)
119{
120 u32 in[MLX5_ST_SZ_DW(dealloc_pd_in)] = {};
121
122 MLX5_SET(dealloc_pd_in, in, opcode, MLX5_CMD_OP_DEALLOC_PD);
123 MLX5_SET(dealloc_pd_in, in, pd, pdn);
124 MLX5_SET(dealloc_pd_in, in, uid, uid);
125 return mlx5_cmd_exec_in(dev, dealloc_pd, in);
126}
127
128int mlx5_cmd_attach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid,
129 u32 qpn, u16 uid)
130{
131 u32 in[MLX5_ST_SZ_DW(attach_to_mcg_in)] = {};
132 void *gid;
133
134 MLX5_SET(attach_to_mcg_in, in, opcode, MLX5_CMD_OP_ATTACH_TO_MCG);
135 MLX5_SET(attach_to_mcg_in, in, qpn, qpn);
136 MLX5_SET(attach_to_mcg_in, in, uid, uid);
137 gid = MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid);
138 memcpy(gid, mgid, sizeof(*mgid));
139 return mlx5_cmd_exec_in(dev, attach_to_mcg, in);
140}
141
142int mlx5_cmd_detach_mcg(struct mlx5_core_dev *dev, union ib_gid *mgid,
143 u32 qpn, u16 uid)
144{
145 u32 in[MLX5_ST_SZ_DW(detach_from_mcg_in)] = {};
146 void *gid;
147
148 MLX5_SET(detach_from_mcg_in, in, opcode, MLX5_CMD_OP_DETACH_FROM_MCG);
149 MLX5_SET(detach_from_mcg_in, in, qpn, qpn);
150 MLX5_SET(detach_from_mcg_in, in, uid, uid);
151 gid = MLX5_ADDR_OF(detach_from_mcg_in, in, multicast_gid);
152 memcpy(gid, mgid, sizeof(*mgid));
153 return mlx5_cmd_exec_in(dev, detach_from_mcg, in);
154}
155
156int mlx5_cmd_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn, u16 uid)
157{
158 u32 out[MLX5_ST_SZ_DW(alloc_xrcd_out)] = {};
159 u32 in[MLX5_ST_SZ_DW(alloc_xrcd_in)] = {};
160 int err;
161
162 MLX5_SET(alloc_xrcd_in, in, opcode, MLX5_CMD_OP_ALLOC_XRCD);
163 MLX5_SET(alloc_xrcd_in, in, uid, uid);
164 err = mlx5_cmd_exec_inout(dev, alloc_xrcd, in, out);
165 if (!err)
166 *xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd);
167 return err;
168}
169
170int mlx5_cmd_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn, u16 uid)
171{
172 u32 in[MLX5_ST_SZ_DW(dealloc_xrcd_in)] = {};
173
174 MLX5_SET(dealloc_xrcd_in, in, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
175 MLX5_SET(dealloc_xrcd_in, in, xrcd, xrcdn);
176 MLX5_SET(dealloc_xrcd_in, in, uid, uid);
177 return mlx5_cmd_exec_in(dev, dealloc_xrcd, in);
178}
179
180int mlx5_cmd_mad_ifc(struct mlx5_core_dev *dev, const void *inb, void *outb,
181 u16 opmod, u8 port)
182{
183 int outlen = MLX5_ST_SZ_BYTES(mad_ifc_out);
184 int inlen = MLX5_ST_SZ_BYTES(mad_ifc_in);
185 int err = -ENOMEM;
186 void *data;
187 void *resp;
188 u32 *out;
189 u32 *in;
190
191 in = kzalloc(inlen, GFP_KERNEL);
192 out = kzalloc(outlen, GFP_KERNEL);
193 if (!in || !out)
194 goto out;
195
196 MLX5_SET(mad_ifc_in, in, opcode, MLX5_CMD_OP_MAD_IFC);
197 MLX5_SET(mad_ifc_in, in, op_mod, opmod);
198 MLX5_SET(mad_ifc_in, in, port, port);
199
200 data = MLX5_ADDR_OF(mad_ifc_in, in, mad);
201 memcpy(data, inb, MLX5_FLD_SZ_BYTES(mad_ifc_in, mad));
202
203 err = mlx5_cmd_exec_inout(dev, mad_ifc, in, out);
204 if (err)
205 goto out;
206
207 resp = MLX5_ADDR_OF(mad_ifc_out, out, response_mad_packet);
208 memcpy(outb, resp,
209 MLX5_FLD_SZ_BYTES(mad_ifc_out, response_mad_packet));
210
211out:
212 kfree(out);
213 kfree(in);
214 return err;
215}
216
217int mlx5_cmd_uar_alloc(struct mlx5_core_dev *dev, u32 *uarn, u16 uid)
218{
219 u32 out[MLX5_ST_SZ_DW(alloc_uar_out)] = {};
220 u32 in[MLX5_ST_SZ_DW(alloc_uar_in)] = {};
221 int err;
222
223 MLX5_SET(alloc_uar_in, in, opcode, MLX5_CMD_OP_ALLOC_UAR);
224 MLX5_SET(alloc_uar_in, in, uid, uid);
225 err = mlx5_cmd_exec_inout(dev, alloc_uar, in, out);
226 if (err)
227 return err;
228
229 *uarn = MLX5_GET(alloc_uar_out, out, uar);
230 return 0;
231}
232
233int mlx5_cmd_uar_dealloc(struct mlx5_core_dev *dev, u32 uarn, u16 uid)
234{
235 u32 in[MLX5_ST_SZ_DW(dealloc_uar_in)] = {};
236
237 MLX5_SET(dealloc_uar_in, in, opcode, MLX5_CMD_OP_DEALLOC_UAR);
238 MLX5_SET(dealloc_uar_in, in, uar, uarn);
239 MLX5_SET(dealloc_uar_in, in, uid, uid);
240 return mlx5_cmd_exec_in(dev, dealloc_uar, in);
241}
1/*
2 * Copyright (c) 2017, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include "cmd.h"
34
35int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey)
36{
37 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {};
38 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {};
39 int err;
40
41 MLX5_SET(query_special_contexts_in, in, opcode,
42 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
43 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
44 if (!err)
45 *null_mkey = MLX5_GET(query_special_contexts_out, out,
46 null_mkey);
47 return err;
48}
49
50int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
51 void *out, int out_size)
52{
53 u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = { };
54
55 MLX5_SET(query_cong_params_in, in, opcode,
56 MLX5_CMD_OP_QUERY_CONG_PARAMS);
57 MLX5_SET(query_cong_params_in, in, cong_protocol, cong_point);
58
59 return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
60}
61
62int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *dev,
63 void *in, int in_size)
64{
65 u32 out[MLX5_ST_SZ_DW(modify_cong_params_out)] = { };
66
67 return mlx5_cmd_exec(dev, in, in_size, out, sizeof(out));
68}
69
70int mlx5_cmd_alloc_memic(struct mlx5_memic *memic, phys_addr_t *addr,
71 u64 length, u32 alignment)
72{
73 struct mlx5_core_dev *dev = memic->dev;
74 u64 num_memic_hw_pages = MLX5_CAP_DEV_MEM(dev, memic_bar_size)
75 >> PAGE_SHIFT;
76 u64 hw_start_addr = MLX5_CAP64_DEV_MEM(dev, memic_bar_start_addr);
77 u32 max_alignment = MLX5_CAP_DEV_MEM(dev, log_max_memic_addr_alignment);
78 u32 num_pages = DIV_ROUND_UP(length, PAGE_SIZE);
79 u32 out[MLX5_ST_SZ_DW(alloc_memic_out)] = {};
80 u32 in[MLX5_ST_SZ_DW(alloc_memic_in)] = {};
81 u32 mlx5_alignment;
82 u64 page_idx = 0;
83 int ret = 0;
84
85 if (!length || (length & MLX5_MEMIC_ALLOC_SIZE_MASK))
86 return -EINVAL;
87
88 /* mlx5 device sets alignment as 64*2^driver_value
89 * so normalizing is needed.
90 */
91 mlx5_alignment = (alignment < MLX5_MEMIC_BASE_ALIGN) ? 0 :
92 alignment - MLX5_MEMIC_BASE_ALIGN;
93 if (mlx5_alignment > max_alignment)
94 return -EINVAL;
95
96 MLX5_SET(alloc_memic_in, in, opcode, MLX5_CMD_OP_ALLOC_MEMIC);
97 MLX5_SET(alloc_memic_in, in, range_size, num_pages * PAGE_SIZE);
98 MLX5_SET(alloc_memic_in, in, memic_size, length);
99 MLX5_SET(alloc_memic_in, in, log_memic_addr_alignment,
100 mlx5_alignment);
101
102 while (page_idx < num_memic_hw_pages) {
103 spin_lock(&memic->memic_lock);
104 page_idx = bitmap_find_next_zero_area(memic->memic_alloc_pages,
105 num_memic_hw_pages,
106 page_idx,
107 num_pages, 0);
108
109 if (page_idx < num_memic_hw_pages)
110 bitmap_set(memic->memic_alloc_pages,
111 page_idx, num_pages);
112
113 spin_unlock(&memic->memic_lock);
114
115 if (page_idx >= num_memic_hw_pages)
116 break;
117
118 MLX5_SET64(alloc_memic_in, in, range_start_addr,
119 hw_start_addr + (page_idx * PAGE_SIZE));
120
121 ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
122 if (ret) {
123 spin_lock(&memic->memic_lock);
124 bitmap_clear(memic->memic_alloc_pages,
125 page_idx, num_pages);
126 spin_unlock(&memic->memic_lock);
127
128 if (ret == -EAGAIN) {
129 page_idx++;
130 continue;
131 }
132
133 return ret;
134 }
135
136 *addr = pci_resource_start(dev->pdev, 0) +
137 MLX5_GET64(alloc_memic_out, out, memic_start_addr);
138
139 return 0;
140 }
141
142 return -ENOMEM;
143}
144
145int mlx5_cmd_dealloc_memic(struct mlx5_memic *memic, u64 addr, u64 length)
146{
147 struct mlx5_core_dev *dev = memic->dev;
148 u64 hw_start_addr = MLX5_CAP64_DEV_MEM(dev, memic_bar_start_addr);
149 u32 num_pages = DIV_ROUND_UP(length, PAGE_SIZE);
150 u32 out[MLX5_ST_SZ_DW(dealloc_memic_out)] = {0};
151 u32 in[MLX5_ST_SZ_DW(dealloc_memic_in)] = {0};
152 u64 start_page_idx;
153 int err;
154
155 addr -= pci_resource_start(dev->pdev, 0);
156 start_page_idx = (addr - hw_start_addr) >> PAGE_SHIFT;
157
158 MLX5_SET(dealloc_memic_in, in, opcode, MLX5_CMD_OP_DEALLOC_MEMIC);
159 MLX5_SET64(dealloc_memic_in, in, memic_start_addr, addr);
160 MLX5_SET(dealloc_memic_in, in, memic_size, length);
161
162 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
163
164 if (!err) {
165 spin_lock(&memic->memic_lock);
166 bitmap_clear(memic->memic_alloc_pages,
167 start_page_idx, num_pages);
168 spin_unlock(&memic->memic_lock);
169 }
170
171 return err;
172}