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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Platform driver for the Synopsys DesignWare DMA Controller
4 *
5 * Copyright (C) 2007-2008 Atmel Corporation
6 * Copyright (C) 2010-2011 ST Microelectronics
7 * Copyright (C) 2013 Intel Corporation
8 *
9 * Some parts of this driver are derived from the original dw_dmac.
10 */
11
12#include <linux/module.h>
13#include <linux/device.h>
14#include <linux/clk.h>
15#include <linux/pm_runtime.h>
16#include <linux/platform_device.h>
17#include <linux/dmaengine.h>
18#include <linux/dma-mapping.h>
19#include <linux/of.h>
20#include <linux/acpi.h>
21
22#include "internal.h"
23
24#define DRV_NAME "dw_dmac"
25
26static int dw_probe(struct platform_device *pdev)
27{
28 const struct dw_dma_chip_pdata *match;
29 struct dw_dma_chip_pdata *data;
30 struct dw_dma_chip *chip;
31 struct device *dev = &pdev->dev;
32 int err;
33
34 match = device_get_match_data(dev);
35 if (!match)
36 return -ENODEV;
37
38 data = devm_kmemdup(&pdev->dev, match, sizeof(*match), GFP_KERNEL);
39 if (!data)
40 return -ENOMEM;
41
42 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
43 if (!chip)
44 return -ENOMEM;
45
46 chip->irq = platform_get_irq(pdev, 0);
47 if (chip->irq < 0)
48 return chip->irq;
49
50 chip->regs = devm_platform_ioremap_resource(pdev, 0);
51 if (IS_ERR(chip->regs))
52 return PTR_ERR(chip->regs);
53
54 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
55 if (err)
56 return err;
57
58 if (!data->pdata)
59 data->pdata = dev_get_platdata(dev);
60 if (!data->pdata)
61 data->pdata = dw_dma_parse_dt(pdev);
62
63 chip->dev = dev;
64 chip->id = pdev->id;
65 chip->pdata = data->pdata;
66
67 data->chip = chip;
68
69 chip->clk = devm_clk_get_optional(chip->dev, "hclk");
70 if (IS_ERR(chip->clk))
71 return PTR_ERR(chip->clk);
72 err = clk_prepare_enable(chip->clk);
73 if (err)
74 return err;
75
76 pm_runtime_enable(&pdev->dev);
77
78 err = data->probe(chip);
79 if (err)
80 goto err_dw_dma_probe;
81
82 platform_set_drvdata(pdev, data);
83
84 dw_dma_of_controller_register(chip->dw);
85
86 dw_dma_acpi_controller_register(chip->dw);
87
88 return 0;
89
90err_dw_dma_probe:
91 pm_runtime_disable(&pdev->dev);
92 clk_disable_unprepare(chip->clk);
93 return err;
94}
95
96static void dw_remove(struct platform_device *pdev)
97{
98 struct dw_dma_chip_pdata *data = platform_get_drvdata(pdev);
99 struct dw_dma_chip *chip = data->chip;
100 int ret;
101
102 dw_dma_acpi_controller_free(chip->dw);
103
104 dw_dma_of_controller_free(chip->dw);
105
106 ret = data->remove(chip);
107 if (ret)
108 dev_warn(chip->dev, "can't remove device properly: %d\n", ret);
109
110 pm_runtime_disable(&pdev->dev);
111 clk_disable_unprepare(chip->clk);
112}
113
114static void dw_shutdown(struct platform_device *pdev)
115{
116 struct dw_dma_chip_pdata *data = platform_get_drvdata(pdev);
117 struct dw_dma_chip *chip = data->chip;
118
119 /*
120 * We have to call do_dw_dma_disable() to stop any ongoing transfer. On
121 * some platforms we can't do that since DMA device is powered off.
122 * Moreover we have no possibility to check if the platform is affected
123 * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
124 * unconditionally. On the other hand we can't use
125 * pm_runtime_suspended() because runtime PM framework is not fully
126 * used by the driver.
127 */
128 pm_runtime_get_sync(chip->dev);
129 do_dw_dma_disable(chip);
130 pm_runtime_put_sync_suspend(chip->dev);
131
132 clk_disable_unprepare(chip->clk);
133}
134
135#ifdef CONFIG_OF
136static const struct of_device_id dw_dma_of_id_table[] = {
137 { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata },
138 { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata },
139 {}
140};
141MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
142#endif
143
144#ifdef CONFIG_ACPI
145static const struct acpi_device_id dw_dma_acpi_id_table[] = {
146 { "INTL9C60", (kernel_ulong_t)&dw_dma_chip_pdata },
147 { "80862286", (kernel_ulong_t)&dw_dma_chip_pdata },
148 { "808622C0", (kernel_ulong_t)&dw_dma_chip_pdata },
149
150 /* Elkhart Lake iDMA 32-bit (PSE DMA) */
151 { "80864BB4", (kernel_ulong_t)&xbar_chip_pdata },
152 { "80864BB5", (kernel_ulong_t)&xbar_chip_pdata },
153 { "80864BB6", (kernel_ulong_t)&xbar_chip_pdata },
154
155 { }
156};
157MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
158#endif
159
160#ifdef CONFIG_PM_SLEEP
161
162static int dw_suspend_late(struct device *dev)
163{
164 struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
165 struct dw_dma_chip *chip = data->chip;
166
167 do_dw_dma_disable(chip);
168 clk_disable_unprepare(chip->clk);
169
170 return 0;
171}
172
173static int dw_resume_early(struct device *dev)
174{
175 struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
176 struct dw_dma_chip *chip = data->chip;
177 int ret;
178
179 ret = clk_prepare_enable(chip->clk);
180 if (ret)
181 return ret;
182
183 return do_dw_dma_enable(chip);
184}
185
186#endif /* CONFIG_PM_SLEEP */
187
188static const struct dev_pm_ops dw_dev_pm_ops = {
189 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
190};
191
192static struct platform_driver dw_driver = {
193 .probe = dw_probe,
194 .remove_new = dw_remove,
195 .shutdown = dw_shutdown,
196 .driver = {
197 .name = DRV_NAME,
198 .pm = &dw_dev_pm_ops,
199 .of_match_table = of_match_ptr(dw_dma_of_id_table),
200 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
201 },
202};
203
204static int __init dw_init(void)
205{
206 return platform_driver_register(&dw_driver);
207}
208subsys_initcall(dw_init);
209
210static void __exit dw_exit(void)
211{
212 platform_driver_unregister(&dw_driver);
213}
214module_exit(dw_exit);
215
216MODULE_LICENSE("GPL v2");
217MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
218MODULE_ALIAS("platform:" DRV_NAME);
1/*
2 * Platform driver for the Synopsys DesignWare DMA Controller
3 *
4 * Copyright (C) 2007-2008 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics
6 * Copyright (C) 2013 Intel Corporation
7 *
8 * Some parts of this driver are derived from the original dw_dmac.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/clk.h>
18#include <linux/pm_runtime.h>
19#include <linux/platform_device.h>
20#include <linux/dmaengine.h>
21#include <linux/dma-mapping.h>
22#include <linux/of.h>
23#include <linux/of_dma.h>
24#include <linux/acpi.h>
25#include <linux/acpi_dma.h>
26
27#include "internal.h"
28
29#define DRV_NAME "dw_dmac"
30
31static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
32 struct of_dma *ofdma)
33{
34 struct dw_dma *dw = ofdma->of_dma_data;
35 struct dw_dma_slave slave = {
36 .dma_dev = dw->dma.dev,
37 };
38 dma_cap_mask_t cap;
39
40 if (dma_spec->args_count != 3)
41 return NULL;
42
43 slave.src_id = dma_spec->args[0];
44 slave.dst_id = dma_spec->args[0];
45 slave.m_master = dma_spec->args[1];
46 slave.p_master = dma_spec->args[2];
47
48 if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
49 slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
50 slave.m_master >= dw->pdata->nr_masters ||
51 slave.p_master >= dw->pdata->nr_masters))
52 return NULL;
53
54 dma_cap_zero(cap);
55 dma_cap_set(DMA_SLAVE, cap);
56
57 /* TODO: there should be a simpler way to do this */
58 return dma_request_channel(cap, dw_dma_filter, &slave);
59}
60
61#ifdef CONFIG_ACPI
62static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
63{
64 struct acpi_dma_spec *dma_spec = param;
65 struct dw_dma_slave slave = {
66 .dma_dev = dma_spec->dev,
67 .src_id = dma_spec->slave_id,
68 .dst_id = dma_spec->slave_id,
69 .m_master = 0,
70 .p_master = 1,
71 };
72
73 return dw_dma_filter(chan, &slave);
74}
75
76static void dw_dma_acpi_controller_register(struct dw_dma *dw)
77{
78 struct device *dev = dw->dma.dev;
79 struct acpi_dma_filter_info *info;
80 int ret;
81
82 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
83 if (!info)
84 return;
85
86 dma_cap_zero(info->dma_cap);
87 dma_cap_set(DMA_SLAVE, info->dma_cap);
88 info->filter_fn = dw_dma_acpi_filter;
89
90 ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
91 info);
92 if (ret)
93 dev_err(dev, "could not register acpi_dma_controller\n");
94}
95#else /* !CONFIG_ACPI */
96static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
97#endif /* !CONFIG_ACPI */
98
99#ifdef CONFIG_OF
100static struct dw_dma_platform_data *
101dw_dma_parse_dt(struct platform_device *pdev)
102{
103 struct device_node *np = pdev->dev.of_node;
104 struct dw_dma_platform_data *pdata;
105 u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS];
106 u32 nr_masters;
107 u32 nr_channels;
108
109 if (!np) {
110 dev_err(&pdev->dev, "Missing DT data\n");
111 return NULL;
112 }
113
114 if (of_property_read_u32(np, "dma-masters", &nr_masters))
115 return NULL;
116 if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
117 return NULL;
118
119 if (of_property_read_u32(np, "dma-channels", &nr_channels))
120 return NULL;
121 if (nr_channels > DW_DMA_MAX_NR_CHANNELS)
122 return NULL;
123
124 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
125 if (!pdata)
126 return NULL;
127
128 pdata->nr_masters = nr_masters;
129 pdata->nr_channels = nr_channels;
130
131 if (of_property_read_bool(np, "is_private"))
132 pdata->is_private = true;
133
134 /*
135 * All known devices, which use DT for configuration, support
136 * memory-to-memory transfers. So enable it by default.
137 */
138 pdata->is_memcpy = true;
139
140 if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
141 pdata->chan_allocation_order = (unsigned char)tmp;
142
143 if (!of_property_read_u32(np, "chan_priority", &tmp))
144 pdata->chan_priority = tmp;
145
146 if (!of_property_read_u32(np, "block_size", &tmp))
147 pdata->block_size = tmp;
148
149 if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
150 for (tmp = 0; tmp < nr_masters; tmp++)
151 pdata->data_width[tmp] = arr[tmp];
152 } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
153 for (tmp = 0; tmp < nr_masters; tmp++)
154 pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
155 }
156
157 if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) {
158 for (tmp = 0; tmp < nr_channels; tmp++)
159 pdata->multi_block[tmp] = mb[tmp];
160 } else {
161 for (tmp = 0; tmp < nr_channels; tmp++)
162 pdata->multi_block[tmp] = 1;
163 }
164
165 return pdata;
166}
167#else
168static inline struct dw_dma_platform_data *
169dw_dma_parse_dt(struct platform_device *pdev)
170{
171 return NULL;
172}
173#endif
174
175static int dw_probe(struct platform_device *pdev)
176{
177 struct dw_dma_chip *chip;
178 struct device *dev = &pdev->dev;
179 struct resource *mem;
180 const struct dw_dma_platform_data *pdata;
181 int err;
182
183 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
184 if (!chip)
185 return -ENOMEM;
186
187 chip->irq = platform_get_irq(pdev, 0);
188 if (chip->irq < 0)
189 return chip->irq;
190
191 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
192 chip->regs = devm_ioremap_resource(dev, mem);
193 if (IS_ERR(chip->regs))
194 return PTR_ERR(chip->regs);
195
196 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
197 if (err)
198 return err;
199
200 pdata = dev_get_platdata(dev);
201 if (!pdata)
202 pdata = dw_dma_parse_dt(pdev);
203
204 chip->dev = dev;
205 chip->id = pdev->id;
206 chip->pdata = pdata;
207
208 chip->clk = devm_clk_get(chip->dev, "hclk");
209 if (IS_ERR(chip->clk))
210 return PTR_ERR(chip->clk);
211 err = clk_prepare_enable(chip->clk);
212 if (err)
213 return err;
214
215 pm_runtime_enable(&pdev->dev);
216
217 err = dw_dma_probe(chip);
218 if (err)
219 goto err_dw_dma_probe;
220
221 platform_set_drvdata(pdev, chip);
222
223 if (pdev->dev.of_node) {
224 err = of_dma_controller_register(pdev->dev.of_node,
225 dw_dma_of_xlate, chip->dw);
226 if (err)
227 dev_err(&pdev->dev,
228 "could not register of_dma_controller\n");
229 }
230
231 if (ACPI_HANDLE(&pdev->dev))
232 dw_dma_acpi_controller_register(chip->dw);
233
234 return 0;
235
236err_dw_dma_probe:
237 pm_runtime_disable(&pdev->dev);
238 clk_disable_unprepare(chip->clk);
239 return err;
240}
241
242static int dw_remove(struct platform_device *pdev)
243{
244 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
245
246 if (pdev->dev.of_node)
247 of_dma_controller_free(pdev->dev.of_node);
248
249 dw_dma_remove(chip);
250 pm_runtime_disable(&pdev->dev);
251 clk_disable_unprepare(chip->clk);
252
253 return 0;
254}
255
256static void dw_shutdown(struct platform_device *pdev)
257{
258 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
259
260 /*
261 * We have to call dw_dma_disable() to stop any ongoing transfer. On
262 * some platforms we can't do that since DMA device is powered off.
263 * Moreover we have no possibility to check if the platform is affected
264 * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put()
265 * unconditionally. On the other hand we can't use
266 * pm_runtime_suspended() because runtime PM framework is not fully
267 * used by the driver.
268 */
269 pm_runtime_get_sync(chip->dev);
270 dw_dma_disable(chip);
271 pm_runtime_put_sync_suspend(chip->dev);
272
273 clk_disable_unprepare(chip->clk);
274}
275
276#ifdef CONFIG_OF
277static const struct of_device_id dw_dma_of_id_table[] = {
278 { .compatible = "snps,dma-spear1340" },
279 {}
280};
281MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
282#endif
283
284#ifdef CONFIG_ACPI
285static const struct acpi_device_id dw_dma_acpi_id_table[] = {
286 { "INTL9C60", 0 },
287 { }
288};
289MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
290#endif
291
292#ifdef CONFIG_PM_SLEEP
293
294static int dw_suspend_late(struct device *dev)
295{
296 struct platform_device *pdev = to_platform_device(dev);
297 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
298
299 dw_dma_disable(chip);
300 clk_disable_unprepare(chip->clk);
301
302 return 0;
303}
304
305static int dw_resume_early(struct device *dev)
306{
307 struct platform_device *pdev = to_platform_device(dev);
308 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
309 int ret;
310
311 ret = clk_prepare_enable(chip->clk);
312 if (ret)
313 return ret;
314
315 return dw_dma_enable(chip);
316}
317
318#endif /* CONFIG_PM_SLEEP */
319
320static const struct dev_pm_ops dw_dev_pm_ops = {
321 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
322};
323
324static struct platform_driver dw_driver = {
325 .probe = dw_probe,
326 .remove = dw_remove,
327 .shutdown = dw_shutdown,
328 .driver = {
329 .name = DRV_NAME,
330 .pm = &dw_dev_pm_ops,
331 .of_match_table = of_match_ptr(dw_dma_of_id_table),
332 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
333 },
334};
335
336static int __init dw_init(void)
337{
338 return platform_driver_register(&dw_driver);
339}
340subsys_initcall(dw_init);
341
342static void __exit dw_exit(void)
343{
344 platform_driver_unregister(&dw_driver);
345}
346module_exit(dw_exit);
347
348MODULE_LICENSE("GPL v2");
349MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
350MODULE_ALIAS("platform:" DRV_NAME);