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1# SPDX-License-Identifier: GPL-2.0
2
3config HAVE_CLK
4 bool
5 help
6 The <linux/clk.h> calls support software clock gating and
7 thus are a key power management tool on many systems.
8
9config HAVE_CLK_PREPARE
10 bool
11
12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
13 bool
14 select HAVE_CLK
15 help
16 Select this option when the clock API in <linux/clk.h> is implemented
17 by platform/architecture code. This method is deprecated. Modern
18 code should select COMMON_CLK instead and not define a custom
19 'struct clk'.
20
21menuconfig COMMON_CLK
22 bool "Common Clock Framework"
23 depends on !HAVE_LEGACY_CLK
24 select HAVE_CLK_PREPARE
25 select HAVE_CLK
26 select RATIONAL
27 help
28 The common clock framework is a single definition of struct
29 clk, useful across many platforms, as well as an
30 implementation of the clock API in include/linux/clk.h.
31 Architectures utilizing the common struct clk should select
32 this option.
33
34if COMMON_CLK
35
36config COMMON_CLK_WM831X
37 tristate "Clock driver for WM831x/2x PMICs"
38 depends on MFD_WM831X
39 help
40 Supports the clocking subsystem of the WM831x/2x series of
41 PMICs from Wolfson Microelectronics.
42
43source "drivers/clk/versatile/Kconfig"
44
45config CLK_HSDK
46 bool "PLL Driver for HSDK platform"
47 depends on ARC_SOC_HSDK || COMPILE_TEST
48 depends on HAS_IOMEM
49 help
50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
51 control.
52
53config LMK04832
54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
55 depends on SPI
56 select REGMAP_SPI
57 help
58 Say yes here to build support for Texas Instruments' LMK04832 Ultra
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
60
61config COMMON_CLK_APPLE_NCO
62 tristate "Clock driver for Apple SoC NCOs"
63 depends on ARCH_APPLE || COMPILE_TEST
64 default ARCH_APPLE
65 help
66 This driver supports NCO (Numerically Controlled Oscillator) blocks
67 found on Apple SoCs such as t8103 (M1). The blocks are typically
68 generators of audio clocks.
69
70config COMMON_CLK_MAX77686
71 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
72 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
73 help
74 This driver supports Maxim 77620/77686/77802 crystal oscillator
75 clock.
76
77config COMMON_CLK_MAX9485
78 tristate "Maxim 9485 Programmable Clock Generator"
79 depends on I2C
80 help
81 This driver supports Maxim 9485 Programmable Audio Clock Generator
82
83config COMMON_CLK_RK808
84 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
85 depends on MFD_RK8XX
86 help
87 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
89 Clkout1 is always on, Clkout2 can off by control register.
90
91config COMMON_CLK_HI655X
92 tristate "Clock driver for Hi655x" if EXPERT
93 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
94 select REGMAP
95 default MFD_HI655X_PMIC
96 help
97 This driver supports the hi655x PMIC clock. This
98 multi-function device has one fixed-rate oscillator, clocked
99 at 32KHz.
100
101config COMMON_CLK_SCMI
102 tristate "Clock driver controlled via SCMI interface"
103 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
104 help
105 This driver provides support for clocks that are controlled
106 by firmware that implements the SCMI interface.
107
108 This driver uses SCMI Message Protocol to interact with the
109 firmware providing all the clock controls.
110
111config COMMON_CLK_SCPI
112 tristate "Clock driver controlled via SCPI interface"
113 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
114 help
115 This driver provides support for clocks that are controlled
116 by firmware that implements the SCPI interface.
117
118 This driver uses SCPI Message Protocol to interact with the
119 firmware providing all the clock controls.
120
121config COMMON_CLK_SI5341
122 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
123 depends on I2C
124 select REGMAP_I2C
125 help
126 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
127 generators. Not all features of these chips are currently supported
128 by the driver, in particular it only supports XTAL input. The chip can
129 be pre-programmed to support other configurations and features not yet
130 implemented in the driver.
131
132config COMMON_CLK_SI5351
133 tristate "Clock driver for SiLabs 5351A/B/C"
134 depends on I2C
135 select REGMAP_I2C
136 help
137 This driver supports Silicon Labs 5351A/B/C programmable clock
138 generators.
139
140config COMMON_CLK_SI514
141 tristate "Clock driver for SiLabs 514 devices"
142 depends on I2C
143 depends on OF
144 select REGMAP_I2C
145 help
146 This driver supports the Silicon Labs 514 programmable clock
147 generator.
148
149config COMMON_CLK_SI544
150 tristate "Clock driver for SiLabs 544 devices"
151 depends on I2C
152 select REGMAP_I2C
153 help
154 This driver supports the Silicon Labs 544 programmable clock
155 generator.
156
157config COMMON_CLK_SI570
158 tristate "Clock driver for SiLabs 570 and compatible devices"
159 depends on I2C
160 depends on OF
161 select REGMAP_I2C
162 help
163 This driver supports Silicon Labs 570/571/598/599 programmable
164 clock generators.
165
166config COMMON_CLK_BM1880
167 bool "Clock driver for Bitmain BM1880 SoC"
168 depends on ARCH_BITMAIN || COMPILE_TEST
169 default ARCH_BITMAIN
170 help
171 This driver supports the clocks on Bitmain BM1880 SoC.
172
173config COMMON_CLK_CDCE706
174 tristate "Clock driver for TI CDCE706 clock synthesizer"
175 depends on I2C
176 select REGMAP_I2C
177 help
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
179
180config COMMON_CLK_TPS68470
181 tristate "Clock Driver for TI TPS68470 PMIC"
182 depends on I2C
183 depends on INTEL_SKL_INT3472 || COMPILE_TEST
184 select REGMAP_I2C
185 help
186 This driver supports the clocks provided by the TPS68470 PMIC.
187
188config COMMON_CLK_CDCE925
189 tristate "Clock driver for TI CDCE913/925/937/949 devices"
190 depends on I2C
191 depends on OF
192 select REGMAP_I2C
193 help
194 This driver supports the TI CDCE913/925/937/949 programmable clock
195 synthesizer. Each chip has different number of PLLs and outputs.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
197 clocking support and five output dividers. The driver only supports
198 the following setup, and uses a fixed setting for the output muxes.
199 Y1 is derived from the input clock
200 Y2 and Y3 derive from PLL1
201 Y4 and Y5 derive from PLL2
202 Given a target output frequency, the driver will set the PLL and
203 divider to best approximate the desired output.
204
205config COMMON_CLK_CS2000_CP
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
207 depends on I2C
208 select REGMAP_I2C
209 help
210 If you say yes here you get support for the CS2000 clock multiplier.
211
212config COMMON_CLK_EN7523
213 bool "Clock driver for Airoha EN7523 SoC system clocks"
214 depends on OF
215 depends on ARCH_AIROHA || COMPILE_TEST
216 default ARCH_AIROHA
217 help
218 This driver provides the fixed clocks and gates present on Airoha
219 ARM silicon.
220
221config COMMON_CLK_FSL_FLEXSPI
222 tristate "Clock driver for FlexSPI on Layerscape SoCs"
223 depends on ARCH_LAYERSCAPE || COMPILE_TEST
224 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
225 help
226 On Layerscape SoCs there is a special clock for the FlexSPI
227 interface.
228
229config COMMON_CLK_FSL_SAI
230 bool "Clock driver for BCLK of Freescale SAI cores"
231 depends on ARCH_LAYERSCAPE || COMPILE_TEST
232 help
233 This driver supports the Freescale SAI (Synchronous Audio Interface)
234 to be used as a generic clock output. Some SoCs have restrictions
235 regarding the possible pin multiplexer settings. Eg. on some SoCs
236 two SAI interfaces can only be enabled together. If just one is
237 needed, the BCLK pin of the second one can be used as general
238 purpose clock output. Ideally, it can be used to drive an audio
239 codec (sometimes known as MCLK).
240
241config COMMON_CLK_GEMINI
242 bool "Clock driver for Cortina Systems Gemini SoC"
243 depends on ARCH_GEMINI || COMPILE_TEST
244 select MFD_SYSCON
245 select RESET_CONTROLLER
246 help
247 This driver supports the SoC clocks on the Cortina Systems Gemini
248 platform, also known as SL3516 or CS3516.
249
250config COMMON_CLK_LAN966X
251 tristate "Generic Clock Controller driver for LAN966X SoC"
252 depends on HAS_IOMEM
253 depends on OF
254 depends on SOC_LAN966 || COMPILE_TEST
255 help
256 This driver provides support for Generic Clock Controller(GCK) on
257 LAN966X SoC. GCK generates and supplies clock to various peripherals
258 within the SoC.
259
260config COMMON_CLK_ASPEED
261 bool "Clock driver for Aspeed BMC SoCs"
262 depends on ARCH_ASPEED || COMPILE_TEST
263 default ARCH_ASPEED
264 select MFD_SYSCON
265 select RESET_CONTROLLER
266 help
267 This driver supports the SoC clocks on the Aspeed BMC platforms.
268
269 The G4 and G5 series, including the ast2400 and ast2500, are supported
270 by this driver.
271
272config COMMON_CLK_S2MPS11
273 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
274 depends on MFD_SEC_CORE || COMPILE_TEST
275 help
276 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
277 clock. These multi-function devices have two (S2MPS14) or three
278 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
279
280config CLK_TWL
281 tristate "Clock driver for the TWL PMIC family"
282 depends on TWL4030_CORE
283 help
284 Enable support for controlling the clock resources on TWL family
285 PMICs. These devices have some 32K clock outputs which can be
286 controlled by software. For now, only the TWL6032 clocks are
287 supported.
288
289config CLK_TWL6040
290 tristate "External McPDM functional clock from twl6040"
291 depends on TWL6040_CORE
292 help
293 Enable the external functional clock support on OMAP4+ platforms for
294 McPDM. McPDM module is using the external bit clock on the McPDM bus
295 as functional clock.
296
297config COMMON_CLK_AXI_CLKGEN
298 tristate "AXI clkgen driver"
299 depends on HAS_IOMEM || COMPILE_TEST
300 depends on OF
301 help
302 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
303 FPGAs. It is commonly used in Analog Devices' reference designs.
304
305config CLK_QORIQ
306 bool "Clock driver for Freescale QorIQ platforms"
307 depends on OF
308 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
309 help
310 This adds the clock driver support for Freescale QorIQ platforms
311 using common clock framework.
312
313config CLK_LS1028A_PLLDIG
314 tristate "Clock driver for LS1028A Display output"
315 depends on ARCH_LAYERSCAPE || COMPILE_TEST
316 default ARCH_LAYERSCAPE
317 help
318 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
319 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
320 features of the PLL are currently supported by the driver. By default,
321 configured bypass mode with this PLL.
322
323config COMMON_CLK_XGENE
324 bool "Clock driver for APM XGene SoC"
325 default ARCH_XGENE
326 depends on ARM64 || COMPILE_TEST
327 help
328 Support for the APM X-Gene SoC reference, PLL, and device clocks.
329
330config COMMON_CLK_LOCHNAGAR
331 tristate "Cirrus Logic Lochnagar clock driver"
332 depends on MFD_LOCHNAGAR
333 help
334 This driver supports the clocking features of the Cirrus Logic
335 Lochnagar audio development board.
336
337config COMMON_CLK_LOONGSON2
338 bool "Clock driver for Loongson-2 SoC"
339 depends on LOONGARCH || COMPILE_TEST
340 help
341 This driver provides support for clock controller on Loongson-2 SoC.
342 The clock controller can generates and supplies clock to various
343 peripherals within the SoC.
344 Say Y here to support Loongson-2 SoC clock driver.
345
346config COMMON_CLK_NXP
347 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
348 select REGMAP_MMIO if ARCH_LPC32XX
349 select MFD_SYSCON if ARCH_LPC18XX
350 help
351 Support for clock providers on NXP platforms.
352
353config COMMON_CLK_PALMAS
354 tristate "Clock driver for TI Palmas devices"
355 depends on MFD_PALMAS
356 help
357 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
358 using common clock framework.
359
360config COMMON_CLK_PWM
361 tristate "Clock driver for PWMs used as clock outputs"
362 depends on PWM
363 help
364 Adapter driver so that any PWM output can be (mis)used as clock signal
365 at 50% duty cycle.
366
367config COMMON_CLK_PXA
368 def_bool COMMON_CLK && ARCH_PXA
369 help
370 Support for the Marvell PXA SoC.
371
372config COMMON_CLK_RS9_PCIE
373 tristate "Clock driver for Renesas 9-series PCIe clock generators"
374 depends on I2C
375 depends on OF
376 select REGMAP_I2C
377 help
378 This driver supports the Renesas 9-series PCIe clock generator
379 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
380
381config COMMON_CLK_SI521XX
382 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
383 depends on I2C
384 depends on OF
385 select REGMAP_I2C
386 help
387 This driver supports the SkyWorks Si521xx PCIe clock generator
388 models Si52144/Si52146/Si52147.
389
390config COMMON_CLK_VC3
391 tristate "Clock driver for Renesas VersaClock 3 devices"
392 depends on I2C
393 depends on OF
394 select REGMAP_I2C
395 help
396 This driver supports the Renesas VersaClock 3 programmable clock
397 generators.
398
399config COMMON_CLK_VC5
400 tristate "Clock driver for IDT VersaClock 5,6 devices"
401 depends on I2C
402 depends on OF
403 select REGMAP_I2C
404 help
405 This driver supports the IDT VersaClock 5 and VersaClock 6
406 programmable clock generators.
407
408config COMMON_CLK_VC7
409 tristate "Clock driver for Renesas Versaclock 7 devices"
410 depends on I2C
411 depends on OF
412 select REGMAP_I2C
413 help
414 Renesas Versaclock7 is a family of configurable clock generator
415 and jitter attenuator ICs with fractional and integer dividers.
416
417config COMMON_CLK_STM32F
418 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
419 help
420 Support for stm32f4 and stm32f7 SoC families clocks
421
422config COMMON_CLK_STM32H7
423 def_bool COMMON_CLK && MACH_STM32H743
424 help
425 Support for stm32h7 SoC family clocks
426
427config COMMON_CLK_MMP2
428 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
429 help
430 Support for Marvell MMP2 and MMP3 SoC clocks
431
432config COMMON_CLK_MMP2_AUDIO
433 tristate "Clock driver for MMP2 Audio subsystem"
434 depends on COMMON_CLK_MMP2 || COMPILE_TEST
435 help
436 This driver supports clocks for Audio subsystem on MMP2 SoC.
437
438config COMMON_CLK_BD718XX
439 tristate "Clock driver for 32K clk gates on ROHM PMICs"
440 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
441 help
442 This driver supports ROHM BD71837, BD71847, BD71850, BD71815
443 and BD71828 PMICs clock gates.
444
445config COMMON_CLK_FIXED_MMIO
446 bool "Clock driver for Memory Mapped Fixed values"
447 depends on COMMON_CLK && OF
448 depends on HAS_IOMEM
449 help
450 Support for Memory Mapped IO Fixed clocks
451
452config COMMON_CLK_K210
453 bool "Clock driver for the Canaan Kendryte K210 SoC"
454 depends on OF && RISCV && SOC_CANAAN
455 default SOC_CANAAN
456 help
457 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
458
459config COMMON_CLK_SP7021
460 tristate "Clock driver for Sunplus SP7021 SoC"
461 depends on SOC_SP7021 || COMPILE_TEST
462 default SOC_SP7021
463 help
464 This driver supports the Sunplus SP7021 SoC clocks.
465 It implements SP7021 PLLs/gate.
466 Not all features of the PLL are currently supported
467 by the driver.
468
469source "drivers/clk/actions/Kconfig"
470source "drivers/clk/analogbits/Kconfig"
471source "drivers/clk/baikal-t1/Kconfig"
472source "drivers/clk/bcm/Kconfig"
473source "drivers/clk/hisilicon/Kconfig"
474source "drivers/clk/imgtec/Kconfig"
475source "drivers/clk/imx/Kconfig"
476source "drivers/clk/ingenic/Kconfig"
477source "drivers/clk/keystone/Kconfig"
478source "drivers/clk/mediatek/Kconfig"
479source "drivers/clk/meson/Kconfig"
480source "drivers/clk/mstar/Kconfig"
481source "drivers/clk/microchip/Kconfig"
482source "drivers/clk/mvebu/Kconfig"
483source "drivers/clk/nuvoton/Kconfig"
484source "drivers/clk/pistachio/Kconfig"
485source "drivers/clk/qcom/Kconfig"
486source "drivers/clk/ralink/Kconfig"
487source "drivers/clk/renesas/Kconfig"
488source "drivers/clk/rockchip/Kconfig"
489source "drivers/clk/samsung/Kconfig"
490source "drivers/clk/sifive/Kconfig"
491source "drivers/clk/socfpga/Kconfig"
492source "drivers/clk/sprd/Kconfig"
493source "drivers/clk/starfive/Kconfig"
494source "drivers/clk/sunxi/Kconfig"
495source "drivers/clk/sunxi-ng/Kconfig"
496source "drivers/clk/tegra/Kconfig"
497source "drivers/clk/stm32/Kconfig"
498source "drivers/clk/ti/Kconfig"
499source "drivers/clk/uniphier/Kconfig"
500source "drivers/clk/visconti/Kconfig"
501source "drivers/clk/x86/Kconfig"
502source "drivers/clk/xilinx/Kconfig"
503source "drivers/clk/zynqmp/Kconfig"
504
505# Kunit test cases
506config CLK_KUNIT_TEST
507 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
508 depends on KUNIT
509 default KUNIT_ALL_TESTS
510 help
511 Kunit tests for the common clock framework.
512
513config CLK_GATE_KUNIT_TEST
514 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
515 depends on KUNIT
516 default KUNIT_ALL_TESTS
517 help
518 Kunit test for the basic clk gate type.
519
520config CLK_FD_KUNIT_TEST
521 tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS
522 depends on KUNIT
523 default KUNIT_ALL_TESTS
524 help
525 Kunit test for the clk-fractional-divider type.
526
527endif
1
2config CLKDEV_LOOKUP
3 bool
4 select HAVE_CLK
5
6config HAVE_CLK_PREPARE
7 bool
8
9config COMMON_CLK
10 bool
11 select HAVE_CLK_PREPARE
12 select CLKDEV_LOOKUP
13 select SRCU
14 select RATIONAL
15 ---help---
16 The common clock framework is a single definition of struct
17 clk, useful across many platforms, as well as an
18 implementation of the clock API in include/linux/clk.h.
19 Architectures utilizing the common struct clk should select
20 this option.
21
22menu "Common Clock Framework"
23 depends on COMMON_CLK
24
25config COMMON_CLK_WM831X
26 tristate "Clock driver for WM831x/2x PMICs"
27 depends on MFD_WM831X
28 ---help---
29 Supports the clocking subsystem of the WM831x/2x series of
30 PMICs from Wolfson Microelectronics.
31
32source "drivers/clk/versatile/Kconfig"
33
34config CLK_HSDK
35 bool "PLL Driver for HSDK platform"
36 depends on OF || COMPILE_TEST
37 ---help---
38 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
39 control.
40
41config COMMON_CLK_MAX77686
42 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
43 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
44 ---help---
45 This driver supports Maxim 77620/77686/77802 crystal oscillator
46 clock.
47
48config COMMON_CLK_RK808
49 tristate "Clock driver for RK805/RK808/RK818"
50 depends on MFD_RK808
51 ---help---
52 This driver supports RK805, RK808 and RK818 crystal oscillator clock. These
53 multi-function devices have two fixed-rate oscillators,
54 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
55 by control register.
56
57config COMMON_CLK_HI655X
58 tristate "Clock driver for Hi655x" if EXPERT
59 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
60 depends on REGMAP
61 default MFD_HI655X_PMIC
62 ---help---
63 This driver supports the hi655x PMIC clock. This
64 multi-function device has one fixed-rate oscillator, clocked
65 at 32KHz.
66
67config COMMON_CLK_SCMI
68 tristate "Clock driver controlled via SCMI interface"
69 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
70 ---help---
71 This driver provides support for clocks that are controlled
72 by firmware that implements the SCMI interface.
73
74 This driver uses SCMI Message Protocol to interact with the
75 firmware providing all the clock controls.
76
77config COMMON_CLK_SCPI
78 tristate "Clock driver controlled via SCPI interface"
79 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
80 ---help---
81 This driver provides support for clocks that are controlled
82 by firmware that implements the SCPI interface.
83
84 This driver uses SCPI Message Protocol to interact with the
85 firmware providing all the clock controls.
86
87config COMMON_CLK_SI5351
88 tristate "Clock driver for SiLabs 5351A/B/C"
89 depends on I2C
90 select REGMAP_I2C
91 select RATIONAL
92 ---help---
93 This driver supports Silicon Labs 5351A/B/C programmable clock
94 generators.
95
96config COMMON_CLK_SI514
97 tristate "Clock driver for SiLabs 514 devices"
98 depends on I2C
99 depends on OF
100 select REGMAP_I2C
101 help
102 ---help---
103 This driver supports the Silicon Labs 514 programmable clock
104 generator.
105
106config COMMON_CLK_SI544
107 tristate "Clock driver for SiLabs 544 devices"
108 depends on I2C
109 select REGMAP_I2C
110 help
111 ---help---
112 This driver supports the Silicon Labs 544 programmable clock
113 generator.
114
115config COMMON_CLK_SI570
116 tristate "Clock driver for SiLabs 570 and compatible devices"
117 depends on I2C
118 depends on OF
119 select REGMAP_I2C
120 help
121 ---help---
122 This driver supports Silicon Labs 570/571/598/599 programmable
123 clock generators.
124
125config COMMON_CLK_CDCE706
126 tristate "Clock driver for TI CDCE706 clock synthesizer"
127 depends on I2C
128 select REGMAP_I2C
129 select RATIONAL
130 ---help---
131 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
132
133config COMMON_CLK_CDCE925
134 tristate "Clock driver for TI CDCE913/925/937/949 devices"
135 depends on I2C
136 depends on OF
137 select REGMAP_I2C
138 help
139 ---help---
140 This driver supports the TI CDCE913/925/937/949 programmable clock
141 synthesizer. Each chip has different number of PLLs and outputs.
142 For example, the CDCE925 contains two PLLs with spread-spectrum
143 clocking support and five output dividers. The driver only supports
144 the following setup, and uses a fixed setting for the output muxes.
145 Y1 is derived from the input clock
146 Y2 and Y3 derive from PLL1
147 Y4 and Y5 derive from PLL2
148 Given a target output frequency, the driver will set the PLL and
149 divider to best approximate the desired output.
150
151config COMMON_CLK_CS2000_CP
152 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
153 depends on I2C
154 help
155 If you say yes here you get support for the CS2000 clock multiplier.
156
157config COMMON_CLK_GEMINI
158 bool "Clock driver for Cortina Systems Gemini SoC"
159 depends on ARCH_GEMINI || COMPILE_TEST
160 select MFD_SYSCON
161 select RESET_CONTROLLER
162 ---help---
163 This driver supports the SoC clocks on the Cortina Systems Gemini
164 platform, also known as SL3516 or CS3516.
165
166config COMMON_CLK_ASPEED
167 bool "Clock driver for Aspeed BMC SoCs"
168 depends on ARCH_ASPEED || COMPILE_TEST
169 default ARCH_ASPEED
170 select MFD_SYSCON
171 select RESET_CONTROLLER
172 ---help---
173 This driver supports the SoC clocks on the Aspeed BMC platforms.
174
175 The G4 and G5 series, including the ast2400 and ast2500, are supported
176 by this driver.
177
178config COMMON_CLK_S2MPS11
179 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
180 depends on MFD_SEC_CORE || COMPILE_TEST
181 ---help---
182 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
183 clock. These multi-function devices have two (S2MPS14) or three
184 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
185
186config CLK_TWL6040
187 tristate "External McPDM functional clock from twl6040"
188 depends on TWL6040_CORE
189 ---help---
190 Enable the external functional clock support on OMAP4+ platforms for
191 McPDM. McPDM module is using the external bit clock on the McPDM bus
192 as functional clock.
193
194config COMMON_CLK_AXI_CLKGEN
195 tristate "AXI clkgen driver"
196 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
197 help
198 ---help---
199 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
200 FPGAs. It is commonly used in Analog Devices' reference designs.
201
202config CLK_QORIQ
203 bool "Clock driver for Freescale QorIQ platforms"
204 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
205 ---help---
206 This adds the clock driver support for Freescale QorIQ platforms
207 using common clock framework.
208
209config COMMON_CLK_XGENE
210 bool "Clock driver for APM XGene SoC"
211 default y
212 depends on ARM64 || COMPILE_TEST
213 ---help---
214 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
215
216config COMMON_CLK_NXP
217 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
218 select REGMAP_MMIO if ARCH_LPC32XX
219 select MFD_SYSCON if ARCH_LPC18XX
220 ---help---
221 Support for clock providers on NXP platforms.
222
223config COMMON_CLK_PALMAS
224 tristate "Clock driver for TI Palmas devices"
225 depends on MFD_PALMAS
226 ---help---
227 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
228 using common clock framework.
229
230config COMMON_CLK_PWM
231 tristate "Clock driver for PWMs used as clock outputs"
232 depends on PWM
233 ---help---
234 Adapter driver so that any PWM output can be (mis)used as clock signal
235 at 50% duty cycle.
236
237config COMMON_CLK_PXA
238 def_bool COMMON_CLK && ARCH_PXA
239 ---help---
240 Support for the Marvell PXA SoC.
241
242config COMMON_CLK_PIC32
243 def_bool COMMON_CLK && MACH_PIC32
244
245config COMMON_CLK_OXNAS
246 bool "Clock driver for the OXNAS SoC Family"
247 depends on ARCH_OXNAS || COMPILE_TEST
248 select MFD_SYSCON
249 ---help---
250 Support for the OXNAS SoC Family clocks.
251
252config COMMON_CLK_VC5
253 tristate "Clock driver for IDT VersaClock 5,6 devices"
254 depends on I2C
255 depends on OF
256 select REGMAP_I2C
257 help
258 ---help---
259 This driver supports the IDT VersaClock 5 and VersaClock 6
260 programmable clock generators.
261
262config COMMON_CLK_STM32MP157
263 def_bool COMMON_CLK && MACH_STM32MP157
264 help
265 ---help---
266 Support for stm32mp157 SoC family clocks
267
268config COMMON_CLK_STM32F
269 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
270 help
271 ---help---
272 Support for stm32f4 and stm32f7 SoC families clocks
273
274config COMMON_CLK_STM32H7
275 def_bool COMMON_CLK && MACH_STM32H743
276 help
277 ---help---
278 Support for stm32h7 SoC family clocks
279
280source "drivers/clk/bcm/Kconfig"
281source "drivers/clk/hisilicon/Kconfig"
282source "drivers/clk/imgtec/Kconfig"
283source "drivers/clk/keystone/Kconfig"
284source "drivers/clk/mediatek/Kconfig"
285source "drivers/clk/meson/Kconfig"
286source "drivers/clk/mvebu/Kconfig"
287source "drivers/clk/qcom/Kconfig"
288source "drivers/clk/renesas/Kconfig"
289source "drivers/clk/samsung/Kconfig"
290source "drivers/clk/sprd/Kconfig"
291source "drivers/clk/sunxi-ng/Kconfig"
292source "drivers/clk/tegra/Kconfig"
293source "drivers/clk/ti/Kconfig"
294source "drivers/clk/uniphier/Kconfig"
295
296endmenu