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v6.8
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * udc.c - ChipIdea UDC driver
   4 *
   5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
   6 *
   7 * Author: David Lopo
 
 
 
 
   8 */
   9
  10#include <linux/delay.h>
  11#include <linux/device.h>
  12#include <linux/dmapool.h>
  13#include <linux/err.h>
  14#include <linux/irqreturn.h>
  15#include <linux/kernel.h>
  16#include <linux/slab.h>
  17#include <linux/pm_runtime.h>
  18#include <linux/pinctrl/consumer.h>
  19#include <linux/usb/ch9.h>
  20#include <linux/usb/gadget.h>
  21#include <linux/usb/otg-fsm.h>
  22#include <linux/usb/chipidea.h>
  23
  24#include "ci.h"
  25#include "udc.h"
  26#include "bits.h"
  27#include "otg.h"
  28#include "otg_fsm.h"
  29#include "trace.h"
  30
  31/* control endpoint description */
  32static const struct usb_endpoint_descriptor
  33ctrl_endpt_out_desc = {
  34	.bLength         = USB_DT_ENDPOINT_SIZE,
  35	.bDescriptorType = USB_DT_ENDPOINT,
  36
  37	.bEndpointAddress = USB_DIR_OUT,
  38	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
  39	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
  40};
  41
  42static const struct usb_endpoint_descriptor
  43ctrl_endpt_in_desc = {
  44	.bLength         = USB_DT_ENDPOINT_SIZE,
  45	.bDescriptorType = USB_DT_ENDPOINT,
  46
  47	.bEndpointAddress = USB_DIR_IN,
  48	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
  49	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
  50};
  51
  52static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  53		       struct td_node *node);
  54/**
  55 * hw_ep_bit: calculates the bit number
  56 * @num: endpoint number
  57 * @dir: endpoint direction
  58 *
  59 * This function returns bit number
  60 */
  61static inline int hw_ep_bit(int num, int dir)
  62{
  63	return num + ((dir == TX) ? 16 : 0);
  64}
  65
  66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  67{
  68	int fill = 16 - ci->hw_ep_max / 2;
  69
  70	if (n >= ci->hw_ep_max / 2)
  71		n += fill;
  72
  73	return n;
  74}
  75
  76/**
  77 * hw_device_state: enables/disables interrupts (execute without interruption)
  78 * @ci: the controller
  79 * @dma: 0 => disable, !0 => enable and set dma engine
  80 *
  81 * This function returns an error code
  82 */
  83static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  84{
  85	if (dma) {
  86		hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  87		/* interrupt, error, port change, reset, sleep/suspend */
  88		hw_write(ci, OP_USBINTR, ~0,
  89			     USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  90	} else {
  91		hw_write(ci, OP_USBINTR, ~0, 0);
  92	}
  93	return 0;
  94}
  95
  96/**
  97 * hw_ep_flush: flush endpoint fifo (execute without interruption)
  98 * @ci: the controller
  99 * @num: endpoint number
 100 * @dir: endpoint direction
 101 *
 102 * This function returns an error code
 103 */
 104static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
 105{
 106	int n = hw_ep_bit(num, dir);
 107
 108	do {
 109		/* flush any pending transfer */
 110		hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
 111		while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
 112			cpu_relax();
 113	} while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
 114
 115	return 0;
 116}
 117
 118/**
 119 * hw_ep_disable: disables endpoint (execute without interruption)
 120 * @ci: the controller
 121 * @num: endpoint number
 122 * @dir: endpoint direction
 123 *
 124 * This function returns an error code
 125 */
 126static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
 127{
 128	hw_write(ci, OP_ENDPTCTRL + num,
 129		 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
 130	return 0;
 131}
 132
 133/**
 134 * hw_ep_enable: enables endpoint (execute without interruption)
 135 * @ci: the controller
 136 * @num:  endpoint number
 137 * @dir:  endpoint direction
 138 * @type: endpoint type
 139 *
 140 * This function returns an error code
 141 */
 142static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
 143{
 144	u32 mask, data;
 145
 146	if (dir == TX) {
 147		mask  = ENDPTCTRL_TXT;  /* type    */
 148		data  = type << __ffs(mask);
 149
 150		mask |= ENDPTCTRL_TXS;  /* unstall */
 151		mask |= ENDPTCTRL_TXR;  /* reset data toggle */
 152		data |= ENDPTCTRL_TXR;
 153		mask |= ENDPTCTRL_TXE;  /* enable  */
 154		data |= ENDPTCTRL_TXE;
 155	} else {
 156		mask  = ENDPTCTRL_RXT;  /* type    */
 157		data  = type << __ffs(mask);
 158
 159		mask |= ENDPTCTRL_RXS;  /* unstall */
 160		mask |= ENDPTCTRL_RXR;  /* reset data toggle */
 161		data |= ENDPTCTRL_RXR;
 162		mask |= ENDPTCTRL_RXE;  /* enable  */
 163		data |= ENDPTCTRL_RXE;
 164	}
 165	hw_write(ci, OP_ENDPTCTRL + num, mask, data);
 166	return 0;
 167}
 168
 169/**
 170 * hw_ep_get_halt: return endpoint halt status
 171 * @ci: the controller
 172 * @num: endpoint number
 173 * @dir: endpoint direction
 174 *
 175 * This function returns 1 if endpoint halted
 176 */
 177static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
 178{
 179	u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
 180
 181	return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
 182}
 183
 184/**
 185 * hw_ep_prime: primes endpoint (execute without interruption)
 186 * @ci: the controller
 187 * @num:     endpoint number
 188 * @dir:     endpoint direction
 189 * @is_ctrl: true if control endpoint
 190 *
 191 * This function returns an error code
 192 */
 193static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
 194{
 195	int n = hw_ep_bit(num, dir);
 196
 197	/* Synchronize before ep prime */
 198	wmb();
 199
 200	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
 201		return -EAGAIN;
 202
 203	hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
 204
 205	while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
 206		cpu_relax();
 207	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
 208		return -EAGAIN;
 209
 210	/* status shoult be tested according with manual but it doesn't work */
 211	return 0;
 212}
 213
 214/**
 215 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
 216 *                 without interruption)
 217 * @ci: the controller
 218 * @num:   endpoint number
 219 * @dir:   endpoint direction
 220 * @value: true => stall, false => unstall
 221 *
 222 * This function returns an error code
 223 */
 224static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
 225{
 226	if (value != 0 && value != 1)
 227		return -EINVAL;
 228
 229	do {
 230		enum ci_hw_regs reg = OP_ENDPTCTRL + num;
 231		u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
 232		u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
 233
 234		/* data toggle - reserved for EP0 but it's in ESS */
 235		hw_write(ci, reg, mask_xs|mask_xr,
 236			  value ? mask_xs : mask_xr);
 237	} while (value != hw_ep_get_halt(ci, num, dir));
 238
 239	return 0;
 240}
 241
 242/**
 243 * hw_port_is_high_speed: test if port is high speed
 244 * @ci: the controller
 245 *
 246 * This function returns true if high speed port
 247 */
 248static int hw_port_is_high_speed(struct ci_hdrc *ci)
 249{
 250	return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
 251		hw_read(ci, OP_PORTSC, PORTSC_HSP);
 252}
 253
 254/**
 255 * hw_test_and_clear_complete: test & clear complete status (execute without
 256 *                             interruption)
 257 * @ci: the controller
 258 * @n: endpoint number
 259 *
 260 * This function returns complete status
 261 */
 262static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
 263{
 264	n = ep_to_bit(ci, n);
 265	return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
 266}
 267
 268/**
 269 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
 270 *                                without interruption)
 271 * @ci: the controller
 272 *
 273 * This function returns active interrutps
 274 */
 275static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
 276{
 277	u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
 278
 279	hw_write(ci, OP_USBSTS, ~0, reg);
 280	return reg;
 281}
 282
 283/**
 284 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
 285 *                                interruption)
 286 * @ci: the controller
 287 *
 288 * This function returns guard value
 289 */
 290static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
 291{
 292	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
 293}
 294
 295/**
 296 * hw_test_and_set_setup_guard: test & set setup guard (execute without
 297 *                              interruption)
 298 * @ci: the controller
 299 *
 300 * This function returns guard value
 301 */
 302static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
 303{
 304	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
 305}
 306
 307/**
 308 * hw_usb_set_address: configures USB address (execute without interruption)
 309 * @ci: the controller
 310 * @value: new USB address
 311 *
 312 * This function explicitly sets the address, without the "USBADRA" (advance)
 313 * feature, which is not supported by older versions of the controller.
 314 */
 315static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
 316{
 317	hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
 318		 value << __ffs(DEVICEADDR_USBADR));
 319}
 320
 321/**
 322 * hw_usb_reset: restart device after a bus reset (execute without
 323 *               interruption)
 324 * @ci: the controller
 325 *
 326 * This function returns an error code
 327 */
 328static int hw_usb_reset(struct ci_hdrc *ci)
 329{
 330	hw_usb_set_address(ci, 0);
 331
 332	/* ESS flushes only at end?!? */
 333	hw_write(ci, OP_ENDPTFLUSH,    ~0, ~0);
 334
 335	/* clear setup token semaphores */
 336	hw_write(ci, OP_ENDPTSETUPSTAT, 0,  0);
 337
 338	/* clear complete status */
 339	hw_write(ci, OP_ENDPTCOMPLETE,  0,  0);
 340
 341	/* wait until all bits cleared */
 342	while (hw_read(ci, OP_ENDPTPRIME, ~0))
 343		udelay(10);             /* not RTOS friendly */
 344
 345	/* reset all endpoints ? */
 346
 347	/* reset internal status and wait for further instructions
 348	   no need to verify the port reset status (ESS does it) */
 349
 350	return 0;
 351}
 352
 353/******************************************************************************
 354 * UTIL block
 355 *****************************************************************************/
 356
 357static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
 358			unsigned int length, struct scatterlist *s)
 359{
 360	int i;
 361	u32 temp;
 362	struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
 363						  GFP_ATOMIC);
 364
 365	if (node == NULL)
 366		return -ENOMEM;
 367
 368	node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
 369	if (node->ptr == NULL) {
 370		kfree(node);
 371		return -ENOMEM;
 372	}
 373
 374	node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
 375	node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
 376	node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
 377	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
 378		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
 379
 380		if (hwreq->req.length == 0
 381				|| hwreq->req.length % hwep->ep.maxpacket)
 382			mul++;
 383		node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
 384	}
 385
 386	if (s) {
 387		temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
 388		node->td_remaining_size = CI_MAX_BUF_SIZE - length;
 389	} else {
 390		temp = (u32) (hwreq->req.dma + hwreq->req.actual);
 391	}
 392
 393	if (length) {
 394		node->ptr->page[0] = cpu_to_le32(temp);
 395		for (i = 1; i < TD_PAGE_COUNT; i++) {
 396			u32 page = temp + i * CI_HDRC_PAGE_SIZE;
 397			page &= ~TD_RESERVED_MASK;
 398			node->ptr->page[i] = cpu_to_le32(page);
 399		}
 400	}
 401
 402	hwreq->req.actual += length;
 403
 404	if (!list_empty(&hwreq->tds)) {
 405		/* get the last entry */
 406		lastnode = list_entry(hwreq->tds.prev,
 407				struct td_node, td);
 408		lastnode->ptr->next = cpu_to_le32(node->dma);
 409	}
 410
 411	INIT_LIST_HEAD(&node->td);
 412	list_add_tail(&node->td, &hwreq->tds);
 413
 414	return 0;
 415}
 416
 417/**
 418 * _usb_addr: calculates endpoint address from direction & number
 419 * @ep:  endpoint
 420 */
 421static inline u8 _usb_addr(struct ci_hw_ep *ep)
 422{
 423	return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
 424}
 425
 426static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
 427		struct ci_hw_req *hwreq)
 428{
 429	unsigned int rest = hwreq->req.length;
 430	int pages = TD_PAGE_COUNT;
 431	int ret = 0;
 432
 433	if (rest == 0) {
 434		ret = add_td_to_list(hwep, hwreq, 0, NULL);
 435		if (ret < 0)
 436			return ret;
 437	}
 438
 439	/*
 440	 * The first buffer could be not page aligned.
 441	 * In that case we have to span into one extra td.
 442	 */
 443	if (hwreq->req.dma % PAGE_SIZE)
 444		pages--;
 445
 446	while (rest > 0) {
 447		unsigned int count = min(hwreq->req.length - hwreq->req.actual,
 448			(unsigned int)(pages * CI_HDRC_PAGE_SIZE));
 449
 450		ret = add_td_to_list(hwep, hwreq, count, NULL);
 451		if (ret < 0)
 452			return ret;
 453
 454		rest -= count;
 455	}
 456
 457	if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
 458	    && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
 459		ret = add_td_to_list(hwep, hwreq, 0, NULL);
 460		if (ret < 0)
 461			return ret;
 462	}
 463
 464	return ret;
 465}
 466
 467static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
 468		struct scatterlist *s)
 469{
 470	unsigned int rest = sg_dma_len(s);
 471	int ret = 0;
 472
 473	hwreq->req.actual = 0;
 474	while (rest > 0) {
 475		unsigned int count = min_t(unsigned int, rest,
 476				CI_MAX_BUF_SIZE);
 477
 478		ret = add_td_to_list(hwep, hwreq, count, s);
 479		if (ret < 0)
 480			return ret;
 481
 482		rest -= count;
 483	}
 484
 485	return ret;
 486}
 487
 488static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
 489{
 490	int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
 491			/ CI_HDRC_PAGE_SIZE;
 492	int i;
 493	u32 token;
 494
 495	token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
 496	node->ptr->token = cpu_to_le32(token);
 497
 498	for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
 499		u32 page = (u32) sg_dma_address(s) +
 500			(i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
 501
 502		page &= ~TD_RESERVED_MASK;
 503		node->ptr->page[i] = cpu_to_le32(page);
 504	}
 505}
 506
 507static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
 508{
 509	struct usb_request *req = &hwreq->req;
 510	struct scatterlist *s = req->sg;
 511	int ret = 0, i = 0;
 512	struct td_node *node = NULL;
 513
 514	if (!s || req->zero || req->length == 0) {
 515		dev_err(hwep->ci->dev, "not supported operation for sg\n");
 516		return -EINVAL;
 517	}
 518
 519	while (i++ < req->num_mapped_sgs) {
 520		if (sg_dma_address(s) % PAGE_SIZE) {
 521			dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
 522			return -EINVAL;
 523		}
 524
 525		if (node && (node->td_remaining_size >= sg_dma_len(s))) {
 526			ci_add_buffer_entry(node, s);
 527			node->td_remaining_size -= sg_dma_len(s);
 528		} else {
 529			ret = prepare_td_per_sg(hwep, hwreq, s);
 530			if (ret)
 531				return ret;
 532
 533			node = list_entry(hwreq->tds.prev,
 534				struct td_node, td);
 535		}
 536
 537		s = sg_next(s);
 538	}
 539
 540	return ret;
 541}
 542
 543/**
 544 * _hardware_enqueue: configures a request at hardware level
 545 * @hwep:   endpoint
 546 * @hwreq:  request
 547 *
 548 * This function returns an error code
 549 */
 550static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
 551{
 552	struct ci_hdrc *ci = hwep->ci;
 553	int ret = 0;
 
 
 554	struct td_node *firstnode, *lastnode;
 555
 556	/* don't queue twice */
 557	if (hwreq->req.status == -EALREADY)
 558		return -EALREADY;
 559
 560	hwreq->req.status = -EALREADY;
 561
 562	ret = usb_gadget_map_request_by_dev(ci->dev->parent,
 563					    &hwreq->req, hwep->dir);
 564	if (ret)
 565		return ret;
 566
 567	if (hwreq->req.num_mapped_sgs)
 568		ret = prepare_td_for_sg(hwep, hwreq);
 569	else
 570		ret = prepare_td_for_non_sg(hwep, hwreq);
 
 
 571
 572	if (ret)
 573		return ret;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 574
 575	lastnode = list_entry(hwreq->tds.prev,
 576		struct td_node, td);
 577
 578	lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
 579	if (!hwreq->req.no_interrupt)
 580		lastnode->ptr->token |= cpu_to_le32(TD_IOC);
 581
 582	list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
 583		trace_ci_prepare_td(hwep, hwreq, firstnode);
 584
 585	firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
 586
 587	wmb();
 588
 589	hwreq->req.actual = 0;
 590	if (!list_empty(&hwep->qh.queue)) {
 591		struct ci_hw_req *hwreqprev;
 592		int n = hw_ep_bit(hwep->num, hwep->dir);
 593		int tmp_stat;
 594		struct td_node *prevlastnode;
 595		u32 next = firstnode->dma & TD_ADDR_MASK;
 596
 597		hwreqprev = list_entry(hwep->qh.queue.prev,
 598				struct ci_hw_req, queue);
 599		prevlastnode = list_entry(hwreqprev->tds.prev,
 600				struct td_node, td);
 601
 602		prevlastnode->ptr->next = cpu_to_le32(next);
 603		wmb();
 604
 605		if (ci->rev == CI_REVISION_22) {
 606			if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
 607				reprime_dtd(ci, hwep, prevlastnode);
 608		}
 609
 610		if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
 611			goto done;
 612		do {
 613			hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
 614			tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
 615		} while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
 616		hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
 617		if (tmp_stat)
 618			goto done;
 619	}
 620
 621	/*  QH configuration */
 622	hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
 623	hwep->qh.ptr->td.token &=
 624		cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
 625
 626	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
 627		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
 628
 629		if (hwreq->req.length == 0
 630				|| hwreq->req.length % hwep->ep.maxpacket)
 631			mul++;
 632		hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
 633	}
 634
 635	ret = hw_ep_prime(ci, hwep->num, hwep->dir,
 636			   hwep->type == USB_ENDPOINT_XFER_CONTROL);
 637done:
 638	return ret;
 639}
 640
 641/**
 642 * free_pending_td: remove a pending request for the endpoint
 643 * @hwep: endpoint
 644 */
 645static void free_pending_td(struct ci_hw_ep *hwep)
 646{
 647	struct td_node *pending = hwep->pending_td;
 648
 649	dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
 650	hwep->pending_td = NULL;
 651	kfree(pending);
 652}
 653
 654static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
 655					   struct td_node *node)
 656{
 657	hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
 658	hwep->qh.ptr->td.token &=
 659		cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
 660
 661	return hw_ep_prime(ci, hwep->num, hwep->dir,
 662				hwep->type == USB_ENDPOINT_XFER_CONTROL);
 663}
 664
 665/**
 666 * _hardware_dequeue: handles a request at hardware level
 667 * @hwep: endpoint
 668 * @hwreq:  request
 669 *
 670 * This function returns an error code
 671 */
 672static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
 673{
 674	u32 tmptoken;
 675	struct td_node *node, *tmpnode;
 676	unsigned remaining_length;
 677	unsigned actual = hwreq->req.length;
 678	struct ci_hdrc *ci = hwep->ci;
 679
 680	if (hwreq->req.status != -EALREADY)
 681		return -EINVAL;
 682
 683	hwreq->req.status = 0;
 684
 685	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
 686		tmptoken = le32_to_cpu(node->ptr->token);
 687		trace_ci_complete_td(hwep, hwreq, node);
 688		if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
 689			int n = hw_ep_bit(hwep->num, hwep->dir);
 690
 691			if (ci->rev == CI_REVISION_24 ||
 692			    ci->rev == CI_REVISION_22)
 693				if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
 694					reprime_dtd(ci, hwep, node);
 695			hwreq->req.status = -EALREADY;
 696			return -EBUSY;
 697		}
 698
 699		remaining_length = (tmptoken & TD_TOTAL_BYTES);
 700		remaining_length >>= __ffs(TD_TOTAL_BYTES);
 701		actual -= remaining_length;
 702
 703		hwreq->req.status = tmptoken & TD_STATUS;
 704		if ((TD_STATUS_HALTED & hwreq->req.status)) {
 705			hwreq->req.status = -EPIPE;
 706			break;
 707		} else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
 708			hwreq->req.status = -EPROTO;
 709			break;
 710		} else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
 711			hwreq->req.status = -EILSEQ;
 712			break;
 713		}
 714
 715		if (remaining_length) {
 716			if (hwep->dir == TX) {
 717				hwreq->req.status = -EPROTO;
 718				break;
 719			}
 720		}
 721		/*
 722		 * As the hardware could still address the freed td
 723		 * which will run the udc unusable, the cleanup of the
 724		 * td has to be delayed by one.
 725		 */
 726		if (hwep->pending_td)
 727			free_pending_td(hwep);
 728
 729		hwep->pending_td = node;
 730		list_del_init(&node->td);
 731	}
 732
 733	usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
 734					&hwreq->req, hwep->dir);
 735
 736	hwreq->req.actual += actual;
 737
 738	if (hwreq->req.status)
 739		return hwreq->req.status;
 740
 741	return hwreq->req.actual;
 742}
 743
 744/**
 745 * _ep_nuke: dequeues all endpoint requests
 746 * @hwep: endpoint
 747 *
 748 * This function returns an error code
 749 * Caller must hold lock
 750 */
 751static int _ep_nuke(struct ci_hw_ep *hwep)
 752__releases(hwep->lock)
 753__acquires(hwep->lock)
 754{
 755	struct td_node *node, *tmpnode;
 756	if (hwep == NULL)
 757		return -EINVAL;
 758
 759	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
 760
 761	while (!list_empty(&hwep->qh.queue)) {
 762
 763		/* pop oldest request */
 764		struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
 765						     struct ci_hw_req, queue);
 766
 767		list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
 768			dma_pool_free(hwep->td_pool, node->ptr, node->dma);
 769			list_del_init(&node->td);
 770			node->ptr = NULL;
 771			kfree(node);
 772		}
 773
 774		list_del_init(&hwreq->queue);
 775		hwreq->req.status = -ESHUTDOWN;
 776
 777		if (hwreq->req.complete != NULL) {
 778			spin_unlock(hwep->lock);
 779			usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
 780			spin_lock(hwep->lock);
 781		}
 782	}
 783
 784	if (hwep->pending_td)
 785		free_pending_td(hwep);
 786
 787	return 0;
 788}
 789
 790static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
 791{
 792	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
 793	int direction, retval = 0;
 794	unsigned long flags;
 795
 796	if (ep == NULL || hwep->ep.desc == NULL)
 797		return -EINVAL;
 798
 799	if (usb_endpoint_xfer_isoc(hwep->ep.desc))
 800		return -EOPNOTSUPP;
 801
 802	spin_lock_irqsave(hwep->lock, flags);
 803
 804	if (value && hwep->dir == TX && check_transfer &&
 805		!list_empty(&hwep->qh.queue) &&
 806			!usb_endpoint_xfer_control(hwep->ep.desc)) {
 807		spin_unlock_irqrestore(hwep->lock, flags);
 808		return -EAGAIN;
 809	}
 810
 811	direction = hwep->dir;
 812	do {
 813		retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
 814
 815		if (!value)
 816			hwep->wedge = 0;
 817
 818		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
 819			hwep->dir = (hwep->dir == TX) ? RX : TX;
 820
 821	} while (hwep->dir != direction);
 822
 823	spin_unlock_irqrestore(hwep->lock, flags);
 824	return retval;
 825}
 826
 827
 828/**
 829 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
 830 * @gadget: gadget
 831 *
 832 * This function returns an error code
 833 */
 834static int _gadget_stop_activity(struct usb_gadget *gadget)
 835{
 836	struct usb_ep *ep;
 837	struct ci_hdrc    *ci = container_of(gadget, struct ci_hdrc, gadget);
 838	unsigned long flags;
 839
 
 
 
 
 
 
 840	/* flush all endpoints */
 841	gadget_for_each_ep(ep, gadget) {
 842		usb_ep_fifo_flush(ep);
 843	}
 844	usb_ep_fifo_flush(&ci->ep0out->ep);
 845	usb_ep_fifo_flush(&ci->ep0in->ep);
 846
 847	/* make sure to disable all endpoints */
 848	gadget_for_each_ep(ep, gadget) {
 849		usb_ep_disable(ep);
 850	}
 851
 852	if (ci->status != NULL) {
 853		usb_ep_free_request(&ci->ep0in->ep, ci->status);
 854		ci->status = NULL;
 855	}
 856
 857	spin_lock_irqsave(&ci->lock, flags);
 858	ci->gadget.speed = USB_SPEED_UNKNOWN;
 859	ci->remote_wakeup = 0;
 860	ci->suspended = 0;
 861	spin_unlock_irqrestore(&ci->lock, flags);
 862
 863	return 0;
 864}
 865
 866/******************************************************************************
 867 * ISR block
 868 *****************************************************************************/
 869/**
 870 * isr_reset_handler: USB reset interrupt handler
 871 * @ci: UDC device
 872 *
 873 * This function resets USB engine after a bus reset occurred
 874 */
 875static void isr_reset_handler(struct ci_hdrc *ci)
 876__releases(ci->lock)
 877__acquires(ci->lock)
 878{
 879	int retval;
 880
 881	spin_unlock(&ci->lock);
 882	if (ci->gadget.speed != USB_SPEED_UNKNOWN)
 883		usb_gadget_udc_reset(&ci->gadget, ci->driver);
 884
 885	retval = _gadget_stop_activity(&ci->gadget);
 886	if (retval)
 887		goto done;
 888
 889	retval = hw_usb_reset(ci);
 890	if (retval)
 891		goto done;
 892
 893	ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
 894	if (ci->status == NULL)
 895		retval = -ENOMEM;
 896
 897done:
 898	spin_lock(&ci->lock);
 899
 900	if (retval)
 901		dev_err(ci->dev, "error: %i\n", retval);
 902}
 903
 904/**
 905 * isr_get_status_complete: get_status request complete function
 906 * @ep:  endpoint
 907 * @req: request handled
 908 *
 909 * Caller must release lock
 910 */
 911static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
 912{
 913	if (ep == NULL || req == NULL)
 914		return;
 915
 916	kfree(req->buf);
 917	usb_ep_free_request(ep, req);
 918}
 919
 920/**
 921 * _ep_queue: queues (submits) an I/O request to an endpoint
 922 * @ep:        endpoint
 923 * @req:       request
 924 * @gfp_flags: GFP flags (not used)
 925 *
 926 * Caller must hold lock
 927 * This function returns an error code
 928 */
 929static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
 930		    gfp_t __maybe_unused gfp_flags)
 931{
 932	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
 933	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
 934	struct ci_hdrc *ci = hwep->ci;
 935	int retval = 0;
 936
 937	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
 938		return -EINVAL;
 939
 940	if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
 941		if (req->length)
 942			hwep = (ci->ep0_dir == RX) ?
 943			       ci->ep0out : ci->ep0in;
 944		if (!list_empty(&hwep->qh.queue)) {
 945			_ep_nuke(hwep);
 946			dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
 947				 _usb_addr(hwep));
 948		}
 949	}
 950
 951	if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
 952	    hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
 953		dev_err(hwep->ci->dev, "request length too big for isochronous\n");
 954		return -EMSGSIZE;
 955	}
 956
 957	/* first nuke then test link, e.g. previous status has not sent */
 958	if (!list_empty(&hwreq->queue)) {
 959		dev_err(hwep->ci->dev, "request already in queue\n");
 960		return -EBUSY;
 961	}
 962
 963	/* push request */
 964	hwreq->req.status = -EINPROGRESS;
 965	hwreq->req.actual = 0;
 966
 967	retval = _hardware_enqueue(hwep, hwreq);
 968
 969	if (retval == -EALREADY)
 970		retval = 0;
 971	if (!retval)
 972		list_add_tail(&hwreq->queue, &hwep->qh.queue);
 973
 974	return retval;
 975}
 976
 977/**
 978 * isr_get_status_response: get_status request response
 979 * @ci: ci struct
 980 * @setup: setup request packet
 981 *
 982 * This function returns an error code
 983 */
 984static int isr_get_status_response(struct ci_hdrc *ci,
 985				   struct usb_ctrlrequest *setup)
 986__releases(hwep->lock)
 987__acquires(hwep->lock)
 988{
 989	struct ci_hw_ep *hwep = ci->ep0in;
 990	struct usb_request *req = NULL;
 991	gfp_t gfp_flags = GFP_ATOMIC;
 992	int dir, num, retval;
 993
 994	if (hwep == NULL || setup == NULL)
 995		return -EINVAL;
 996
 997	spin_unlock(hwep->lock);
 998	req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
 999	spin_lock(hwep->lock);
1000	if (req == NULL)
1001		return -ENOMEM;
1002
1003	req->complete = isr_get_status_complete;
1004	req->length   = 2;
1005	req->buf      = kzalloc(req->length, gfp_flags);
1006	if (req->buf == NULL) {
1007		retval = -ENOMEM;
1008		goto err_free_req;
1009	}
1010
1011	if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1012		*(u16 *)req->buf = (ci->remote_wakeup << 1) |
1013			ci->gadget.is_selfpowered;
1014	} else if ((setup->bRequestType & USB_RECIP_MASK) \
1015		   == USB_RECIP_ENDPOINT) {
1016		dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1017			TX : RX;
1018		num =  le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1019		*(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1020	}
1021	/* else do nothing; reserved for future use */
1022
1023	retval = _ep_queue(&hwep->ep, req, gfp_flags);
1024	if (retval)
1025		goto err_free_buf;
1026
1027	return 0;
1028
1029 err_free_buf:
1030	kfree(req->buf);
1031 err_free_req:
1032	spin_unlock(hwep->lock);
1033	usb_ep_free_request(&hwep->ep, req);
1034	spin_lock(hwep->lock);
1035	return retval;
1036}
1037
1038/**
1039 * isr_setup_status_complete: setup_status request complete function
1040 * @ep:  endpoint
1041 * @req: request handled
1042 *
1043 * Caller must release lock. Put the port in test mode if test mode
1044 * feature is selected.
1045 */
1046static void
1047isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1048{
1049	struct ci_hdrc *ci = req->context;
1050	unsigned long flags;
1051
1052	if (req->status < 0)
1053		return;
1054
1055	if (ci->setaddr) {
1056		hw_usb_set_address(ci, ci->address);
1057		ci->setaddr = false;
1058		if (ci->address)
1059			usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1060	}
1061
1062	spin_lock_irqsave(&ci->lock, flags);
1063	if (ci->test_mode)
1064		hw_port_test_set(ci, ci->test_mode);
1065	spin_unlock_irqrestore(&ci->lock, flags);
1066}
1067
1068/**
1069 * isr_setup_status_phase: queues the status phase of a setup transation
1070 * @ci: ci struct
1071 *
1072 * This function returns an error code
1073 */
1074static int isr_setup_status_phase(struct ci_hdrc *ci)
1075{
 
1076	struct ci_hw_ep *hwep;
1077
1078	/*
1079	 * Unexpected USB controller behavior, caused by bad signal integrity
1080	 * or ground reference problems, can lead to isr_setup_status_phase
1081	 * being called with ci->status equal to NULL.
1082	 * If this situation occurs, you should review your USB hardware design.
1083	 */
1084	if (WARN_ON_ONCE(!ci->status))
1085		return -EPIPE;
1086
1087	hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1088	ci->status->context = ci;
1089	ci->status->complete = isr_setup_status_complete;
1090
1091	return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
 
 
1092}
1093
1094/**
1095 * isr_tr_complete_low: transaction complete low level handler
1096 * @hwep: endpoint
1097 *
1098 * This function returns an error code
1099 * Caller must hold lock
1100 */
1101static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1102__releases(hwep->lock)
1103__acquires(hwep->lock)
1104{
1105	struct ci_hw_req *hwreq, *hwreqtemp;
1106	struct ci_hw_ep *hweptemp = hwep;
1107	int retval = 0;
1108
1109	list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1110			queue) {
1111		retval = _hardware_dequeue(hwep, hwreq);
1112		if (retval < 0)
1113			break;
1114		list_del_init(&hwreq->queue);
1115		if (hwreq->req.complete != NULL) {
1116			spin_unlock(hwep->lock);
1117			if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1118					hwreq->req.length)
1119				hweptemp = hwep->ci->ep0in;
1120			usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1121			spin_lock(hwep->lock);
1122		}
1123	}
1124
1125	if (retval == -EBUSY)
1126		retval = 0;
1127
1128	return retval;
1129}
1130
1131static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1132{
1133	dev_warn(&ci->gadget.dev,
1134		"connect the device to an alternate port if you want HNP\n");
1135	return isr_setup_status_phase(ci);
1136}
1137
1138/**
1139 * isr_setup_packet_handler: setup packet handler
1140 * @ci: UDC descriptor
1141 *
1142 * This function handles setup packet 
1143 */
1144static void isr_setup_packet_handler(struct ci_hdrc *ci)
1145__releases(ci->lock)
1146__acquires(ci->lock)
1147{
1148	struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1149	struct usb_ctrlrequest req;
1150	int type, num, dir, err = -EINVAL;
1151	u8 tmode = 0;
1152
1153	/*
1154	 * Flush data and handshake transactions of previous
1155	 * setup packet.
1156	 */
1157	_ep_nuke(ci->ep0out);
1158	_ep_nuke(ci->ep0in);
1159
1160	/* read_setup_packet */
1161	do {
1162		hw_test_and_set_setup_guard(ci);
1163		memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1164	} while (!hw_test_and_clear_setup_guard(ci));
1165
1166	type = req.bRequestType;
1167
1168	ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1169
1170	switch (req.bRequest) {
1171	case USB_REQ_CLEAR_FEATURE:
1172		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1173				le16_to_cpu(req.wValue) ==
1174				USB_ENDPOINT_HALT) {
1175			if (req.wLength != 0)
1176				break;
1177			num  = le16_to_cpu(req.wIndex);
1178			dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1179			num &= USB_ENDPOINT_NUMBER_MASK;
1180			if (dir == TX)
1181				num += ci->hw_ep_max / 2;
1182			if (!ci->ci_hw_ep[num].wedge) {
1183				spin_unlock(&ci->lock);
1184				err = usb_ep_clear_halt(
1185					&ci->ci_hw_ep[num].ep);
1186				spin_lock(&ci->lock);
1187				if (err)
1188					break;
1189			}
1190			err = isr_setup_status_phase(ci);
1191		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1192				le16_to_cpu(req.wValue) ==
1193				USB_DEVICE_REMOTE_WAKEUP) {
1194			if (req.wLength != 0)
1195				break;
1196			ci->remote_wakeup = 0;
1197			err = isr_setup_status_phase(ci);
1198		} else {
1199			goto delegate;
1200		}
1201		break;
1202	case USB_REQ_GET_STATUS:
1203		if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1204			le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1205		    type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1206		    type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1207			goto delegate;
1208		if (le16_to_cpu(req.wLength) != 2 ||
1209		    le16_to_cpu(req.wValue)  != 0)
1210			break;
1211		err = isr_get_status_response(ci, &req);
1212		break;
1213	case USB_REQ_SET_ADDRESS:
1214		if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1215			goto delegate;
1216		if (le16_to_cpu(req.wLength) != 0 ||
1217		    le16_to_cpu(req.wIndex)  != 0)
1218			break;
1219		ci->address = (u8)le16_to_cpu(req.wValue);
1220		ci->setaddr = true;
1221		err = isr_setup_status_phase(ci);
1222		break;
1223	case USB_REQ_SET_FEATURE:
1224		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1225				le16_to_cpu(req.wValue) ==
1226				USB_ENDPOINT_HALT) {
1227			if (req.wLength != 0)
1228				break;
1229			num  = le16_to_cpu(req.wIndex);
1230			dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1231			num &= USB_ENDPOINT_NUMBER_MASK;
1232			if (dir == TX)
1233				num += ci->hw_ep_max / 2;
1234
1235			spin_unlock(&ci->lock);
1236			err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1237			spin_lock(&ci->lock);
1238			if (!err)
1239				isr_setup_status_phase(ci);
1240		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1241			if (req.wLength != 0)
1242				break;
1243			switch (le16_to_cpu(req.wValue)) {
1244			case USB_DEVICE_REMOTE_WAKEUP:
1245				ci->remote_wakeup = 1;
1246				err = isr_setup_status_phase(ci);
1247				break;
1248			case USB_DEVICE_TEST_MODE:
1249				tmode = le16_to_cpu(req.wIndex) >> 8;
1250				switch (tmode) {
1251				case USB_TEST_J:
1252				case USB_TEST_K:
1253				case USB_TEST_SE0_NAK:
1254				case USB_TEST_PACKET:
1255				case USB_TEST_FORCE_ENABLE:
1256					ci->test_mode = tmode;
1257					err = isr_setup_status_phase(
1258							ci);
1259					break;
1260				default:
1261					break;
1262				}
1263				break;
1264			case USB_DEVICE_B_HNP_ENABLE:
1265				if (ci_otg_is_fsm_mode(ci)) {
1266					ci->gadget.b_hnp_enable = 1;
1267					err = isr_setup_status_phase(
1268							ci);
1269				}
1270				break;
1271			case USB_DEVICE_A_ALT_HNP_SUPPORT:
1272				if (ci_otg_is_fsm_mode(ci))
1273					err = otg_a_alt_hnp_support(ci);
1274				break;
1275			case USB_DEVICE_A_HNP_SUPPORT:
1276				if (ci_otg_is_fsm_mode(ci)) {
1277					ci->gadget.a_hnp_support = 1;
1278					err = isr_setup_status_phase(
1279							ci);
1280				}
1281				break;
1282			default:
1283				goto delegate;
1284			}
1285		} else {
1286			goto delegate;
1287		}
1288		break;
1289	default:
1290delegate:
1291		if (req.wLength == 0)   /* no data phase */
1292			ci->ep0_dir = TX;
1293
1294		spin_unlock(&ci->lock);
1295		err = ci->driver->setup(&ci->gadget, &req);
1296		spin_lock(&ci->lock);
1297		break;
1298	}
1299
1300	if (err < 0) {
1301		spin_unlock(&ci->lock);
1302		if (_ep_set_halt(&hwep->ep, 1, false))
1303			dev_err(ci->dev, "error: _ep_set_halt\n");
1304		spin_lock(&ci->lock);
1305	}
1306}
1307
1308/**
1309 * isr_tr_complete_handler: transaction complete interrupt handler
1310 * @ci: UDC descriptor
1311 *
1312 * This function handles traffic events
1313 */
1314static void isr_tr_complete_handler(struct ci_hdrc *ci)
1315__releases(ci->lock)
1316__acquires(ci->lock)
1317{
1318	unsigned i;
1319	int err;
1320
1321	for (i = 0; i < ci->hw_ep_max; i++) {
1322		struct ci_hw_ep *hwep  = &ci->ci_hw_ep[i];
1323
1324		if (hwep->ep.desc == NULL)
1325			continue;   /* not configured */
1326
1327		if (hw_test_and_clear_complete(ci, i)) {
1328			err = isr_tr_complete_low(hwep);
1329			if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1330				if (err > 0)   /* needs status phase */
1331					err = isr_setup_status_phase(ci);
1332				if (err < 0) {
1333					spin_unlock(&ci->lock);
1334					if (_ep_set_halt(&hwep->ep, 1, false))
1335						dev_err(ci->dev,
1336						"error: _ep_set_halt\n");
1337					spin_lock(&ci->lock);
1338				}
1339			}
1340		}
1341
1342		/* Only handle setup packet below */
1343		if (i == 0 &&
1344			hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1345			isr_setup_packet_handler(ci);
1346	}
1347}
1348
1349/******************************************************************************
1350 * ENDPT block
1351 *****************************************************************************/
1352/*
1353 * ep_enable: configure endpoint, making it usable
1354 *
1355 * Check usb_ep_enable() at "usb_gadget.h" for details
1356 */
1357static int ep_enable(struct usb_ep *ep,
1358		     const struct usb_endpoint_descriptor *desc)
1359{
1360	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1361	int retval = 0;
1362	unsigned long flags;
1363	u32 cap = 0;
1364
1365	if (ep == NULL || desc == NULL)
1366		return -EINVAL;
1367
1368	spin_lock_irqsave(hwep->lock, flags);
1369
1370	/* only internal SW should enable ctrl endpts */
1371
1372	if (!list_empty(&hwep->qh.queue)) {
1373		dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1374		spin_unlock_irqrestore(hwep->lock, flags);
1375		return -EBUSY;
1376	}
1377
1378	hwep->ep.desc = desc;
1379
1380	hwep->dir  = usb_endpoint_dir_in(desc) ? TX : RX;
1381	hwep->num  = usb_endpoint_num(desc);
1382	hwep->type = usb_endpoint_type(desc);
1383
1384	hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1385	hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1386
1387	if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1388		cap |= QH_IOS;
1389
1390	cap |= QH_ZLT;
1391	cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1392	/*
1393	 * For ISO-TX, we set mult at QH as the largest value, and use
1394	 * MultO at TD as real mult value.
1395	 */
1396	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1397		cap |= 3 << __ffs(QH_MULT);
1398
1399	hwep->qh.ptr->cap = cpu_to_le32(cap);
1400
1401	hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE);   /* needed? */
1402
1403	if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1404		dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1405		retval = -EINVAL;
1406	}
1407
1408	/*
1409	 * Enable endpoints in the HW other than ep0 as ep0
1410	 * is always enabled
1411	 */
1412	if (hwep->num)
1413		retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1414				       hwep->type);
1415
1416	spin_unlock_irqrestore(hwep->lock, flags);
1417	return retval;
1418}
1419
1420/*
1421 * ep_disable: endpoint is no longer usable
1422 *
1423 * Check usb_ep_disable() at "usb_gadget.h" for details
1424 */
1425static int ep_disable(struct usb_ep *ep)
1426{
1427	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1428	int direction, retval = 0;
1429	unsigned long flags;
1430
1431	if (ep == NULL)
1432		return -EINVAL;
1433	else if (hwep->ep.desc == NULL)
1434		return -EBUSY;
1435
1436	spin_lock_irqsave(hwep->lock, flags);
1437	if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1438		spin_unlock_irqrestore(hwep->lock, flags);
1439		return 0;
1440	}
1441
1442	/* only internal SW should disable ctrl endpts */
1443
1444	direction = hwep->dir;
1445	do {
1446		retval |= _ep_nuke(hwep);
1447		retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1448
1449		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1450			hwep->dir = (hwep->dir == TX) ? RX : TX;
1451
1452	} while (hwep->dir != direction);
1453
1454	hwep->ep.desc = NULL;
1455
1456	spin_unlock_irqrestore(hwep->lock, flags);
1457	return retval;
1458}
1459
1460/*
1461 * ep_alloc_request: allocate a request object to use with this endpoint
1462 *
1463 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1464 */
1465static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1466{
1467	struct ci_hw_req *hwreq;
1468
1469	if (ep == NULL)
1470		return NULL;
1471
1472	hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1473	if (hwreq != NULL) {
1474		INIT_LIST_HEAD(&hwreq->queue);
1475		INIT_LIST_HEAD(&hwreq->tds);
1476	}
1477
1478	return (hwreq == NULL) ? NULL : &hwreq->req;
1479}
1480
1481/*
1482 * ep_free_request: frees a request object
1483 *
1484 * Check usb_ep_free_request() at "usb_gadget.h" for details
1485 */
1486static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1487{
1488	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1489	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1490	struct td_node *node, *tmpnode;
1491	unsigned long flags;
1492
1493	if (ep == NULL || req == NULL) {
1494		return;
1495	} else if (!list_empty(&hwreq->queue)) {
1496		dev_err(hwep->ci->dev, "freeing queued request\n");
1497		return;
1498	}
1499
1500	spin_lock_irqsave(hwep->lock, flags);
1501
1502	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1503		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1504		list_del_init(&node->td);
1505		node->ptr = NULL;
1506		kfree(node);
1507	}
1508
1509	kfree(hwreq);
1510
1511	spin_unlock_irqrestore(hwep->lock, flags);
1512}
1513
1514/*
1515 * ep_queue: queues (submits) an I/O request to an endpoint
1516 *
1517 * Check usb_ep_queue()* at usb_gadget.h" for details
1518 */
1519static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1520		    gfp_t __maybe_unused gfp_flags)
1521{
1522	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1523	int retval = 0;
1524	unsigned long flags;
1525
1526	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1527		return -EINVAL;
1528
1529	spin_lock_irqsave(hwep->lock, flags);
1530	if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1531		spin_unlock_irqrestore(hwep->lock, flags);
1532		return 0;
1533	}
1534	retval = _ep_queue(ep, req, gfp_flags);
1535	spin_unlock_irqrestore(hwep->lock, flags);
1536	return retval;
1537}
1538
1539/*
1540 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1541 *
1542 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1543 */
1544static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1545{
1546	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1547	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1548	unsigned long flags;
1549	struct td_node *node, *tmpnode;
1550
1551	if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1552		hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1553		list_empty(&hwep->qh.queue))
1554		return -EINVAL;
1555
1556	spin_lock_irqsave(hwep->lock, flags);
1557	if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1558		hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1559
1560	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1561		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1562		list_del(&node->td);
1563		kfree(node);
1564	}
1565
1566	/* pop request */
1567	list_del_init(&hwreq->queue);
1568
1569	usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1570
1571	req->status = -ECONNRESET;
1572
1573	if (hwreq->req.complete != NULL) {
1574		spin_unlock(hwep->lock);
1575		usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1576		spin_lock(hwep->lock);
1577	}
1578
1579	spin_unlock_irqrestore(hwep->lock, flags);
1580	return 0;
1581}
1582
1583/*
1584 * ep_set_halt: sets the endpoint halt feature
1585 *
1586 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1587 */
1588static int ep_set_halt(struct usb_ep *ep, int value)
1589{
1590	return _ep_set_halt(ep, value, true);
1591}
1592
1593/*
1594 * ep_set_wedge: sets the halt feature and ignores clear requests
1595 *
1596 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1597 */
1598static int ep_set_wedge(struct usb_ep *ep)
1599{
1600	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1601	unsigned long flags;
1602
1603	if (ep == NULL || hwep->ep.desc == NULL)
1604		return -EINVAL;
1605
1606	spin_lock_irqsave(hwep->lock, flags);
1607	hwep->wedge = 1;
1608	spin_unlock_irqrestore(hwep->lock, flags);
1609
1610	return usb_ep_set_halt(ep);
1611}
1612
1613/*
1614 * ep_fifo_flush: flushes contents of a fifo
1615 *
1616 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1617 */
1618static void ep_fifo_flush(struct usb_ep *ep)
1619{
1620	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1621	unsigned long flags;
1622
1623	if (ep == NULL) {
1624		dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1625		return;
1626	}
1627
1628	spin_lock_irqsave(hwep->lock, flags);
1629	if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1630		spin_unlock_irqrestore(hwep->lock, flags);
1631		return;
1632	}
1633
1634	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1635
1636	spin_unlock_irqrestore(hwep->lock, flags);
1637}
1638
1639/*
1640 * Endpoint-specific part of the API to the USB controller hardware
1641 * Check "usb_gadget.h" for details
1642 */
1643static const struct usb_ep_ops usb_ep_ops = {
1644	.enable	       = ep_enable,
1645	.disable       = ep_disable,
1646	.alloc_request = ep_alloc_request,
1647	.free_request  = ep_free_request,
1648	.queue	       = ep_queue,
1649	.dequeue       = ep_dequeue,
1650	.set_halt      = ep_set_halt,
1651	.set_wedge     = ep_set_wedge,
1652	.fifo_flush    = ep_fifo_flush,
1653};
1654
1655/******************************************************************************
1656 * GADGET block
1657 *****************************************************************************/
1658
1659static int ci_udc_get_frame(struct usb_gadget *_gadget)
1660{
1661	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1662	unsigned long flags;
1663	int ret;
1664
1665	spin_lock_irqsave(&ci->lock, flags);
1666	ret = hw_read(ci, OP_FRINDEX, 0x3fff);
 
 
1667	spin_unlock_irqrestore(&ci->lock, flags);
1668	return ret >> 3;
1669}
1670
1671/*
1672 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1673 */
1674static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1675{
1676	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1677
1678	if (is_active) {
1679		pm_runtime_get_sync(ci->dev);
1680		hw_device_reset(ci);
1681		spin_lock_irq(&ci->lock);
1682		if (ci->driver) {
1683			hw_device_state(ci, ci->ep0out->qh.dma);
1684			usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1685			spin_unlock_irq(&ci->lock);
1686			usb_udc_vbus_handler(_gadget, true);
1687		} else {
1688			spin_unlock_irq(&ci->lock);
 
 
 
 
 
 
 
 
 
1689		}
1690	} else {
1691		usb_udc_vbus_handler(_gadget, false);
1692		if (ci->driver)
1693			ci->driver->disconnect(&ci->gadget);
1694		hw_device_state(ci, 0);
1695		if (ci->platdata->notify_event)
1696			ci->platdata->notify_event(ci,
1697			CI_HDRC_CONTROLLER_STOPPED_EVENT);
1698		_gadget_stop_activity(&ci->gadget);
1699		pm_runtime_put_sync(ci->dev);
1700		usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1701	}
1702}
1703
1704static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1705{
1706	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1707	unsigned long flags;
1708	int ret = 0;
1709
1710	spin_lock_irqsave(&ci->lock, flags);
1711	ci->vbus_active = is_active;
1712	spin_unlock_irqrestore(&ci->lock, flags);
1713
1714	if (ci->usb_phy)
1715		usb_phy_set_charger_state(ci->usb_phy, is_active ?
1716			USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1717
1718	if (ci->platdata->notify_event)
1719		ret = ci->platdata->notify_event(ci,
1720				CI_HDRC_CONTROLLER_VBUS_EVENT);
1721
1722	if (ci->usb_phy) {
1723		if (is_active)
1724			usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS);
1725		else
1726			usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE);
1727	}
1728
1729	if (ci->driver)
1730		ci_hdrc_gadget_connect(_gadget, is_active);
1731
1732	return ret;
1733}
1734
1735static int ci_udc_wakeup(struct usb_gadget *_gadget)
1736{
1737	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1738	unsigned long flags;
1739	int ret = 0;
1740
1741	spin_lock_irqsave(&ci->lock, flags);
1742	if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1743		spin_unlock_irqrestore(&ci->lock, flags);
1744		return 0;
1745	}
1746	if (!ci->remote_wakeup) {
1747		ret = -EOPNOTSUPP;
1748		goto out;
1749	}
1750	if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1751		ret = -EINVAL;
1752		goto out;
1753	}
1754	hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1755out:
1756	spin_unlock_irqrestore(&ci->lock, flags);
1757	return ret;
1758}
1759
1760static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1761{
1762	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1763
1764	if (ci->usb_phy)
1765		return usb_phy_set_power(ci->usb_phy, ma);
1766	return -ENOTSUPP;
1767}
1768
1769static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1770{
1771	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1772	struct ci_hw_ep *hwep = ci->ep0in;
1773	unsigned long flags;
1774
1775	spin_lock_irqsave(hwep->lock, flags);
1776	_gadget->is_selfpowered = (is_on != 0);
1777	spin_unlock_irqrestore(hwep->lock, flags);
1778
1779	return 0;
1780}
1781
1782/* Change Data+ pullup status
1783 * this func is used by usb_gadget_connect/disconnect
1784 */
1785static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1786{
1787	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1788
1789	/*
1790	 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1791	 * and don't touch Data+ in host mode for dual role config.
1792	 */
1793	if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1794		return 0;
1795
1796	pm_runtime_get_sync(ci->dev);
1797	if (is_on)
1798		hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1799	else
1800		hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1801	pm_runtime_put_sync(ci->dev);
1802
1803	return 0;
1804}
1805
1806static int ci_udc_start(struct usb_gadget *gadget,
1807			 struct usb_gadget_driver *driver);
1808static int ci_udc_stop(struct usb_gadget *gadget);
1809
1810/* Match ISOC IN from the highest endpoint */
1811static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1812			      struct usb_endpoint_descriptor *desc,
1813			      struct usb_ss_ep_comp_descriptor *comp_desc)
1814{
1815	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1816	struct usb_ep *ep;
1817
1818	if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1819		list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1820			if (ep->caps.dir_in && !ep->claimed)
1821				return ep;
1822		}
1823	}
1824
1825	return NULL;
1826}
1827
1828/*
1829 * Device operations part of the API to the USB controller hardware,
1830 * which don't involve endpoints (or i/o)
1831 * Check  "usb_gadget.h" for details
1832 */
1833static const struct usb_gadget_ops usb_gadget_ops = {
1834	.get_frame	= ci_udc_get_frame,
1835	.vbus_session	= ci_udc_vbus_session,
1836	.wakeup		= ci_udc_wakeup,
1837	.set_selfpowered	= ci_udc_selfpowered,
1838	.pullup		= ci_udc_pullup,
1839	.vbus_draw	= ci_udc_vbus_draw,
1840	.udc_start	= ci_udc_start,
1841	.udc_stop	= ci_udc_stop,
1842	.match_ep 	= ci_udc_match_ep,
1843};
1844
1845static int init_eps(struct ci_hdrc *ci)
1846{
1847	int retval = 0, i, j;
1848
1849	for (i = 0; i < ci->hw_ep_max/2; i++)
1850		for (j = RX; j <= TX; j++) {
1851			int k = i + j * ci->hw_ep_max/2;
1852			struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1853
1854			scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1855					(j == TX)  ? "in" : "out");
1856
1857			hwep->ci          = ci;
1858			hwep->lock         = &ci->lock;
1859			hwep->td_pool      = ci->td_pool;
1860
1861			hwep->ep.name      = hwep->name;
1862			hwep->ep.ops       = &usb_ep_ops;
1863
1864			if (i == 0) {
1865				hwep->ep.caps.type_control = true;
1866			} else {
1867				hwep->ep.caps.type_iso = true;
1868				hwep->ep.caps.type_bulk = true;
1869				hwep->ep.caps.type_int = true;
1870			}
1871
1872			if (j == TX)
1873				hwep->ep.caps.dir_in = true;
1874			else
1875				hwep->ep.caps.dir_out = true;
1876
1877			/*
1878			 * for ep0: maxP defined in desc, for other
1879			 * eps, maxP is set by epautoconfig() called
1880			 * by gadget layer
1881			 */
1882			usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1883
1884			INIT_LIST_HEAD(&hwep->qh.queue);
1885			hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1886						       &hwep->qh.dma);
1887			if (hwep->qh.ptr == NULL)
1888				retval = -ENOMEM;
1889
1890			/*
1891			 * set up shorthands for ep0 out and in endpoints,
1892			 * don't add to gadget's ep_list
1893			 */
1894			if (i == 0) {
1895				if (j == RX)
1896					ci->ep0out = hwep;
1897				else
1898					ci->ep0in = hwep;
1899
1900				usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1901				continue;
1902			}
1903
1904			list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1905		}
1906
1907	return retval;
1908}
1909
1910static void destroy_eps(struct ci_hdrc *ci)
1911{
1912	int i;
1913
1914	for (i = 0; i < ci->hw_ep_max; i++) {
1915		struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1916
1917		if (hwep->pending_td)
1918			free_pending_td(hwep);
1919		dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1920	}
1921}
1922
1923/**
1924 * ci_udc_start: register a gadget driver
1925 * @gadget: our gadget
1926 * @driver: the driver being registered
1927 *
1928 * Interrupts are enabled here.
1929 */
1930static int ci_udc_start(struct usb_gadget *gadget,
1931			 struct usb_gadget_driver *driver)
1932{
1933	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1934	int retval;
 
1935
1936	if (driver->disconnect == NULL)
1937		return -EINVAL;
1938
 
1939	ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1940	retval = usb_ep_enable(&ci->ep0out->ep);
1941	if (retval)
1942		return retval;
1943
1944	ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1945	retval = usb_ep_enable(&ci->ep0in->ep);
1946	if (retval)
1947		return retval;
1948
1949	ci->driver = driver;
1950
1951	/* Start otg fsm for B-device */
1952	if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1953		ci_hdrc_otg_fsm_start(ci);
1954		return retval;
1955	}
1956
1957	if (ci->vbus_active)
1958		ci_hdrc_gadget_connect(gadget, 1);
1959	else
 
 
1960		usb_udc_vbus_handler(&ci->gadget, false);
 
 
 
 
 
 
 
 
1961
1962	return retval;
1963}
1964
1965static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1966{
1967	if (!ci_otg_is_fsm_mode(ci))
1968		return;
1969
1970	mutex_lock(&ci->fsm.lock);
1971	if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1972		ci->fsm.a_bidl_adis_tmout = 1;
1973		ci_hdrc_otg_fsm_start(ci);
1974	} else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1975		ci->fsm.protocol = PROTO_UNDEF;
1976		ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1977	}
1978	mutex_unlock(&ci->fsm.lock);
1979}
1980
1981/*
1982 * ci_udc_stop: unregister a gadget driver
1983 */
1984static int ci_udc_stop(struct usb_gadget *gadget)
1985{
1986	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1987	unsigned long flags;
1988
1989	spin_lock_irqsave(&ci->lock, flags);
1990	ci->driver = NULL;
1991
1992	if (ci->vbus_active) {
1993		hw_device_state(ci, 0);
1994		spin_unlock_irqrestore(&ci->lock, flags);
1995		if (ci->platdata->notify_event)
1996			ci->platdata->notify_event(ci,
1997			CI_HDRC_CONTROLLER_STOPPED_EVENT);
 
1998		_gadget_stop_activity(&ci->gadget);
1999		spin_lock_irqsave(&ci->lock, flags);
2000		pm_runtime_put(ci->dev);
2001	}
2002
 
2003	spin_unlock_irqrestore(&ci->lock, flags);
2004
2005	ci_udc_stop_for_otg_fsm(ci);
2006	return 0;
2007}
2008
2009/******************************************************************************
2010 * BUS block
2011 *****************************************************************************/
2012/*
2013 * udc_irq: ci interrupt handler
2014 *
2015 * This function returns IRQ_HANDLED if the IRQ has been handled
2016 * It locks access to registers
2017 */
2018static irqreturn_t udc_irq(struct ci_hdrc *ci)
2019{
2020	irqreturn_t retval;
2021	u32 intr;
2022
2023	if (ci == NULL)
2024		return IRQ_HANDLED;
2025
2026	spin_lock(&ci->lock);
2027
2028	if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2029		if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2030				USBMODE_CM_DC) {
2031			spin_unlock(&ci->lock);
2032			return IRQ_NONE;
2033		}
2034	}
2035	intr = hw_test_and_clear_intr_active(ci);
2036
2037	if (intr) {
2038		/* order defines priority - do NOT change it */
2039		if (USBi_URI & intr)
2040			isr_reset_handler(ci);
2041
2042		if (USBi_PCI & intr) {
2043			ci->gadget.speed = hw_port_is_high_speed(ci) ?
2044				USB_SPEED_HIGH : USB_SPEED_FULL;
2045			if (ci->usb_phy)
2046				usb_phy_set_event(ci->usb_phy,
2047					USB_EVENT_ENUMERATED);
2048			if (ci->suspended) {
2049				if (ci->driver->resume) {
2050					spin_unlock(&ci->lock);
2051					ci->driver->resume(&ci->gadget);
2052					spin_lock(&ci->lock);
2053				}
2054				ci->suspended = 0;
2055				usb_gadget_set_state(&ci->gadget,
2056						ci->resume_state);
2057			}
2058		}
2059
2060		if (USBi_UI  & intr)
2061			isr_tr_complete_handler(ci);
2062
2063		if ((USBi_SLI & intr) && !(ci->suspended)) {
2064			ci->suspended = 1;
2065			ci->resume_state = ci->gadget.state;
2066			if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2067			    ci->driver->suspend) {
 
2068				spin_unlock(&ci->lock);
2069				ci->driver->suspend(&ci->gadget);
 
 
2070				spin_lock(&ci->lock);
2071			}
2072			usb_gadget_set_state(&ci->gadget,
2073					USB_STATE_SUSPENDED);
2074		}
2075		retval = IRQ_HANDLED;
2076	} else {
2077		retval = IRQ_NONE;
2078	}
2079	spin_unlock(&ci->lock);
2080
2081	return retval;
2082}
2083
2084/**
2085 * udc_start: initialize gadget role
2086 * @ci: chipidea controller
2087 */
2088static int udc_start(struct ci_hdrc *ci)
2089{
2090	struct device *dev = ci->dev;
2091	struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2092	int retval = 0;
2093
2094	ci->gadget.ops          = &usb_gadget_ops;
2095	ci->gadget.speed        = USB_SPEED_UNKNOWN;
2096	ci->gadget.max_speed    = USB_SPEED_HIGH;
2097	ci->gadget.name         = ci->platdata->name;
2098	ci->gadget.otg_caps	= otg_caps;
2099	ci->gadget.sg_supported = 1;
2100	ci->gadget.irq		= ci->irq;
2101
2102	if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2103		ci->gadget.quirk_avoids_skb_reserve = 1;
2104
2105	if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2106						otg_caps->adp_support))
2107		ci->gadget.is_otg = 1;
2108
2109	INIT_LIST_HEAD(&ci->gadget.ep_list);
2110
2111	/* alloc resources */
2112	ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2113				       sizeof(struct ci_hw_qh),
2114				       64, CI_HDRC_PAGE_SIZE);
2115	if (ci->qh_pool == NULL)
2116		return -ENOMEM;
2117
2118	ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2119				       sizeof(struct ci_hw_td),
2120				       64, CI_HDRC_PAGE_SIZE);
2121	if (ci->td_pool == NULL) {
2122		retval = -ENOMEM;
2123		goto free_qh_pool;
2124	}
2125
2126	retval = init_eps(ci);
2127	if (retval)
2128		goto free_pools;
2129
2130	ci->gadget.ep0 = &ci->ep0in->ep;
2131
2132	retval = usb_add_gadget_udc(dev, &ci->gadget);
2133	if (retval)
2134		goto destroy_eps;
2135
 
 
 
2136	return retval;
2137
2138destroy_eps:
2139	destroy_eps(ci);
2140free_pools:
2141	dma_pool_destroy(ci->td_pool);
2142free_qh_pool:
2143	dma_pool_destroy(ci->qh_pool);
2144	return retval;
2145}
2146
2147/*
2148 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2149 *
2150 * No interrupts active, the IRQ has been released
2151 */
2152void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2153{
2154	if (!ci->roles[CI_ROLE_GADGET])
2155		return;
2156
2157	usb_del_gadget_udc(&ci->gadget);
2158
2159	destroy_eps(ci);
2160
2161	dma_pool_destroy(ci->td_pool);
2162	dma_pool_destroy(ci->qh_pool);
2163}
2164
2165static int udc_id_switch_for_device(struct ci_hdrc *ci)
2166{
2167	if (ci->platdata->pins_device)
2168		pinctrl_select_state(ci->platdata->pctl,
2169				     ci->platdata->pins_device);
2170
2171	if (ci->is_otg)
2172		/* Clear and enable BSV irq */
2173		hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2174					OTGSC_BSVIS | OTGSC_BSVIE);
2175
2176	return 0;
2177}
2178
2179static void udc_id_switch_for_host(struct ci_hdrc *ci)
2180{
2181	/*
2182	 * host doesn't care B_SESSION_VALID event
2183	 * so clear and disable BSV irq
2184	 */
2185	if (ci->is_otg)
2186		hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2187
2188	ci->vbus_active = 0;
2189
2190	if (ci->platdata->pins_device && ci->platdata->pins_default)
2191		pinctrl_select_state(ci->platdata->pctl,
2192				     ci->platdata->pins_default);
2193}
2194
2195#ifdef CONFIG_PM_SLEEP
2196static void udc_suspend(struct ci_hdrc *ci)
2197{
2198	/*
2199	 * Set OP_ENDPTLISTADDR to be non-zero for
2200	 * checking if controller resume from power lost
2201	 * in non-host mode.
2202	 */
2203	if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2204		hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2205}
2206
2207static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2208{
2209	if (power_lost) {
2210		if (ci->is_otg)
2211			hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2212					OTGSC_BSVIS | OTGSC_BSVIE);
2213		if (ci->vbus_active)
2214			usb_gadget_vbus_disconnect(&ci->gadget);
2215	}
2216
2217	/* Restore value 0 if it was set for power lost check */
2218	if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2219		hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2220}
2221#endif
2222
2223/**
2224 * ci_hdrc_gadget_init - initialize device related bits
2225 * @ci: the controller
2226 *
2227 * This function initializes the gadget, if the device is "device capable".
2228 */
2229int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2230{
2231	struct ci_role_driver *rdrv;
2232	int ret;
2233
2234	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2235		return -ENXIO;
2236
2237	rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2238	if (!rdrv)
2239		return -ENOMEM;
2240
2241	rdrv->start	= udc_id_switch_for_device;
2242	rdrv->stop	= udc_id_switch_for_host;
2243#ifdef CONFIG_PM_SLEEP
2244	rdrv->suspend	= udc_suspend;
2245	rdrv->resume	= udc_resume;
2246#endif
2247	rdrv->irq	= udc_irq;
2248	rdrv->name	= "gadget";
 
2249
2250	ret = udc_start(ci);
2251	if (!ret)
2252		ci->roles[CI_ROLE_GADGET] = rdrv;
2253
2254	return ret;
2255}
v4.10.11
 
   1/*
   2 * udc.c - ChipIdea UDC driver
   3 *
   4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
   5 *
   6 * Author: David Lopo
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12
  13#include <linux/delay.h>
  14#include <linux/device.h>
  15#include <linux/dmapool.h>
  16#include <linux/err.h>
  17#include <linux/irqreturn.h>
  18#include <linux/kernel.h>
  19#include <linux/slab.h>
  20#include <linux/pm_runtime.h>
 
  21#include <linux/usb/ch9.h>
  22#include <linux/usb/gadget.h>
  23#include <linux/usb/otg-fsm.h>
  24#include <linux/usb/chipidea.h>
  25
  26#include "ci.h"
  27#include "udc.h"
  28#include "bits.h"
  29#include "otg.h"
  30#include "otg_fsm.h"
 
  31
  32/* control endpoint description */
  33static const struct usb_endpoint_descriptor
  34ctrl_endpt_out_desc = {
  35	.bLength         = USB_DT_ENDPOINT_SIZE,
  36	.bDescriptorType = USB_DT_ENDPOINT,
  37
  38	.bEndpointAddress = USB_DIR_OUT,
  39	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
  40	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
  41};
  42
  43static const struct usb_endpoint_descriptor
  44ctrl_endpt_in_desc = {
  45	.bLength         = USB_DT_ENDPOINT_SIZE,
  46	.bDescriptorType = USB_DT_ENDPOINT,
  47
  48	.bEndpointAddress = USB_DIR_IN,
  49	.bmAttributes    = USB_ENDPOINT_XFER_CONTROL,
  50	.wMaxPacketSize  = cpu_to_le16(CTRL_PAYLOAD_MAX),
  51};
  52
 
 
  53/**
  54 * hw_ep_bit: calculates the bit number
  55 * @num: endpoint number
  56 * @dir: endpoint direction
  57 *
  58 * This function returns bit number
  59 */
  60static inline int hw_ep_bit(int num, int dir)
  61{
  62	return num + ((dir == TX) ? 16 : 0);
  63}
  64
  65static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  66{
  67	int fill = 16 - ci->hw_ep_max / 2;
  68
  69	if (n >= ci->hw_ep_max / 2)
  70		n += fill;
  71
  72	return n;
  73}
  74
  75/**
  76 * hw_device_state: enables/disables interrupts (execute without interruption)
 
  77 * @dma: 0 => disable, !0 => enable and set dma engine
  78 *
  79 * This function returns an error code
  80 */
  81static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  82{
  83	if (dma) {
  84		hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  85		/* interrupt, error, port change, reset, sleep/suspend */
  86		hw_write(ci, OP_USBINTR, ~0,
  87			     USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  88	} else {
  89		hw_write(ci, OP_USBINTR, ~0, 0);
  90	}
  91	return 0;
  92}
  93
  94/**
  95 * hw_ep_flush: flush endpoint fifo (execute without interruption)
 
  96 * @num: endpoint number
  97 * @dir: endpoint direction
  98 *
  99 * This function returns an error code
 100 */
 101static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
 102{
 103	int n = hw_ep_bit(num, dir);
 104
 105	do {
 106		/* flush any pending transfer */
 107		hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
 108		while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
 109			cpu_relax();
 110	} while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
 111
 112	return 0;
 113}
 114
 115/**
 116 * hw_ep_disable: disables endpoint (execute without interruption)
 
 117 * @num: endpoint number
 118 * @dir: endpoint direction
 119 *
 120 * This function returns an error code
 121 */
 122static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
 123{
 124	hw_write(ci, OP_ENDPTCTRL + num,
 125		 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
 126	return 0;
 127}
 128
 129/**
 130 * hw_ep_enable: enables endpoint (execute without interruption)
 
 131 * @num:  endpoint number
 132 * @dir:  endpoint direction
 133 * @type: endpoint type
 134 *
 135 * This function returns an error code
 136 */
 137static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
 138{
 139	u32 mask, data;
 140
 141	if (dir == TX) {
 142		mask  = ENDPTCTRL_TXT;  /* type    */
 143		data  = type << __ffs(mask);
 144
 145		mask |= ENDPTCTRL_TXS;  /* unstall */
 146		mask |= ENDPTCTRL_TXR;  /* reset data toggle */
 147		data |= ENDPTCTRL_TXR;
 148		mask |= ENDPTCTRL_TXE;  /* enable  */
 149		data |= ENDPTCTRL_TXE;
 150	} else {
 151		mask  = ENDPTCTRL_RXT;  /* type    */
 152		data  = type << __ffs(mask);
 153
 154		mask |= ENDPTCTRL_RXS;  /* unstall */
 155		mask |= ENDPTCTRL_RXR;  /* reset data toggle */
 156		data |= ENDPTCTRL_RXR;
 157		mask |= ENDPTCTRL_RXE;  /* enable  */
 158		data |= ENDPTCTRL_RXE;
 159	}
 160	hw_write(ci, OP_ENDPTCTRL + num, mask, data);
 161	return 0;
 162}
 163
 164/**
 165 * hw_ep_get_halt: return endpoint halt status
 
 166 * @num: endpoint number
 167 * @dir: endpoint direction
 168 *
 169 * This function returns 1 if endpoint halted
 170 */
 171static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
 172{
 173	u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
 174
 175	return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
 176}
 177
 178/**
 179 * hw_ep_prime: primes endpoint (execute without interruption)
 
 180 * @num:     endpoint number
 181 * @dir:     endpoint direction
 182 * @is_ctrl: true if control endpoint
 183 *
 184 * This function returns an error code
 185 */
 186static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
 187{
 188	int n = hw_ep_bit(num, dir);
 189
 190	/* Synchronize before ep prime */
 191	wmb();
 192
 193	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
 194		return -EAGAIN;
 195
 196	hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
 197
 198	while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
 199		cpu_relax();
 200	if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
 201		return -EAGAIN;
 202
 203	/* status shoult be tested according with manual but it doesn't work */
 204	return 0;
 205}
 206
 207/**
 208 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
 209 *                 without interruption)
 
 210 * @num:   endpoint number
 211 * @dir:   endpoint direction
 212 * @value: true => stall, false => unstall
 213 *
 214 * This function returns an error code
 215 */
 216static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
 217{
 218	if (value != 0 && value != 1)
 219		return -EINVAL;
 220
 221	do {
 222		enum ci_hw_regs reg = OP_ENDPTCTRL + num;
 223		u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
 224		u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
 225
 226		/* data toggle - reserved for EP0 but it's in ESS */
 227		hw_write(ci, reg, mask_xs|mask_xr,
 228			  value ? mask_xs : mask_xr);
 229	} while (value != hw_ep_get_halt(ci, num, dir));
 230
 231	return 0;
 232}
 233
 234/**
 235 * hw_is_port_high_speed: test if port is high speed
 
 236 *
 237 * This function returns true if high speed port
 238 */
 239static int hw_port_is_high_speed(struct ci_hdrc *ci)
 240{
 241	return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
 242		hw_read(ci, OP_PORTSC, PORTSC_HSP);
 243}
 244
 245/**
 246 * hw_test_and_clear_complete: test & clear complete status (execute without
 247 *                             interruption)
 
 248 * @n: endpoint number
 249 *
 250 * This function returns complete status
 251 */
 252static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
 253{
 254	n = ep_to_bit(ci, n);
 255	return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
 256}
 257
 258/**
 259 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
 260 *                                without interruption)
 
 261 *
 262 * This function returns active interrutps
 263 */
 264static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
 265{
 266	u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
 267
 268	hw_write(ci, OP_USBSTS, ~0, reg);
 269	return reg;
 270}
 271
 272/**
 273 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
 274 *                                interruption)
 
 275 *
 276 * This function returns guard value
 277 */
 278static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
 279{
 280	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
 281}
 282
 283/**
 284 * hw_test_and_set_setup_guard: test & set setup guard (execute without
 285 *                              interruption)
 
 286 *
 287 * This function returns guard value
 288 */
 289static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
 290{
 291	return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
 292}
 293
 294/**
 295 * hw_usb_set_address: configures USB address (execute without interruption)
 
 296 * @value: new USB address
 297 *
 298 * This function explicitly sets the address, without the "USBADRA" (advance)
 299 * feature, which is not supported by older versions of the controller.
 300 */
 301static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
 302{
 303	hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
 304		 value << __ffs(DEVICEADDR_USBADR));
 305}
 306
 307/**
 308 * hw_usb_reset: restart device after a bus reset (execute without
 309 *               interruption)
 
 310 *
 311 * This function returns an error code
 312 */
 313static int hw_usb_reset(struct ci_hdrc *ci)
 314{
 315	hw_usb_set_address(ci, 0);
 316
 317	/* ESS flushes only at end?!? */
 318	hw_write(ci, OP_ENDPTFLUSH,    ~0, ~0);
 319
 320	/* clear setup token semaphores */
 321	hw_write(ci, OP_ENDPTSETUPSTAT, 0,  0);
 322
 323	/* clear complete status */
 324	hw_write(ci, OP_ENDPTCOMPLETE,  0,  0);
 325
 326	/* wait until all bits cleared */
 327	while (hw_read(ci, OP_ENDPTPRIME, ~0))
 328		udelay(10);             /* not RTOS friendly */
 329
 330	/* reset all endpoints ? */
 331
 332	/* reset internal status and wait for further instructions
 333	   no need to verify the port reset status (ESS does it) */
 334
 335	return 0;
 336}
 337
 338/******************************************************************************
 339 * UTIL block
 340 *****************************************************************************/
 341
 342static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
 343			  unsigned length)
 344{
 345	int i;
 346	u32 temp;
 347	struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
 348						  GFP_ATOMIC);
 349
 350	if (node == NULL)
 351		return -ENOMEM;
 352
 353	node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
 354	if (node->ptr == NULL) {
 355		kfree(node);
 356		return -ENOMEM;
 357	}
 358
 359	node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
 360	node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
 361	node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
 362	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
 363		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
 364
 365		if (hwreq->req.length == 0
 366				|| hwreq->req.length % hwep->ep.maxpacket)
 367			mul++;
 368		node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
 369	}
 370
 371	temp = (u32) (hwreq->req.dma + hwreq->req.actual);
 
 
 
 
 
 
 372	if (length) {
 373		node->ptr->page[0] = cpu_to_le32(temp);
 374		for (i = 1; i < TD_PAGE_COUNT; i++) {
 375			u32 page = temp + i * CI_HDRC_PAGE_SIZE;
 376			page &= ~TD_RESERVED_MASK;
 377			node->ptr->page[i] = cpu_to_le32(page);
 378		}
 379	}
 380
 381	hwreq->req.actual += length;
 382
 383	if (!list_empty(&hwreq->tds)) {
 384		/* get the last entry */
 385		lastnode = list_entry(hwreq->tds.prev,
 386				struct td_node, td);
 387		lastnode->ptr->next = cpu_to_le32(node->dma);
 388	}
 389
 390	INIT_LIST_HEAD(&node->td);
 391	list_add_tail(&node->td, &hwreq->tds);
 392
 393	return 0;
 394}
 395
 396/**
 397 * _usb_addr: calculates endpoint address from direction & number
 398 * @ep:  endpoint
 399 */
 400static inline u8 _usb_addr(struct ci_hw_ep *ep)
 401{
 402	return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
 403}
 404
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 405/**
 406 * _hardware_enqueue: configures a request at hardware level
 407 * @hwep:   endpoint
 408 * @hwreq:  request
 409 *
 410 * This function returns an error code
 411 */
 412static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
 413{
 414	struct ci_hdrc *ci = hwep->ci;
 415	int ret = 0;
 416	unsigned rest = hwreq->req.length;
 417	int pages = TD_PAGE_COUNT;
 418	struct td_node *firstnode, *lastnode;
 419
 420	/* don't queue twice */
 421	if (hwreq->req.status == -EALREADY)
 422		return -EALREADY;
 423
 424	hwreq->req.status = -EALREADY;
 425
 426	ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
 
 427	if (ret)
 428		return ret;
 429
 430	/*
 431	 * The first buffer could be not page aligned.
 432	 * In that case we have to span into one extra td.
 433	 */
 434	if (hwreq->req.dma % PAGE_SIZE)
 435		pages--;
 436
 437	if (rest == 0) {
 438		ret = add_td_to_list(hwep, hwreq, 0);
 439		if (ret < 0)
 440			goto done;
 441	}
 442
 443	while (rest > 0) {
 444		unsigned count = min(hwreq->req.length - hwreq->req.actual,
 445					(unsigned)(pages * CI_HDRC_PAGE_SIZE));
 446		ret = add_td_to_list(hwep, hwreq, count);
 447		if (ret < 0)
 448			goto done;
 449
 450		rest -= count;
 451	}
 452
 453	if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
 454	    && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
 455		ret = add_td_to_list(hwep, hwreq, 0);
 456		if (ret < 0)
 457			goto done;
 458	}
 459
 460	firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
 461
 462	lastnode = list_entry(hwreq->tds.prev,
 463		struct td_node, td);
 464
 465	lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
 466	if (!hwreq->req.no_interrupt)
 467		lastnode->ptr->token |= cpu_to_le32(TD_IOC);
 
 
 
 
 
 
 468	wmb();
 469
 470	hwreq->req.actual = 0;
 471	if (!list_empty(&hwep->qh.queue)) {
 472		struct ci_hw_req *hwreqprev;
 473		int n = hw_ep_bit(hwep->num, hwep->dir);
 474		int tmp_stat;
 475		struct td_node *prevlastnode;
 476		u32 next = firstnode->dma & TD_ADDR_MASK;
 477
 478		hwreqprev = list_entry(hwep->qh.queue.prev,
 479				struct ci_hw_req, queue);
 480		prevlastnode = list_entry(hwreqprev->tds.prev,
 481				struct td_node, td);
 482
 483		prevlastnode->ptr->next = cpu_to_le32(next);
 484		wmb();
 
 
 
 
 
 
 485		if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
 486			goto done;
 487		do {
 488			hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
 489			tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
 490		} while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
 491		hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
 492		if (tmp_stat)
 493			goto done;
 494	}
 495
 496	/*  QH configuration */
 497	hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
 498	hwep->qh.ptr->td.token &=
 499		cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
 500
 501	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
 502		u32 mul = hwreq->req.length / hwep->ep.maxpacket;
 503
 504		if (hwreq->req.length == 0
 505				|| hwreq->req.length % hwep->ep.maxpacket)
 506			mul++;
 507		hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
 508	}
 509
 510	ret = hw_ep_prime(ci, hwep->num, hwep->dir,
 511			   hwep->type == USB_ENDPOINT_XFER_CONTROL);
 512done:
 513	return ret;
 514}
 515
 516/*
 517 * free_pending_td: remove a pending request for the endpoint
 518 * @hwep: endpoint
 519 */
 520static void free_pending_td(struct ci_hw_ep *hwep)
 521{
 522	struct td_node *pending = hwep->pending_td;
 523
 524	dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
 525	hwep->pending_td = NULL;
 526	kfree(pending);
 527}
 528
 529static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
 530					   struct td_node *node)
 531{
 532	hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
 533	hwep->qh.ptr->td.token &=
 534		cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
 535
 536	return hw_ep_prime(ci, hwep->num, hwep->dir,
 537				hwep->type == USB_ENDPOINT_XFER_CONTROL);
 538}
 539
 540/**
 541 * _hardware_dequeue: handles a request at hardware level
 542 * @gadget: gadget
 543 * @hwep:   endpoint
 544 *
 545 * This function returns an error code
 546 */
 547static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
 548{
 549	u32 tmptoken;
 550	struct td_node *node, *tmpnode;
 551	unsigned remaining_length;
 552	unsigned actual = hwreq->req.length;
 553	struct ci_hdrc *ci = hwep->ci;
 554
 555	if (hwreq->req.status != -EALREADY)
 556		return -EINVAL;
 557
 558	hwreq->req.status = 0;
 559
 560	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
 561		tmptoken = le32_to_cpu(node->ptr->token);
 
 562		if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
 563			int n = hw_ep_bit(hwep->num, hwep->dir);
 564
 565			if (ci->rev == CI_REVISION_24)
 
 566				if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
 567					reprime_dtd(ci, hwep, node);
 568			hwreq->req.status = -EALREADY;
 569			return -EBUSY;
 570		}
 571
 572		remaining_length = (tmptoken & TD_TOTAL_BYTES);
 573		remaining_length >>= __ffs(TD_TOTAL_BYTES);
 574		actual -= remaining_length;
 575
 576		hwreq->req.status = tmptoken & TD_STATUS;
 577		if ((TD_STATUS_HALTED & hwreq->req.status)) {
 578			hwreq->req.status = -EPIPE;
 579			break;
 580		} else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
 581			hwreq->req.status = -EPROTO;
 582			break;
 583		} else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
 584			hwreq->req.status = -EILSEQ;
 585			break;
 586		}
 587
 588		if (remaining_length) {
 589			if (hwep->dir == TX) {
 590				hwreq->req.status = -EPROTO;
 591				break;
 592			}
 593		}
 594		/*
 595		 * As the hardware could still address the freed td
 596		 * which will run the udc unusable, the cleanup of the
 597		 * td has to be delayed by one.
 598		 */
 599		if (hwep->pending_td)
 600			free_pending_td(hwep);
 601
 602		hwep->pending_td = node;
 603		list_del_init(&node->td);
 604	}
 605
 606	usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
 
 607
 608	hwreq->req.actual += actual;
 609
 610	if (hwreq->req.status)
 611		return hwreq->req.status;
 612
 613	return hwreq->req.actual;
 614}
 615
 616/**
 617 * _ep_nuke: dequeues all endpoint requests
 618 * @hwep: endpoint
 619 *
 620 * This function returns an error code
 621 * Caller must hold lock
 622 */
 623static int _ep_nuke(struct ci_hw_ep *hwep)
 624__releases(hwep->lock)
 625__acquires(hwep->lock)
 626{
 627	struct td_node *node, *tmpnode;
 628	if (hwep == NULL)
 629		return -EINVAL;
 630
 631	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
 632
 633	while (!list_empty(&hwep->qh.queue)) {
 634
 635		/* pop oldest request */
 636		struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
 637						     struct ci_hw_req, queue);
 638
 639		list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
 640			dma_pool_free(hwep->td_pool, node->ptr, node->dma);
 641			list_del_init(&node->td);
 642			node->ptr = NULL;
 643			kfree(node);
 644		}
 645
 646		list_del_init(&hwreq->queue);
 647		hwreq->req.status = -ESHUTDOWN;
 648
 649		if (hwreq->req.complete != NULL) {
 650			spin_unlock(hwep->lock);
 651			usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
 652			spin_lock(hwep->lock);
 653		}
 654	}
 655
 656	if (hwep->pending_td)
 657		free_pending_td(hwep);
 658
 659	return 0;
 660}
 661
 662static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
 663{
 664	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
 665	int direction, retval = 0;
 666	unsigned long flags;
 667
 668	if (ep == NULL || hwep->ep.desc == NULL)
 669		return -EINVAL;
 670
 671	if (usb_endpoint_xfer_isoc(hwep->ep.desc))
 672		return -EOPNOTSUPP;
 673
 674	spin_lock_irqsave(hwep->lock, flags);
 675
 676	if (value && hwep->dir == TX && check_transfer &&
 677		!list_empty(&hwep->qh.queue) &&
 678			!usb_endpoint_xfer_control(hwep->ep.desc)) {
 679		spin_unlock_irqrestore(hwep->lock, flags);
 680		return -EAGAIN;
 681	}
 682
 683	direction = hwep->dir;
 684	do {
 685		retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
 686
 687		if (!value)
 688			hwep->wedge = 0;
 689
 690		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
 691			hwep->dir = (hwep->dir == TX) ? RX : TX;
 692
 693	} while (hwep->dir != direction);
 694
 695	spin_unlock_irqrestore(hwep->lock, flags);
 696	return retval;
 697}
 698
 699
 700/**
 701 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
 702 * @gadget: gadget
 703 *
 704 * This function returns an error code
 705 */
 706static int _gadget_stop_activity(struct usb_gadget *gadget)
 707{
 708	struct usb_ep *ep;
 709	struct ci_hdrc    *ci = container_of(gadget, struct ci_hdrc, gadget);
 710	unsigned long flags;
 711
 712	spin_lock_irqsave(&ci->lock, flags);
 713	ci->gadget.speed = USB_SPEED_UNKNOWN;
 714	ci->remote_wakeup = 0;
 715	ci->suspended = 0;
 716	spin_unlock_irqrestore(&ci->lock, flags);
 717
 718	/* flush all endpoints */
 719	gadget_for_each_ep(ep, gadget) {
 720		usb_ep_fifo_flush(ep);
 721	}
 722	usb_ep_fifo_flush(&ci->ep0out->ep);
 723	usb_ep_fifo_flush(&ci->ep0in->ep);
 724
 725	/* make sure to disable all endpoints */
 726	gadget_for_each_ep(ep, gadget) {
 727		usb_ep_disable(ep);
 728	}
 729
 730	if (ci->status != NULL) {
 731		usb_ep_free_request(&ci->ep0in->ep, ci->status);
 732		ci->status = NULL;
 733	}
 734
 
 
 
 
 
 
 735	return 0;
 736}
 737
 738/******************************************************************************
 739 * ISR block
 740 *****************************************************************************/
 741/**
 742 * isr_reset_handler: USB reset interrupt handler
 743 * @ci: UDC device
 744 *
 745 * This function resets USB engine after a bus reset occurred
 746 */
 747static void isr_reset_handler(struct ci_hdrc *ci)
 748__releases(ci->lock)
 749__acquires(ci->lock)
 750{
 751	int retval;
 752
 753	spin_unlock(&ci->lock);
 754	if (ci->gadget.speed != USB_SPEED_UNKNOWN)
 755		usb_gadget_udc_reset(&ci->gadget, ci->driver);
 756
 757	retval = _gadget_stop_activity(&ci->gadget);
 758	if (retval)
 759		goto done;
 760
 761	retval = hw_usb_reset(ci);
 762	if (retval)
 763		goto done;
 764
 765	ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
 766	if (ci->status == NULL)
 767		retval = -ENOMEM;
 768
 769done:
 770	spin_lock(&ci->lock);
 771
 772	if (retval)
 773		dev_err(ci->dev, "error: %i\n", retval);
 774}
 775
 776/**
 777 * isr_get_status_complete: get_status request complete function
 778 * @ep:  endpoint
 779 * @req: request handled
 780 *
 781 * Caller must release lock
 782 */
 783static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
 784{
 785	if (ep == NULL || req == NULL)
 786		return;
 787
 788	kfree(req->buf);
 789	usb_ep_free_request(ep, req);
 790}
 791
 792/**
 793 * _ep_queue: queues (submits) an I/O request to an endpoint
 794 * @ep:        endpoint
 795 * @req:       request
 796 * @gfp_flags: GFP flags (not used)
 797 *
 798 * Caller must hold lock
 799 * This function returns an error code
 800 */
 801static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
 802		    gfp_t __maybe_unused gfp_flags)
 803{
 804	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
 805	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
 806	struct ci_hdrc *ci = hwep->ci;
 807	int retval = 0;
 808
 809	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
 810		return -EINVAL;
 811
 812	if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
 813		if (req->length)
 814			hwep = (ci->ep0_dir == RX) ?
 815			       ci->ep0out : ci->ep0in;
 816		if (!list_empty(&hwep->qh.queue)) {
 817			_ep_nuke(hwep);
 818			dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
 819				 _usb_addr(hwep));
 820		}
 821	}
 822
 823	if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
 824	    hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
 825		dev_err(hwep->ci->dev, "request length too big for isochronous\n");
 826		return -EMSGSIZE;
 827	}
 828
 829	/* first nuke then test link, e.g. previous status has not sent */
 830	if (!list_empty(&hwreq->queue)) {
 831		dev_err(hwep->ci->dev, "request already in queue\n");
 832		return -EBUSY;
 833	}
 834
 835	/* push request */
 836	hwreq->req.status = -EINPROGRESS;
 837	hwreq->req.actual = 0;
 838
 839	retval = _hardware_enqueue(hwep, hwreq);
 840
 841	if (retval == -EALREADY)
 842		retval = 0;
 843	if (!retval)
 844		list_add_tail(&hwreq->queue, &hwep->qh.queue);
 845
 846	return retval;
 847}
 848
 849/**
 850 * isr_get_status_response: get_status request response
 851 * @ci: ci struct
 852 * @setup: setup request packet
 853 *
 854 * This function returns an error code
 855 */
 856static int isr_get_status_response(struct ci_hdrc *ci,
 857				   struct usb_ctrlrequest *setup)
 858__releases(hwep->lock)
 859__acquires(hwep->lock)
 860{
 861	struct ci_hw_ep *hwep = ci->ep0in;
 862	struct usb_request *req = NULL;
 863	gfp_t gfp_flags = GFP_ATOMIC;
 864	int dir, num, retval;
 865
 866	if (hwep == NULL || setup == NULL)
 867		return -EINVAL;
 868
 869	spin_unlock(hwep->lock);
 870	req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
 871	spin_lock(hwep->lock);
 872	if (req == NULL)
 873		return -ENOMEM;
 874
 875	req->complete = isr_get_status_complete;
 876	req->length   = 2;
 877	req->buf      = kzalloc(req->length, gfp_flags);
 878	if (req->buf == NULL) {
 879		retval = -ENOMEM;
 880		goto err_free_req;
 881	}
 882
 883	if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
 884		*(u16 *)req->buf = (ci->remote_wakeup << 1) |
 885			ci->gadget.is_selfpowered;
 886	} else if ((setup->bRequestType & USB_RECIP_MASK) \
 887		   == USB_RECIP_ENDPOINT) {
 888		dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
 889			TX : RX;
 890		num =  le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
 891		*(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
 892	}
 893	/* else do nothing; reserved for future use */
 894
 895	retval = _ep_queue(&hwep->ep, req, gfp_flags);
 896	if (retval)
 897		goto err_free_buf;
 898
 899	return 0;
 900
 901 err_free_buf:
 902	kfree(req->buf);
 903 err_free_req:
 904	spin_unlock(hwep->lock);
 905	usb_ep_free_request(&hwep->ep, req);
 906	spin_lock(hwep->lock);
 907	return retval;
 908}
 909
 910/**
 911 * isr_setup_status_complete: setup_status request complete function
 912 * @ep:  endpoint
 913 * @req: request handled
 914 *
 915 * Caller must release lock. Put the port in test mode if test mode
 916 * feature is selected.
 917 */
 918static void
 919isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
 920{
 921	struct ci_hdrc *ci = req->context;
 922	unsigned long flags;
 923
 
 
 
 924	if (ci->setaddr) {
 925		hw_usb_set_address(ci, ci->address);
 926		ci->setaddr = false;
 927		if (ci->address)
 928			usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
 929	}
 930
 931	spin_lock_irqsave(&ci->lock, flags);
 932	if (ci->test_mode)
 933		hw_port_test_set(ci, ci->test_mode);
 934	spin_unlock_irqrestore(&ci->lock, flags);
 935}
 936
 937/**
 938 * isr_setup_status_phase: queues the status phase of a setup transation
 939 * @ci: ci struct
 940 *
 941 * This function returns an error code
 942 */
 943static int isr_setup_status_phase(struct ci_hdrc *ci)
 944{
 945	int retval;
 946	struct ci_hw_ep *hwep;
 947
 948	/*
 949	 * Unexpected USB controller behavior, caused by bad signal integrity
 950	 * or ground reference problems, can lead to isr_setup_status_phase
 951	 * being called with ci->status equal to NULL.
 952	 * If this situation occurs, you should review your USB hardware design.
 953	 */
 954	if (WARN_ON_ONCE(!ci->status))
 955		return -EPIPE;
 956
 957	hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
 958	ci->status->context = ci;
 959	ci->status->complete = isr_setup_status_complete;
 960
 961	retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
 962
 963	return retval;
 964}
 965
 966/**
 967 * isr_tr_complete_low: transaction complete low level handler
 968 * @hwep: endpoint
 969 *
 970 * This function returns an error code
 971 * Caller must hold lock
 972 */
 973static int isr_tr_complete_low(struct ci_hw_ep *hwep)
 974__releases(hwep->lock)
 975__acquires(hwep->lock)
 976{
 977	struct ci_hw_req *hwreq, *hwreqtemp;
 978	struct ci_hw_ep *hweptemp = hwep;
 979	int retval = 0;
 980
 981	list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
 982			queue) {
 983		retval = _hardware_dequeue(hwep, hwreq);
 984		if (retval < 0)
 985			break;
 986		list_del_init(&hwreq->queue);
 987		if (hwreq->req.complete != NULL) {
 988			spin_unlock(hwep->lock);
 989			if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
 990					hwreq->req.length)
 991				hweptemp = hwep->ci->ep0in;
 992			usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
 993			spin_lock(hwep->lock);
 994		}
 995	}
 996
 997	if (retval == -EBUSY)
 998		retval = 0;
 999
1000	return retval;
1001}
1002
1003static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1004{
1005	dev_warn(&ci->gadget.dev,
1006		"connect the device to an alternate port if you want HNP\n");
1007	return isr_setup_status_phase(ci);
1008}
1009
1010/**
1011 * isr_setup_packet_handler: setup packet handler
1012 * @ci: UDC descriptor
1013 *
1014 * This function handles setup packet 
1015 */
1016static void isr_setup_packet_handler(struct ci_hdrc *ci)
1017__releases(ci->lock)
1018__acquires(ci->lock)
1019{
1020	struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1021	struct usb_ctrlrequest req;
1022	int type, num, dir, err = -EINVAL;
1023	u8 tmode = 0;
1024
1025	/*
1026	 * Flush data and handshake transactions of previous
1027	 * setup packet.
1028	 */
1029	_ep_nuke(ci->ep0out);
1030	_ep_nuke(ci->ep0in);
1031
1032	/* read_setup_packet */
1033	do {
1034		hw_test_and_set_setup_guard(ci);
1035		memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1036	} while (!hw_test_and_clear_setup_guard(ci));
1037
1038	type = req.bRequestType;
1039
1040	ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1041
1042	switch (req.bRequest) {
1043	case USB_REQ_CLEAR_FEATURE:
1044		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1045				le16_to_cpu(req.wValue) ==
1046				USB_ENDPOINT_HALT) {
1047			if (req.wLength != 0)
1048				break;
1049			num  = le16_to_cpu(req.wIndex);
1050			dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1051			num &= USB_ENDPOINT_NUMBER_MASK;
1052			if (dir == TX)
1053				num += ci->hw_ep_max / 2;
1054			if (!ci->ci_hw_ep[num].wedge) {
1055				spin_unlock(&ci->lock);
1056				err = usb_ep_clear_halt(
1057					&ci->ci_hw_ep[num].ep);
1058				spin_lock(&ci->lock);
1059				if (err)
1060					break;
1061			}
1062			err = isr_setup_status_phase(ci);
1063		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1064				le16_to_cpu(req.wValue) ==
1065				USB_DEVICE_REMOTE_WAKEUP) {
1066			if (req.wLength != 0)
1067				break;
1068			ci->remote_wakeup = 0;
1069			err = isr_setup_status_phase(ci);
1070		} else {
1071			goto delegate;
1072		}
1073		break;
1074	case USB_REQ_GET_STATUS:
1075		if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1076			le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1077		    type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1078		    type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1079			goto delegate;
1080		if (le16_to_cpu(req.wLength) != 2 ||
1081		    le16_to_cpu(req.wValue)  != 0)
1082			break;
1083		err = isr_get_status_response(ci, &req);
1084		break;
1085	case USB_REQ_SET_ADDRESS:
1086		if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1087			goto delegate;
1088		if (le16_to_cpu(req.wLength) != 0 ||
1089		    le16_to_cpu(req.wIndex)  != 0)
1090			break;
1091		ci->address = (u8)le16_to_cpu(req.wValue);
1092		ci->setaddr = true;
1093		err = isr_setup_status_phase(ci);
1094		break;
1095	case USB_REQ_SET_FEATURE:
1096		if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1097				le16_to_cpu(req.wValue) ==
1098				USB_ENDPOINT_HALT) {
1099			if (req.wLength != 0)
1100				break;
1101			num  = le16_to_cpu(req.wIndex);
1102			dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1103			num &= USB_ENDPOINT_NUMBER_MASK;
1104			if (dir == TX)
1105				num += ci->hw_ep_max / 2;
1106
1107			spin_unlock(&ci->lock);
1108			err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1109			spin_lock(&ci->lock);
1110			if (!err)
1111				isr_setup_status_phase(ci);
1112		} else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1113			if (req.wLength != 0)
1114				break;
1115			switch (le16_to_cpu(req.wValue)) {
1116			case USB_DEVICE_REMOTE_WAKEUP:
1117				ci->remote_wakeup = 1;
1118				err = isr_setup_status_phase(ci);
1119				break;
1120			case USB_DEVICE_TEST_MODE:
1121				tmode = le16_to_cpu(req.wIndex) >> 8;
1122				switch (tmode) {
1123				case TEST_J:
1124				case TEST_K:
1125				case TEST_SE0_NAK:
1126				case TEST_PACKET:
1127				case TEST_FORCE_EN:
1128					ci->test_mode = tmode;
1129					err = isr_setup_status_phase(
1130							ci);
1131					break;
1132				default:
1133					break;
1134				}
1135				break;
1136			case USB_DEVICE_B_HNP_ENABLE:
1137				if (ci_otg_is_fsm_mode(ci)) {
1138					ci->gadget.b_hnp_enable = 1;
1139					err = isr_setup_status_phase(
1140							ci);
1141				}
1142				break;
1143			case USB_DEVICE_A_ALT_HNP_SUPPORT:
1144				if (ci_otg_is_fsm_mode(ci))
1145					err = otg_a_alt_hnp_support(ci);
1146				break;
1147			case USB_DEVICE_A_HNP_SUPPORT:
1148				if (ci_otg_is_fsm_mode(ci)) {
1149					ci->gadget.a_hnp_support = 1;
1150					err = isr_setup_status_phase(
1151							ci);
1152				}
1153				break;
1154			default:
1155				goto delegate;
1156			}
1157		} else {
1158			goto delegate;
1159		}
1160		break;
1161	default:
1162delegate:
1163		if (req.wLength == 0)   /* no data phase */
1164			ci->ep0_dir = TX;
1165
1166		spin_unlock(&ci->lock);
1167		err = ci->driver->setup(&ci->gadget, &req);
1168		spin_lock(&ci->lock);
1169		break;
1170	}
1171
1172	if (err < 0) {
1173		spin_unlock(&ci->lock);
1174		if (_ep_set_halt(&hwep->ep, 1, false))
1175			dev_err(ci->dev, "error: _ep_set_halt\n");
1176		spin_lock(&ci->lock);
1177	}
1178}
1179
1180/**
1181 * isr_tr_complete_handler: transaction complete interrupt handler
1182 * @ci: UDC descriptor
1183 *
1184 * This function handles traffic events
1185 */
1186static void isr_tr_complete_handler(struct ci_hdrc *ci)
1187__releases(ci->lock)
1188__acquires(ci->lock)
1189{
1190	unsigned i;
1191	int err;
1192
1193	for (i = 0; i < ci->hw_ep_max; i++) {
1194		struct ci_hw_ep *hwep  = &ci->ci_hw_ep[i];
1195
1196		if (hwep->ep.desc == NULL)
1197			continue;   /* not configured */
1198
1199		if (hw_test_and_clear_complete(ci, i)) {
1200			err = isr_tr_complete_low(hwep);
1201			if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1202				if (err > 0)   /* needs status phase */
1203					err = isr_setup_status_phase(ci);
1204				if (err < 0) {
1205					spin_unlock(&ci->lock);
1206					if (_ep_set_halt(&hwep->ep, 1, false))
1207						dev_err(ci->dev,
1208						"error: _ep_set_halt\n");
1209					spin_lock(&ci->lock);
1210				}
1211			}
1212		}
1213
1214		/* Only handle setup packet below */
1215		if (i == 0 &&
1216			hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1217			isr_setup_packet_handler(ci);
1218	}
1219}
1220
1221/******************************************************************************
1222 * ENDPT block
1223 *****************************************************************************/
1224/**
1225 * ep_enable: configure endpoint, making it usable
1226 *
1227 * Check usb_ep_enable() at "usb_gadget.h" for details
1228 */
1229static int ep_enable(struct usb_ep *ep,
1230		     const struct usb_endpoint_descriptor *desc)
1231{
1232	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1233	int retval = 0;
1234	unsigned long flags;
1235	u32 cap = 0;
1236
1237	if (ep == NULL || desc == NULL)
1238		return -EINVAL;
1239
1240	spin_lock_irqsave(hwep->lock, flags);
1241
1242	/* only internal SW should enable ctrl endpts */
1243
1244	if (!list_empty(&hwep->qh.queue)) {
1245		dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1246		spin_unlock_irqrestore(hwep->lock, flags);
1247		return -EBUSY;
1248	}
1249
1250	hwep->ep.desc = desc;
1251
1252	hwep->dir  = usb_endpoint_dir_in(desc) ? TX : RX;
1253	hwep->num  = usb_endpoint_num(desc);
1254	hwep->type = usb_endpoint_type(desc);
1255
1256	hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1257	hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1258
1259	if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1260		cap |= QH_IOS;
1261
1262	cap |= QH_ZLT;
1263	cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1264	/*
1265	 * For ISO-TX, we set mult at QH as the largest value, and use
1266	 * MultO at TD as real mult value.
1267	 */
1268	if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1269		cap |= 3 << __ffs(QH_MULT);
1270
1271	hwep->qh.ptr->cap = cpu_to_le32(cap);
1272
1273	hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE);   /* needed? */
1274
1275	if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1276		dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1277		retval = -EINVAL;
1278	}
1279
1280	/*
1281	 * Enable endpoints in the HW other than ep0 as ep0
1282	 * is always enabled
1283	 */
1284	if (hwep->num)
1285		retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1286				       hwep->type);
1287
1288	spin_unlock_irqrestore(hwep->lock, flags);
1289	return retval;
1290}
1291
1292/**
1293 * ep_disable: endpoint is no longer usable
1294 *
1295 * Check usb_ep_disable() at "usb_gadget.h" for details
1296 */
1297static int ep_disable(struct usb_ep *ep)
1298{
1299	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1300	int direction, retval = 0;
1301	unsigned long flags;
1302
1303	if (ep == NULL)
1304		return -EINVAL;
1305	else if (hwep->ep.desc == NULL)
1306		return -EBUSY;
1307
1308	spin_lock_irqsave(hwep->lock, flags);
 
 
 
 
1309
1310	/* only internal SW should disable ctrl endpts */
1311
1312	direction = hwep->dir;
1313	do {
1314		retval |= _ep_nuke(hwep);
1315		retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1316
1317		if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1318			hwep->dir = (hwep->dir == TX) ? RX : TX;
1319
1320	} while (hwep->dir != direction);
1321
1322	hwep->ep.desc = NULL;
1323
1324	spin_unlock_irqrestore(hwep->lock, flags);
1325	return retval;
1326}
1327
1328/**
1329 * ep_alloc_request: allocate a request object to use with this endpoint
1330 *
1331 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1332 */
1333static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1334{
1335	struct ci_hw_req *hwreq = NULL;
1336
1337	if (ep == NULL)
1338		return NULL;
1339
1340	hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1341	if (hwreq != NULL) {
1342		INIT_LIST_HEAD(&hwreq->queue);
1343		INIT_LIST_HEAD(&hwreq->tds);
1344	}
1345
1346	return (hwreq == NULL) ? NULL : &hwreq->req;
1347}
1348
1349/**
1350 * ep_free_request: frees a request object
1351 *
1352 * Check usb_ep_free_request() at "usb_gadget.h" for details
1353 */
1354static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1355{
1356	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1357	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1358	struct td_node *node, *tmpnode;
1359	unsigned long flags;
1360
1361	if (ep == NULL || req == NULL) {
1362		return;
1363	} else if (!list_empty(&hwreq->queue)) {
1364		dev_err(hwep->ci->dev, "freeing queued request\n");
1365		return;
1366	}
1367
1368	spin_lock_irqsave(hwep->lock, flags);
1369
1370	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1371		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1372		list_del_init(&node->td);
1373		node->ptr = NULL;
1374		kfree(node);
1375	}
1376
1377	kfree(hwreq);
1378
1379	spin_unlock_irqrestore(hwep->lock, flags);
1380}
1381
1382/**
1383 * ep_queue: queues (submits) an I/O request to an endpoint
1384 *
1385 * Check usb_ep_queue()* at usb_gadget.h" for details
1386 */
1387static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1388		    gfp_t __maybe_unused gfp_flags)
1389{
1390	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1391	int retval = 0;
1392	unsigned long flags;
1393
1394	if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1395		return -EINVAL;
1396
1397	spin_lock_irqsave(hwep->lock, flags);
 
 
 
 
1398	retval = _ep_queue(ep, req, gfp_flags);
1399	spin_unlock_irqrestore(hwep->lock, flags);
1400	return retval;
1401}
1402
1403/**
1404 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1405 *
1406 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1407 */
1408static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1409{
1410	struct ci_hw_ep  *hwep  = container_of(ep,  struct ci_hw_ep, ep);
1411	struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1412	unsigned long flags;
1413	struct td_node *node, *tmpnode;
1414
1415	if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1416		hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1417		list_empty(&hwep->qh.queue))
1418		return -EINVAL;
1419
1420	spin_lock_irqsave(hwep->lock, flags);
1421
1422	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1423
1424	list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1425		dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1426		list_del(&node->td);
1427		kfree(node);
1428	}
1429
1430	/* pop request */
1431	list_del_init(&hwreq->queue);
1432
1433	usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1434
1435	req->status = -ECONNRESET;
1436
1437	if (hwreq->req.complete != NULL) {
1438		spin_unlock(hwep->lock);
1439		usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1440		spin_lock(hwep->lock);
1441	}
1442
1443	spin_unlock_irqrestore(hwep->lock, flags);
1444	return 0;
1445}
1446
1447/**
1448 * ep_set_halt: sets the endpoint halt feature
1449 *
1450 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1451 */
1452static int ep_set_halt(struct usb_ep *ep, int value)
1453{
1454	return _ep_set_halt(ep, value, true);
1455}
1456
1457/**
1458 * ep_set_wedge: sets the halt feature and ignores clear requests
1459 *
1460 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1461 */
1462static int ep_set_wedge(struct usb_ep *ep)
1463{
1464	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1465	unsigned long flags;
1466
1467	if (ep == NULL || hwep->ep.desc == NULL)
1468		return -EINVAL;
1469
1470	spin_lock_irqsave(hwep->lock, flags);
1471	hwep->wedge = 1;
1472	spin_unlock_irqrestore(hwep->lock, flags);
1473
1474	return usb_ep_set_halt(ep);
1475}
1476
1477/**
1478 * ep_fifo_flush: flushes contents of a fifo
1479 *
1480 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1481 */
1482static void ep_fifo_flush(struct usb_ep *ep)
1483{
1484	struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1485	unsigned long flags;
1486
1487	if (ep == NULL) {
1488		dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1489		return;
1490	}
1491
1492	spin_lock_irqsave(hwep->lock, flags);
 
 
 
 
1493
1494	hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1495
1496	spin_unlock_irqrestore(hwep->lock, flags);
1497}
1498
1499/**
1500 * Endpoint-specific part of the API to the USB controller hardware
1501 * Check "usb_gadget.h" for details
1502 */
1503static const struct usb_ep_ops usb_ep_ops = {
1504	.enable	       = ep_enable,
1505	.disable       = ep_disable,
1506	.alloc_request = ep_alloc_request,
1507	.free_request  = ep_free_request,
1508	.queue	       = ep_queue,
1509	.dequeue       = ep_dequeue,
1510	.set_halt      = ep_set_halt,
1511	.set_wedge     = ep_set_wedge,
1512	.fifo_flush    = ep_fifo_flush,
1513};
1514
1515/******************************************************************************
1516 * GADGET block
1517 *****************************************************************************/
1518static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 
1519{
1520	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1521	unsigned long flags;
1522	int gadget_ready = 0;
1523
1524	spin_lock_irqsave(&ci->lock, flags);
1525	ci->vbus_active = is_active;
1526	if (ci->driver)
1527		gadget_ready = 1;
1528	spin_unlock_irqrestore(&ci->lock, flags);
 
 
 
 
 
 
 
 
 
1529
1530	if (gadget_ready) {
1531		if (is_active) {
1532			pm_runtime_get_sync(&_gadget->dev);
1533			hw_device_reset(ci);
 
1534			hw_device_state(ci, ci->ep0out->qh.dma);
1535			usb_gadget_set_state(_gadget, USB_STATE_POWERED);
 
1536			usb_udc_vbus_handler(_gadget, true);
1537		} else {
1538			usb_udc_vbus_handler(_gadget, false);
1539			if (ci->driver)
1540				ci->driver->disconnect(&ci->gadget);
1541			hw_device_state(ci, 0);
1542			if (ci->platdata->notify_event)
1543				ci->platdata->notify_event(ci,
1544				CI_HDRC_CONTROLLER_STOPPED_EVENT);
1545			_gadget_stop_activity(&ci->gadget);
1546			pm_runtime_put_sync(&_gadget->dev);
1547			usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1548		}
 
 
 
 
 
 
 
 
 
 
 
1549	}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1550
1551	return 0;
1552}
1553
1554static int ci_udc_wakeup(struct usb_gadget *_gadget)
1555{
1556	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1557	unsigned long flags;
1558	int ret = 0;
1559
1560	spin_lock_irqsave(&ci->lock, flags);
 
 
 
 
1561	if (!ci->remote_wakeup) {
1562		ret = -EOPNOTSUPP;
1563		goto out;
1564	}
1565	if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1566		ret = -EINVAL;
1567		goto out;
1568	}
1569	hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1570out:
1571	spin_unlock_irqrestore(&ci->lock, flags);
1572	return ret;
1573}
1574
1575static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1576{
1577	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1578
1579	if (ci->usb_phy)
1580		return usb_phy_set_power(ci->usb_phy, ma);
1581	return -ENOTSUPP;
1582}
1583
1584static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1585{
1586	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1587	struct ci_hw_ep *hwep = ci->ep0in;
1588	unsigned long flags;
1589
1590	spin_lock_irqsave(hwep->lock, flags);
1591	_gadget->is_selfpowered = (is_on != 0);
1592	spin_unlock_irqrestore(hwep->lock, flags);
1593
1594	return 0;
1595}
1596
1597/* Change Data+ pullup status
1598 * this func is used by usb_gadget_connect/disconnet
1599 */
1600static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1601{
1602	struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1603
1604	/*
1605	 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1606	 * and don't touch Data+ in host mode for dual role config.
1607	 */
1608	if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1609		return 0;
1610
1611	pm_runtime_get_sync(&ci->gadget.dev);
1612	if (is_on)
1613		hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1614	else
1615		hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1616	pm_runtime_put_sync(&ci->gadget.dev);
1617
1618	return 0;
1619}
1620
1621static int ci_udc_start(struct usb_gadget *gadget,
1622			 struct usb_gadget_driver *driver);
1623static int ci_udc_stop(struct usb_gadget *gadget);
1624/**
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1625 * Device operations part of the API to the USB controller hardware,
1626 * which don't involve endpoints (or i/o)
1627 * Check  "usb_gadget.h" for details
1628 */
1629static const struct usb_gadget_ops usb_gadget_ops = {
 
1630	.vbus_session	= ci_udc_vbus_session,
1631	.wakeup		= ci_udc_wakeup,
1632	.set_selfpowered	= ci_udc_selfpowered,
1633	.pullup		= ci_udc_pullup,
1634	.vbus_draw	= ci_udc_vbus_draw,
1635	.udc_start	= ci_udc_start,
1636	.udc_stop	= ci_udc_stop,
 
1637};
1638
1639static int init_eps(struct ci_hdrc *ci)
1640{
1641	int retval = 0, i, j;
1642
1643	for (i = 0; i < ci->hw_ep_max/2; i++)
1644		for (j = RX; j <= TX; j++) {
1645			int k = i + j * ci->hw_ep_max/2;
1646			struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1647
1648			scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1649					(j == TX)  ? "in" : "out");
1650
1651			hwep->ci          = ci;
1652			hwep->lock         = &ci->lock;
1653			hwep->td_pool      = ci->td_pool;
1654
1655			hwep->ep.name      = hwep->name;
1656			hwep->ep.ops       = &usb_ep_ops;
1657
1658			if (i == 0) {
1659				hwep->ep.caps.type_control = true;
1660			} else {
1661				hwep->ep.caps.type_iso = true;
1662				hwep->ep.caps.type_bulk = true;
1663				hwep->ep.caps.type_int = true;
1664			}
1665
1666			if (j == TX)
1667				hwep->ep.caps.dir_in = true;
1668			else
1669				hwep->ep.caps.dir_out = true;
1670
1671			/*
1672			 * for ep0: maxP defined in desc, for other
1673			 * eps, maxP is set by epautoconfig() called
1674			 * by gadget layer
1675			 */
1676			usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1677
1678			INIT_LIST_HEAD(&hwep->qh.queue);
1679			hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1680						       &hwep->qh.dma);
1681			if (hwep->qh.ptr == NULL)
1682				retval = -ENOMEM;
1683
1684			/*
1685			 * set up shorthands for ep0 out and in endpoints,
1686			 * don't add to gadget's ep_list
1687			 */
1688			if (i == 0) {
1689				if (j == RX)
1690					ci->ep0out = hwep;
1691				else
1692					ci->ep0in = hwep;
1693
1694				usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1695				continue;
1696			}
1697
1698			list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1699		}
1700
1701	return retval;
1702}
1703
1704static void destroy_eps(struct ci_hdrc *ci)
1705{
1706	int i;
1707
1708	for (i = 0; i < ci->hw_ep_max; i++) {
1709		struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1710
1711		if (hwep->pending_td)
1712			free_pending_td(hwep);
1713		dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1714	}
1715}
1716
1717/**
1718 * ci_udc_start: register a gadget driver
1719 * @gadget: our gadget
1720 * @driver: the driver being registered
1721 *
1722 * Interrupts are enabled here.
1723 */
1724static int ci_udc_start(struct usb_gadget *gadget,
1725			 struct usb_gadget_driver *driver)
1726{
1727	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1728	unsigned long flags;
1729	int retval = -ENOMEM;
1730
1731	if (driver->disconnect == NULL)
1732		return -EINVAL;
1733
1734
1735	ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1736	retval = usb_ep_enable(&ci->ep0out->ep);
1737	if (retval)
1738		return retval;
1739
1740	ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1741	retval = usb_ep_enable(&ci->ep0in->ep);
1742	if (retval)
1743		return retval;
1744
1745	ci->driver = driver;
1746
1747	/* Start otg fsm for B-device */
1748	if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1749		ci_hdrc_otg_fsm_start(ci);
1750		return retval;
1751	}
1752
1753	pm_runtime_get_sync(&ci->gadget.dev);
1754	if (ci->vbus_active) {
1755		spin_lock_irqsave(&ci->lock, flags);
1756		hw_device_reset(ci);
1757	} else {
1758		usb_udc_vbus_handler(&ci->gadget, false);
1759		pm_runtime_put_sync(&ci->gadget.dev);
1760		return retval;
1761	}
1762
1763	retval = hw_device_state(ci, ci->ep0out->qh.dma);
1764	spin_unlock_irqrestore(&ci->lock, flags);
1765	if (retval)
1766		pm_runtime_put_sync(&ci->gadget.dev);
1767
1768	return retval;
1769}
1770
1771static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1772{
1773	if (!ci_otg_is_fsm_mode(ci))
1774		return;
1775
1776	mutex_lock(&ci->fsm.lock);
1777	if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1778		ci->fsm.a_bidl_adis_tmout = 1;
1779		ci_hdrc_otg_fsm_start(ci);
1780	} else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1781		ci->fsm.protocol = PROTO_UNDEF;
1782		ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1783	}
1784	mutex_unlock(&ci->fsm.lock);
1785}
1786
1787/**
1788 * ci_udc_stop: unregister a gadget driver
1789 */
1790static int ci_udc_stop(struct usb_gadget *gadget)
1791{
1792	struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1793	unsigned long flags;
1794
1795	spin_lock_irqsave(&ci->lock, flags);
 
1796
1797	if (ci->vbus_active) {
1798		hw_device_state(ci, 0);
 
1799		if (ci->platdata->notify_event)
1800			ci->platdata->notify_event(ci,
1801			CI_HDRC_CONTROLLER_STOPPED_EVENT);
1802		spin_unlock_irqrestore(&ci->lock, flags);
1803		_gadget_stop_activity(&ci->gadget);
1804		spin_lock_irqsave(&ci->lock, flags);
1805		pm_runtime_put(&ci->gadget.dev);
1806	}
1807
1808	ci->driver = NULL;
1809	spin_unlock_irqrestore(&ci->lock, flags);
1810
1811	ci_udc_stop_for_otg_fsm(ci);
1812	return 0;
1813}
1814
1815/******************************************************************************
1816 * BUS block
1817 *****************************************************************************/
1818/**
1819 * udc_irq: ci interrupt handler
1820 *
1821 * This function returns IRQ_HANDLED if the IRQ has been handled
1822 * It locks access to registers
1823 */
1824static irqreturn_t udc_irq(struct ci_hdrc *ci)
1825{
1826	irqreturn_t retval;
1827	u32 intr;
1828
1829	if (ci == NULL)
1830		return IRQ_HANDLED;
1831
1832	spin_lock(&ci->lock);
1833
1834	if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1835		if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1836				USBMODE_CM_DC) {
1837			spin_unlock(&ci->lock);
1838			return IRQ_NONE;
1839		}
1840	}
1841	intr = hw_test_and_clear_intr_active(ci);
1842
1843	if (intr) {
1844		/* order defines priority - do NOT change it */
1845		if (USBi_URI & intr)
1846			isr_reset_handler(ci);
1847
1848		if (USBi_PCI & intr) {
1849			ci->gadget.speed = hw_port_is_high_speed(ci) ?
1850				USB_SPEED_HIGH : USB_SPEED_FULL;
1851			if (ci->suspended && ci->driver->resume) {
1852				spin_unlock(&ci->lock);
1853				ci->driver->resume(&ci->gadget);
1854				spin_lock(&ci->lock);
 
 
 
 
 
1855				ci->suspended = 0;
 
 
1856			}
1857		}
1858
1859		if (USBi_UI  & intr)
1860			isr_tr_complete_handler(ci);
1861
1862		if (USBi_SLI & intr) {
 
 
1863			if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1864			    ci->driver->suspend) {
1865				ci->suspended = 1;
1866				spin_unlock(&ci->lock);
1867				ci->driver->suspend(&ci->gadget);
1868				usb_gadget_set_state(&ci->gadget,
1869						USB_STATE_SUSPENDED);
1870				spin_lock(&ci->lock);
1871			}
 
 
1872		}
1873		retval = IRQ_HANDLED;
1874	} else {
1875		retval = IRQ_NONE;
1876	}
1877	spin_unlock(&ci->lock);
1878
1879	return retval;
1880}
1881
1882/**
1883 * udc_start: initialize gadget role
1884 * @ci: chipidea controller
1885 */
1886static int udc_start(struct ci_hdrc *ci)
1887{
1888	struct device *dev = ci->dev;
1889	struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1890	int retval = 0;
1891
1892	ci->gadget.ops          = &usb_gadget_ops;
1893	ci->gadget.speed        = USB_SPEED_UNKNOWN;
1894	ci->gadget.max_speed    = USB_SPEED_HIGH;
1895	ci->gadget.name         = ci->platdata->name;
1896	ci->gadget.otg_caps	= otg_caps;
 
 
 
 
 
1897
1898	if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1899						otg_caps->adp_support))
1900		ci->gadget.is_otg = 1;
1901
1902	INIT_LIST_HEAD(&ci->gadget.ep_list);
1903
1904	/* alloc resources */
1905	ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1906				       sizeof(struct ci_hw_qh),
1907				       64, CI_HDRC_PAGE_SIZE);
1908	if (ci->qh_pool == NULL)
1909		return -ENOMEM;
1910
1911	ci->td_pool = dma_pool_create("ci_hw_td", dev,
1912				       sizeof(struct ci_hw_td),
1913				       64, CI_HDRC_PAGE_SIZE);
1914	if (ci->td_pool == NULL) {
1915		retval = -ENOMEM;
1916		goto free_qh_pool;
1917	}
1918
1919	retval = init_eps(ci);
1920	if (retval)
1921		goto free_pools;
1922
1923	ci->gadget.ep0 = &ci->ep0in->ep;
1924
1925	retval = usb_add_gadget_udc(dev, &ci->gadget);
1926	if (retval)
1927		goto destroy_eps;
1928
1929	pm_runtime_no_callbacks(&ci->gadget.dev);
1930	pm_runtime_enable(&ci->gadget.dev);
1931
1932	return retval;
1933
1934destroy_eps:
1935	destroy_eps(ci);
1936free_pools:
1937	dma_pool_destroy(ci->td_pool);
1938free_qh_pool:
1939	dma_pool_destroy(ci->qh_pool);
1940	return retval;
1941}
1942
1943/**
1944 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1945 *
1946 * No interrupts active, the IRQ has been released
1947 */
1948void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1949{
1950	if (!ci->roles[CI_ROLE_GADGET])
1951		return;
1952
1953	usb_del_gadget_udc(&ci->gadget);
1954
1955	destroy_eps(ci);
1956
1957	dma_pool_destroy(ci->td_pool);
1958	dma_pool_destroy(ci->qh_pool);
1959}
1960
1961static int udc_id_switch_for_device(struct ci_hdrc *ci)
1962{
 
 
 
 
1963	if (ci->is_otg)
1964		/* Clear and enable BSV irq */
1965		hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1966					OTGSC_BSVIS | OTGSC_BSVIE);
1967
1968	return 0;
1969}
1970
1971static void udc_id_switch_for_host(struct ci_hdrc *ci)
1972{
1973	/*
1974	 * host doesn't care B_SESSION_VALID event
1975	 * so clear and disbale BSV irq
1976	 */
1977	if (ci->is_otg)
1978		hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1979}
1980
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1981/**
1982 * ci_hdrc_gadget_init - initialize device related bits
1983 * ci: the controller
1984 *
1985 * This function initializes the gadget, if the device is "device capable".
1986 */
1987int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1988{
1989	struct ci_role_driver *rdrv;
 
1990
1991	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1992		return -ENXIO;
1993
1994	rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
1995	if (!rdrv)
1996		return -ENOMEM;
1997
1998	rdrv->start	= udc_id_switch_for_device;
1999	rdrv->stop	= udc_id_switch_for_host;
 
 
 
 
2000	rdrv->irq	= udc_irq;
2001	rdrv->name	= "gadget";
2002	ci->roles[CI_ROLE_GADGET] = rdrv;
2003
2004	return udc_start(ci);
 
 
 
 
2005}