1/*
  2 * Oxford Semiconductor OXNAS DWMAC glue layer
  3 *
  4 * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
  5 * Copyright (C) 2014 Daniel Golle <daniel@makrotopia.org>
  6 * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
  7 * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
  8 *
  9 * This program is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License version 2 as
 11 * published by the Free Software Foundation.
 12 *
 13 * You should have received a copy of the GNU General Public License
 14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
 15 */
 16
 17#include <linux/device.h>
 18#include <linux/io.h>
 19#include <linux/module.h>
 20#include <linux/of.h>
 21#include <linux/platform_device.h>
 22#include <linux/regmap.h>
 23#include <linux/mfd/syscon.h>
 24#include <linux/stmmac.h>
 25
 26#include "stmmac_platform.h"
 27
 28/* System Control regmap offsets */
 29#define OXNAS_DWMAC_CTRL_REGOFFSET	0x78
 30#define OXNAS_DWMAC_DELAY_REGOFFSET	0x100
 31
 32/* Control Register */
 33#define DWMAC_CKEN_RX_IN        14
 34#define DWMAC_CKEN_RXN_OUT      13
 35#define DWMAC_CKEN_RX_OUT       12
 36#define DWMAC_CKEN_TX_IN        10
 37#define DWMAC_CKEN_TXN_OUT      9
 38#define DWMAC_CKEN_TX_OUT       8
 39#define DWMAC_RX_SOURCE         7
 40#define DWMAC_TX_SOURCE         6
 41#define DWMAC_LOW_TX_SOURCE     4
 42#define DWMAC_AUTO_TX_SOURCE    3
 43#define DWMAC_RGMII             2
 44#define DWMAC_SIMPLE_MUX        1
 45#define DWMAC_CKEN_GTX          0
 46
 47/* Delay register */
 48#define DWMAC_TX_VARDELAY_SHIFT		0
 49#define DWMAC_TXN_VARDELAY_SHIFT	8
 50#define DWMAC_RX_VARDELAY_SHIFT		16
 51#define DWMAC_RXN_VARDELAY_SHIFT	24
 52#define DWMAC_TX_VARDELAY(d)		((d) << DWMAC_TX_VARDELAY_SHIFT)
 53#define DWMAC_TXN_VARDELAY(d)		((d) << DWMAC_TXN_VARDELAY_SHIFT)
 54#define DWMAC_RX_VARDELAY(d)		((d) << DWMAC_RX_VARDELAY_SHIFT)
 55#define DWMAC_RXN_VARDELAY(d)		((d) << DWMAC_RXN_VARDELAY_SHIFT)
 56
 57struct oxnas_dwmac {
 58	struct device	*dev;
 59	struct clk	*clk;
 60	struct regmap	*regmap;
 61};
 62
 63static int oxnas_dwmac_init(struct platform_device *pdev, void *priv)
 64{
 65	struct oxnas_dwmac *dwmac = priv;
 66	unsigned int value;
 67	int ret;
 68
 69	/* Reset HW here before changing the glue configuration */
 70	ret = device_reset(dwmac->dev);
 71	if (ret)
 72		return ret;
 73
 74	ret = clk_prepare_enable(dwmac->clk);
 75	if (ret)
 76		return ret;
 77
 78	ret = regmap_read(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, &value);
 79	if (ret < 0) {
 80		clk_disable_unprepare(dwmac->clk);
 81		return ret;
 82	}
 83
 84	/* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
 85	value |= BIT(DWMAC_CKEN_GTX)		|
 86		 /* Use simple mux for 25/125 Mhz clock switching */
 87		 BIT(DWMAC_SIMPLE_MUX)		|
 88		 /* set auto switch tx clock source */
 89		 BIT(DWMAC_AUTO_TX_SOURCE)	|
 90		 /* enable tx & rx vardelay */
 91		 BIT(DWMAC_CKEN_TX_OUT)		|
 92		 BIT(DWMAC_CKEN_TXN_OUT)	|
 93		 BIT(DWMAC_CKEN_TX_IN)		|
 94		 BIT(DWMAC_CKEN_RX_OUT)		|
 95		 BIT(DWMAC_CKEN_RXN_OUT)	|
 96		 BIT(DWMAC_CKEN_RX_IN);
 97	regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
 98
 99	/* set tx & rx vardelay */
100	value = DWMAC_TX_VARDELAY(4)	|
101		DWMAC_TXN_VARDELAY(2)	|
102		DWMAC_RX_VARDELAY(10)	|
103		DWMAC_RXN_VARDELAY(8);
104	regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
105
106	return 0;
107}
108
109static void oxnas_dwmac_exit(struct platform_device *pdev, void *priv)
110{
111	struct oxnas_dwmac *dwmac = priv;
112
113	clk_disable_unprepare(dwmac->clk);
114}
115
116static int oxnas_dwmac_probe(struct platform_device *pdev)
117{
118	struct plat_stmmacenet_data *plat_dat;
119	struct stmmac_resources stmmac_res;
120	struct oxnas_dwmac *dwmac;
121	int ret;
122
123	ret = stmmac_get_platform_resources(pdev, &stmmac_res);
124	if (ret)
125		return ret;
126
127	plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
128	if (IS_ERR(plat_dat))
129		return PTR_ERR(plat_dat);
130
131	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
132	if (!dwmac) {
133		ret = -ENOMEM;
134		goto err_remove_config_dt;
135	}
136
137	dwmac->dev = &pdev->dev;
138	plat_dat->bsp_priv = dwmac;
139	plat_dat->init = oxnas_dwmac_init;
140	plat_dat->exit = oxnas_dwmac_exit;
141
142	dwmac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
143							"oxsemi,sys-ctrl");
144	if (IS_ERR(dwmac->regmap)) {
145		dev_err(&pdev->dev, "failed to have sysctrl regmap\n");
146		ret = PTR_ERR(dwmac->regmap);
147		goto err_remove_config_dt;
148	}
149
150	dwmac->clk = devm_clk_get(&pdev->dev, "gmac");
151	if (IS_ERR(dwmac->clk)) {
152		ret = PTR_ERR(dwmac->clk);
153		goto err_remove_config_dt;
154	}
155
156	ret = oxnas_dwmac_init(pdev, plat_dat->bsp_priv);
157	if (ret)
158		goto err_remove_config_dt;
159
160	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
161	if (ret)
162		goto err_dwmac_exit;
163
164
165	return 0;
166
167err_dwmac_exit:
168	oxnas_dwmac_exit(pdev, plat_dat->bsp_priv);
169err_remove_config_dt:
170	stmmac_remove_config_dt(pdev, plat_dat);
171
172	return ret;
173}
174
175static const struct of_device_id oxnas_dwmac_match[] = {
176	{ .compatible = "oxsemi,ox820-dwmac" },
177	{ }
178};
179MODULE_DEVICE_TABLE(of, oxnas_dwmac_match);
180
181static struct platform_driver oxnas_dwmac_driver = {
182	.probe  = oxnas_dwmac_probe,
183	.remove = stmmac_pltfr_remove,
184	.driver = {
185		.name           = "oxnas-dwmac",
186		.pm		= &stmmac_pltfr_pm_ops,
187		.of_match_table = oxnas_dwmac_match,
188	},
189};
190module_platform_driver(oxnas_dwmac_driver);
191
192MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
193MODULE_DESCRIPTION("Oxford Semiconductor OXNAS DWMAC glue layer");
194MODULE_LICENSE("GPL v2");