1/*
  2 * Atmel Nand Flash Controller (NFC) - System peripherals regsters.
  3 * Based on SAMA5D3 datasheet.
  4 *
  5 * © Copyright 2013 Atmel Corporation.
  6 *
  7 * This program is free software; you can redistribute it and/or modify it
  8 * under the terms of the GNU General Public License as published by the
  9 * Free Software Foundation; either version 2 of the License, or (at your
 10 * option) any later version.
 11 */
 12
 13#ifndef ATMEL_NAND_NFC_H
 14#define ATMEL_NAND_NFC_H
 15
 16/*
 17 * HSMC NFC registers
 18 */
 19#define ATMEL_HSMC_NFC_CFG	0x00		/* NFC Configuration Register */
 20#define		NFC_CFG_PAGESIZE	(7 << 0)
 21#define			NFC_CFG_PAGESIZE_512	(0 << 0)
 22#define			NFC_CFG_PAGESIZE_1024	(1 << 0)
 23#define			NFC_CFG_PAGESIZE_2048	(2 << 0)
 24#define			NFC_CFG_PAGESIZE_4096	(3 << 0)
 25#define			NFC_CFG_PAGESIZE_8192	(4 << 0)
 26#define		NFC_CFG_WSPARE		(1 << 8)
 27#define		NFC_CFG_RSPARE		(1 << 9)
 28#define		NFC_CFG_NFC_DTOCYC	(0xf << 16)
 29#define		NFC_CFG_NFC_DTOMUL	(0x7 << 20)
 30#define		NFC_CFG_NFC_SPARESIZE	(0x7f << 24)
 31#define		NFC_CFG_NFC_SPARESIZE_BIT_POS	24
 32
 33#define ATMEL_HSMC_NFC_CTRL	0x04		/* NFC Control Register */
 34#define		NFC_CTRL_ENABLE		(1 << 0)
 35#define		NFC_CTRL_DISABLE	(1 << 1)
 36
 37#define ATMEL_HSMC_NFC_SR	0x08		/* NFC Status Register */
 38#define		NFC_SR_BUSY		(1 << 8)
 39#define		NFC_SR_XFR_DONE		(1 << 16)
 40#define		NFC_SR_CMD_DONE		(1 << 17)
 41#define		NFC_SR_DTOE		(1 << 20)
 42#define		NFC_SR_UNDEF		(1 << 21)
 43#define		NFC_SR_AWB		(1 << 22)
 44#define		NFC_SR_ASE		(1 << 23)
 45#define		NFC_SR_RB_EDGE		(1 << 24)
 46
 47#define ATMEL_HSMC_NFC_IER	0x0c
 48#define ATMEL_HSMC_NFC_IDR	0x10
 49#define ATMEL_HSMC_NFC_IMR	0x14
 50#define ATMEL_HSMC_NFC_CYCLE0	0x18		/* NFC Address Cycle Zero */
 51#define		ATMEL_HSMC_NFC_ADDR_CYCLE0	(0xff)
 52
 53#define ATMEL_HSMC_NFC_BANK	0x1c		/* NFC Bank Register */
 54#define		ATMEL_HSMC_NFC_BANK0		(0 << 0)
 55#define		ATMEL_HSMC_NFC_BANK1		(1 << 0)
 56
 57#define nfc_writel(addr, reg, value) \
 58	writel((value), (addr) + ATMEL_HSMC_NFC_##reg)
 59
 60#define nfc_readl(addr, reg) \
 61	readl_relaxed((addr) + ATMEL_HSMC_NFC_##reg)
 62
 63/*
 64 * NFC Address Command definitions
 65 */
 66#define NFCADDR_CMD_CMD1	(0xff << 2)	/* Command for Cycle 1 */
 67#define NFCADDR_CMD_CMD1_BIT_POS	2
 68#define NFCADDR_CMD_CMD2	(0xff << 10)	/* Command for Cycle 2 */
 69#define NFCADDR_CMD_CMD2_BIT_POS	10
 70#define NFCADDR_CMD_VCMD2	(0x1 << 18)	/* Valid Cycle 2 Command */
 71#define NFCADDR_CMD_ACYCLE	(0x7 << 19)	/* Number of Address required */
 72#define		NFCADDR_CMD_ACYCLE_NONE		(0x0 << 19)
 73#define		NFCADDR_CMD_ACYCLE_1		(0x1 << 19)
 74#define		NFCADDR_CMD_ACYCLE_2		(0x2 << 19)
 75#define		NFCADDR_CMD_ACYCLE_3		(0x3 << 19)
 76#define		NFCADDR_CMD_ACYCLE_4		(0x4 << 19)
 77#define		NFCADDR_CMD_ACYCLE_5		(0x5 << 19)
 78#define NFCADDR_CMD_ACYCLE_BIT_POS	19
 79#define NFCADDR_CMD_CSID	(0x7 << 22)	/* Chip Select Identifier */
 80#define		NFCADDR_CMD_CSID_0		(0x0 << 22)
 81#define		NFCADDR_CMD_CSID_1		(0x1 << 22)
 82#define		NFCADDR_CMD_CSID_2		(0x2 << 22)
 83#define		NFCADDR_CMD_CSID_3		(0x3 << 22)
 84#define		NFCADDR_CMD_CSID_4		(0x4 << 22)
 85#define		NFCADDR_CMD_CSID_5		(0x5 << 22)
 86#define		NFCADDR_CMD_CSID_6		(0x6 << 22)
 87#define		NFCADDR_CMD_CSID_7		(0x7 << 22)
 88#define NFCADDR_CMD_DATAEN	(0x1 << 25)	/* Data Transfer Enable */
 89#define NFCADDR_CMD_DATADIS	(0x0 << 25)	/* Data Transfer Disable */
 90#define NFCADDR_CMD_NFCRD	(0x0 << 26)	/* NFC Read Enable */
 91#define NFCADDR_CMD_NFCWR	(0x1 << 26)	/* NFC Write Enable */
 92#define NFCADDR_CMD_NFCBUSY	(0x1 << 27)	/* NFC Busy */
 93
 94#define nfc_cmd_addr1234_writel(cmd, addr1234, nfc_base) \
 95	writel((addr1234), (cmd) + nfc_base)
 96
 97#define nfc_cmd_readl(bitstatus, nfc_base) \
 98	readl_relaxed((bitstatus) + nfc_base)
 99
100#define NFC_TIME_OUT_MS		100
101#define	NFC_SRAM_BANK1_OFFSET	0x1200
102
103#endif