Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2016 HGST, a Western Digital Company.
4 */
5#include <linux/memremap.h>
6#include <linux/moduleparam.h>
7#include <linux/slab.h>
8#include <linux/pci-p2pdma.h>
9#include <rdma/mr_pool.h>
10#include <rdma/rw.h>
11
12enum {
13 RDMA_RW_SINGLE_WR,
14 RDMA_RW_MULTI_WR,
15 RDMA_RW_MR,
16 RDMA_RW_SIG_MR,
17};
18
19static bool rdma_rw_force_mr;
20module_param_named(force_mr, rdma_rw_force_mr, bool, 0);
21MODULE_PARM_DESC(force_mr, "Force usage of MRs for RDMA READ/WRITE operations");
22
23/*
24 * Report whether memory registration should be used. Memory registration must
25 * be used for iWarp devices because of iWARP-specific limitations. Memory
26 * registration is also enabled if registering memory might yield better
27 * performance than using multiple SGE entries, see rdma_rw_io_needs_mr()
28 */
29static inline bool rdma_rw_can_use_mr(struct ib_device *dev, u32 port_num)
30{
31 if (rdma_protocol_iwarp(dev, port_num))
32 return true;
33 if (dev->attrs.max_sgl_rd)
34 return true;
35 if (unlikely(rdma_rw_force_mr))
36 return true;
37 return false;
38}
39
40/*
41 * Check if the device will use memory registration for this RW operation.
42 * For RDMA READs we must use MRs on iWarp and can optionally use them as an
43 * optimization otherwise. Additionally we have a debug option to force usage
44 * of MRs to help testing this code path.
45 */
46static inline bool rdma_rw_io_needs_mr(struct ib_device *dev, u32 port_num,
47 enum dma_data_direction dir, int dma_nents)
48{
49 if (dir == DMA_FROM_DEVICE) {
50 if (rdma_protocol_iwarp(dev, port_num))
51 return true;
52 if (dev->attrs.max_sgl_rd && dma_nents > dev->attrs.max_sgl_rd)
53 return true;
54 }
55 if (unlikely(rdma_rw_force_mr))
56 return true;
57 return false;
58}
59
60static inline u32 rdma_rw_fr_page_list_len(struct ib_device *dev,
61 bool pi_support)
62{
63 u32 max_pages;
64
65 if (pi_support)
66 max_pages = dev->attrs.max_pi_fast_reg_page_list_len;
67 else
68 max_pages = dev->attrs.max_fast_reg_page_list_len;
69
70 /* arbitrary limit to avoid allocating gigantic resources */
71 return min_t(u32, max_pages, 256);
72}
73
74static inline int rdma_rw_inv_key(struct rdma_rw_reg_ctx *reg)
75{
76 int count = 0;
77
78 if (reg->mr->need_inval) {
79 reg->inv_wr.opcode = IB_WR_LOCAL_INV;
80 reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey;
81 reg->inv_wr.next = ®->reg_wr.wr;
82 count++;
83 } else {
84 reg->inv_wr.next = NULL;
85 }
86
87 return count;
88}
89
90/* Caller must have zero-initialized *reg. */
91static int rdma_rw_init_one_mr(struct ib_qp *qp, u32 port_num,
92 struct rdma_rw_reg_ctx *reg, struct scatterlist *sg,
93 u32 sg_cnt, u32 offset)
94{
95 u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
96 qp->integrity_en);
97 u32 nents = min(sg_cnt, pages_per_mr);
98 int count = 0, ret;
99
100 reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs);
101 if (!reg->mr)
102 return -EAGAIN;
103
104 count += rdma_rw_inv_key(reg);
105
106 ret = ib_map_mr_sg(reg->mr, sg, nents, &offset, PAGE_SIZE);
107 if (ret < 0 || ret < nents) {
108 ib_mr_pool_put(qp, &qp->rdma_mrs, reg->mr);
109 return -EINVAL;
110 }
111
112 reg->reg_wr.wr.opcode = IB_WR_REG_MR;
113 reg->reg_wr.mr = reg->mr;
114 reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
115 if (rdma_protocol_iwarp(qp->device, port_num))
116 reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
117 count++;
118
119 reg->sge.addr = reg->mr->iova;
120 reg->sge.length = reg->mr->length;
121 return count;
122}
123
124static int rdma_rw_init_mr_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
125 u32 port_num, struct scatterlist *sg, u32 sg_cnt, u32 offset,
126 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
127{
128 struct rdma_rw_reg_ctx *prev = NULL;
129 u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
130 qp->integrity_en);
131 int i, j, ret = 0, count = 0;
132
133 ctx->nr_ops = DIV_ROUND_UP(sg_cnt, pages_per_mr);
134 ctx->reg = kcalloc(ctx->nr_ops, sizeof(*ctx->reg), GFP_KERNEL);
135 if (!ctx->reg) {
136 ret = -ENOMEM;
137 goto out;
138 }
139
140 for (i = 0; i < ctx->nr_ops; i++) {
141 struct rdma_rw_reg_ctx *reg = &ctx->reg[i];
142 u32 nents = min(sg_cnt, pages_per_mr);
143
144 ret = rdma_rw_init_one_mr(qp, port_num, reg, sg, sg_cnt,
145 offset);
146 if (ret < 0)
147 goto out_free;
148 count += ret;
149
150 if (prev) {
151 if (reg->mr->need_inval)
152 prev->wr.wr.next = ®->inv_wr;
153 else
154 prev->wr.wr.next = ®->reg_wr.wr;
155 }
156
157 reg->reg_wr.wr.next = ®->wr.wr;
158
159 reg->wr.wr.sg_list = ®->sge;
160 reg->wr.wr.num_sge = 1;
161 reg->wr.remote_addr = remote_addr;
162 reg->wr.rkey = rkey;
163 if (dir == DMA_TO_DEVICE) {
164 reg->wr.wr.opcode = IB_WR_RDMA_WRITE;
165 } else if (!rdma_cap_read_inv(qp->device, port_num)) {
166 reg->wr.wr.opcode = IB_WR_RDMA_READ;
167 } else {
168 reg->wr.wr.opcode = IB_WR_RDMA_READ_WITH_INV;
169 reg->wr.wr.ex.invalidate_rkey = reg->mr->lkey;
170 }
171 count++;
172
173 remote_addr += reg->sge.length;
174 sg_cnt -= nents;
175 for (j = 0; j < nents; j++)
176 sg = sg_next(sg);
177 prev = reg;
178 offset = 0;
179 }
180
181 if (prev)
182 prev->wr.wr.next = NULL;
183
184 ctx->type = RDMA_RW_MR;
185 return count;
186
187out_free:
188 while (--i >= 0)
189 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
190 kfree(ctx->reg);
191out:
192 return ret;
193}
194
195static int rdma_rw_init_map_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
196 struct scatterlist *sg, u32 sg_cnt, u32 offset,
197 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
198{
199 u32 max_sge = dir == DMA_TO_DEVICE ? qp->max_write_sge :
200 qp->max_read_sge;
201 struct ib_sge *sge;
202 u32 total_len = 0, i, j;
203
204 ctx->nr_ops = DIV_ROUND_UP(sg_cnt, max_sge);
205
206 ctx->map.sges = sge = kcalloc(sg_cnt, sizeof(*sge), GFP_KERNEL);
207 if (!ctx->map.sges)
208 goto out;
209
210 ctx->map.wrs = kcalloc(ctx->nr_ops, sizeof(*ctx->map.wrs), GFP_KERNEL);
211 if (!ctx->map.wrs)
212 goto out_free_sges;
213
214 for (i = 0; i < ctx->nr_ops; i++) {
215 struct ib_rdma_wr *rdma_wr = &ctx->map.wrs[i];
216 u32 nr_sge = min(sg_cnt, max_sge);
217
218 if (dir == DMA_TO_DEVICE)
219 rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
220 else
221 rdma_wr->wr.opcode = IB_WR_RDMA_READ;
222 rdma_wr->remote_addr = remote_addr + total_len;
223 rdma_wr->rkey = rkey;
224 rdma_wr->wr.num_sge = nr_sge;
225 rdma_wr->wr.sg_list = sge;
226
227 for (j = 0; j < nr_sge; j++, sg = sg_next(sg)) {
228 sge->addr = sg_dma_address(sg) + offset;
229 sge->length = sg_dma_len(sg) - offset;
230 sge->lkey = qp->pd->local_dma_lkey;
231
232 total_len += sge->length;
233 sge++;
234 sg_cnt--;
235 offset = 0;
236 }
237
238 rdma_wr->wr.next = i + 1 < ctx->nr_ops ?
239 &ctx->map.wrs[i + 1].wr : NULL;
240 }
241
242 ctx->type = RDMA_RW_MULTI_WR;
243 return ctx->nr_ops;
244
245out_free_sges:
246 kfree(ctx->map.sges);
247out:
248 return -ENOMEM;
249}
250
251static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
252 struct scatterlist *sg, u32 offset, u64 remote_addr, u32 rkey,
253 enum dma_data_direction dir)
254{
255 struct ib_rdma_wr *rdma_wr = &ctx->single.wr;
256
257 ctx->nr_ops = 1;
258
259 ctx->single.sge.lkey = qp->pd->local_dma_lkey;
260 ctx->single.sge.addr = sg_dma_address(sg) + offset;
261 ctx->single.sge.length = sg_dma_len(sg) - offset;
262
263 memset(rdma_wr, 0, sizeof(*rdma_wr));
264 if (dir == DMA_TO_DEVICE)
265 rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
266 else
267 rdma_wr->wr.opcode = IB_WR_RDMA_READ;
268 rdma_wr->wr.sg_list = &ctx->single.sge;
269 rdma_wr->wr.num_sge = 1;
270 rdma_wr->remote_addr = remote_addr;
271 rdma_wr->rkey = rkey;
272
273 ctx->type = RDMA_RW_SINGLE_WR;
274 return 1;
275}
276
277/**
278 * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context
279 * @ctx: context to initialize
280 * @qp: queue pair to operate on
281 * @port_num: port num to which the connection is bound
282 * @sg: scatterlist to READ/WRITE from/to
283 * @sg_cnt: number of entries in @sg
284 * @sg_offset: current byte offset into @sg
285 * @remote_addr:remote address to read/write (relative to @rkey)
286 * @rkey: remote key to operate on
287 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
288 *
289 * Returns the number of WQEs that will be needed on the workqueue if
290 * successful, or a negative error code.
291 */
292int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u32 port_num,
293 struct scatterlist *sg, u32 sg_cnt, u32 sg_offset,
294 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
295{
296 struct ib_device *dev = qp->pd->device;
297 struct sg_table sgt = {
298 .sgl = sg,
299 .orig_nents = sg_cnt,
300 };
301 int ret;
302
303 ret = ib_dma_map_sgtable_attrs(dev, &sgt, dir, 0);
304 if (ret)
305 return ret;
306 sg_cnt = sgt.nents;
307
308 /*
309 * Skip to the S/G entry that sg_offset falls into:
310 */
311 for (;;) {
312 u32 len = sg_dma_len(sg);
313
314 if (sg_offset < len)
315 break;
316
317 sg = sg_next(sg);
318 sg_offset -= len;
319 sg_cnt--;
320 }
321
322 ret = -EIO;
323 if (WARN_ON_ONCE(sg_cnt == 0))
324 goto out_unmap_sg;
325
326 if (rdma_rw_io_needs_mr(qp->device, port_num, dir, sg_cnt)) {
327 ret = rdma_rw_init_mr_wrs(ctx, qp, port_num, sg, sg_cnt,
328 sg_offset, remote_addr, rkey, dir);
329 } else if (sg_cnt > 1) {
330 ret = rdma_rw_init_map_wrs(ctx, qp, sg, sg_cnt, sg_offset,
331 remote_addr, rkey, dir);
332 } else {
333 ret = rdma_rw_init_single_wr(ctx, qp, sg, sg_offset,
334 remote_addr, rkey, dir);
335 }
336
337 if (ret < 0)
338 goto out_unmap_sg;
339 return ret;
340
341out_unmap_sg:
342 ib_dma_unmap_sgtable_attrs(dev, &sgt, dir, 0);
343 return ret;
344}
345EXPORT_SYMBOL(rdma_rw_ctx_init);
346
347/**
348 * rdma_rw_ctx_signature_init - initialize a RW context with signature offload
349 * @ctx: context to initialize
350 * @qp: queue pair to operate on
351 * @port_num: port num to which the connection is bound
352 * @sg: scatterlist to READ/WRITE from/to
353 * @sg_cnt: number of entries in @sg
354 * @prot_sg: scatterlist to READ/WRITE protection information from/to
355 * @prot_sg_cnt: number of entries in @prot_sg
356 * @sig_attrs: signature offloading algorithms
357 * @remote_addr:remote address to read/write (relative to @rkey)
358 * @rkey: remote key to operate on
359 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
360 *
361 * Returns the number of WQEs that will be needed on the workqueue if
362 * successful, or a negative error code.
363 */
364int rdma_rw_ctx_signature_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
365 u32 port_num, struct scatterlist *sg, u32 sg_cnt,
366 struct scatterlist *prot_sg, u32 prot_sg_cnt,
367 struct ib_sig_attrs *sig_attrs,
368 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
369{
370 struct ib_device *dev = qp->pd->device;
371 u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
372 qp->integrity_en);
373 struct sg_table sgt = {
374 .sgl = sg,
375 .orig_nents = sg_cnt,
376 };
377 struct sg_table prot_sgt = {
378 .sgl = prot_sg,
379 .orig_nents = prot_sg_cnt,
380 };
381 struct ib_rdma_wr *rdma_wr;
382 int count = 0, ret;
383
384 if (sg_cnt > pages_per_mr || prot_sg_cnt > pages_per_mr) {
385 pr_err("SG count too large: sg_cnt=%u, prot_sg_cnt=%u, pages_per_mr=%u\n",
386 sg_cnt, prot_sg_cnt, pages_per_mr);
387 return -EINVAL;
388 }
389
390 ret = ib_dma_map_sgtable_attrs(dev, &sgt, dir, 0);
391 if (ret)
392 return ret;
393
394 if (prot_sg_cnt) {
395 ret = ib_dma_map_sgtable_attrs(dev, &prot_sgt, dir, 0);
396 if (ret)
397 goto out_unmap_sg;
398 }
399
400 ctx->type = RDMA_RW_SIG_MR;
401 ctx->nr_ops = 1;
402 ctx->reg = kzalloc(sizeof(*ctx->reg), GFP_KERNEL);
403 if (!ctx->reg) {
404 ret = -ENOMEM;
405 goto out_unmap_prot_sg;
406 }
407
408 ctx->reg->mr = ib_mr_pool_get(qp, &qp->sig_mrs);
409 if (!ctx->reg->mr) {
410 ret = -EAGAIN;
411 goto out_free_ctx;
412 }
413
414 count += rdma_rw_inv_key(ctx->reg);
415
416 memcpy(ctx->reg->mr->sig_attrs, sig_attrs, sizeof(struct ib_sig_attrs));
417
418 ret = ib_map_mr_sg_pi(ctx->reg->mr, sg, sgt.nents, NULL, prot_sg,
419 prot_sgt.nents, NULL, SZ_4K);
420 if (unlikely(ret)) {
421 pr_err("failed to map PI sg (%u)\n",
422 sgt.nents + prot_sgt.nents);
423 goto out_destroy_sig_mr;
424 }
425
426 ctx->reg->reg_wr.wr.opcode = IB_WR_REG_MR_INTEGRITY;
427 ctx->reg->reg_wr.wr.wr_cqe = NULL;
428 ctx->reg->reg_wr.wr.num_sge = 0;
429 ctx->reg->reg_wr.wr.send_flags = 0;
430 ctx->reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
431 if (rdma_protocol_iwarp(qp->device, port_num))
432 ctx->reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
433 ctx->reg->reg_wr.mr = ctx->reg->mr;
434 ctx->reg->reg_wr.key = ctx->reg->mr->lkey;
435 count++;
436
437 ctx->reg->sge.addr = ctx->reg->mr->iova;
438 ctx->reg->sge.length = ctx->reg->mr->length;
439 if (sig_attrs->wire.sig_type == IB_SIG_TYPE_NONE)
440 ctx->reg->sge.length -= ctx->reg->mr->sig_attrs->meta_length;
441
442 rdma_wr = &ctx->reg->wr;
443 rdma_wr->wr.sg_list = &ctx->reg->sge;
444 rdma_wr->wr.num_sge = 1;
445 rdma_wr->remote_addr = remote_addr;
446 rdma_wr->rkey = rkey;
447 if (dir == DMA_TO_DEVICE)
448 rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
449 else
450 rdma_wr->wr.opcode = IB_WR_RDMA_READ;
451 ctx->reg->reg_wr.wr.next = &rdma_wr->wr;
452 count++;
453
454 return count;
455
456out_destroy_sig_mr:
457 ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr);
458out_free_ctx:
459 kfree(ctx->reg);
460out_unmap_prot_sg:
461 if (prot_sgt.nents)
462 ib_dma_unmap_sgtable_attrs(dev, &prot_sgt, dir, 0);
463out_unmap_sg:
464 ib_dma_unmap_sgtable_attrs(dev, &sgt, dir, 0);
465 return ret;
466}
467EXPORT_SYMBOL(rdma_rw_ctx_signature_init);
468
469/*
470 * Now that we are going to post the WRs we can update the lkey and need_inval
471 * state on the MRs. If we were doing this at init time, we would get double
472 * or missing invalidations if a context was initialized but not actually
473 * posted.
474 */
475static void rdma_rw_update_lkey(struct rdma_rw_reg_ctx *reg, bool need_inval)
476{
477 reg->mr->need_inval = need_inval;
478 ib_update_fast_reg_key(reg->mr, ib_inc_rkey(reg->mr->lkey));
479 reg->reg_wr.key = reg->mr->lkey;
480 reg->sge.lkey = reg->mr->lkey;
481}
482
483/**
484 * rdma_rw_ctx_wrs - return chain of WRs for a RDMA READ or WRITE operation
485 * @ctx: context to operate on
486 * @qp: queue pair to operate on
487 * @port_num: port num to which the connection is bound
488 * @cqe: completion queue entry for the last WR
489 * @chain_wr: WR to append to the posted chain
490 *
491 * Return the WR chain for the set of RDMA READ/WRITE operations described by
492 * @ctx, as well as any memory registration operations needed. If @chain_wr
493 * is non-NULL the WR it points to will be appended to the chain of WRs posted.
494 * If @chain_wr is not set @cqe must be set so that the caller gets a
495 * completion notification.
496 */
497struct ib_send_wr *rdma_rw_ctx_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
498 u32 port_num, struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
499{
500 struct ib_send_wr *first_wr, *last_wr;
501 int i;
502
503 switch (ctx->type) {
504 case RDMA_RW_SIG_MR:
505 case RDMA_RW_MR:
506 for (i = 0; i < ctx->nr_ops; i++) {
507 rdma_rw_update_lkey(&ctx->reg[i],
508 ctx->reg[i].wr.wr.opcode !=
509 IB_WR_RDMA_READ_WITH_INV);
510 }
511
512 if (ctx->reg[0].inv_wr.next)
513 first_wr = &ctx->reg[0].inv_wr;
514 else
515 first_wr = &ctx->reg[0].reg_wr.wr;
516 last_wr = &ctx->reg[ctx->nr_ops - 1].wr.wr;
517 break;
518 case RDMA_RW_MULTI_WR:
519 first_wr = &ctx->map.wrs[0].wr;
520 last_wr = &ctx->map.wrs[ctx->nr_ops - 1].wr;
521 break;
522 case RDMA_RW_SINGLE_WR:
523 first_wr = &ctx->single.wr.wr;
524 last_wr = &ctx->single.wr.wr;
525 break;
526 default:
527 BUG();
528 }
529
530 if (chain_wr) {
531 last_wr->next = chain_wr;
532 } else {
533 last_wr->wr_cqe = cqe;
534 last_wr->send_flags |= IB_SEND_SIGNALED;
535 }
536
537 return first_wr;
538}
539EXPORT_SYMBOL(rdma_rw_ctx_wrs);
540
541/**
542 * rdma_rw_ctx_post - post a RDMA READ or RDMA WRITE operation
543 * @ctx: context to operate on
544 * @qp: queue pair to operate on
545 * @port_num: port num to which the connection is bound
546 * @cqe: completion queue entry for the last WR
547 * @chain_wr: WR to append to the posted chain
548 *
549 * Post the set of RDMA READ/WRITE operations described by @ctx, as well as
550 * any memory registration operations needed. If @chain_wr is non-NULL the
551 * WR it points to will be appended to the chain of WRs posted. If @chain_wr
552 * is not set @cqe must be set so that the caller gets a completion
553 * notification.
554 */
555int rdma_rw_ctx_post(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u32 port_num,
556 struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
557{
558 struct ib_send_wr *first_wr;
559
560 first_wr = rdma_rw_ctx_wrs(ctx, qp, port_num, cqe, chain_wr);
561 return ib_post_send(qp, first_wr, NULL);
562}
563EXPORT_SYMBOL(rdma_rw_ctx_post);
564
565/**
566 * rdma_rw_ctx_destroy - release all resources allocated by rdma_rw_ctx_init
567 * @ctx: context to release
568 * @qp: queue pair to operate on
569 * @port_num: port num to which the connection is bound
570 * @sg: scatterlist that was used for the READ/WRITE
571 * @sg_cnt: number of entries in @sg
572 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
573 */
574void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
575 u32 port_num, struct scatterlist *sg, u32 sg_cnt,
576 enum dma_data_direction dir)
577{
578 int i;
579
580 switch (ctx->type) {
581 case RDMA_RW_MR:
582 for (i = 0; i < ctx->nr_ops; i++)
583 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
584 kfree(ctx->reg);
585 break;
586 case RDMA_RW_MULTI_WR:
587 kfree(ctx->map.wrs);
588 kfree(ctx->map.sges);
589 break;
590 case RDMA_RW_SINGLE_WR:
591 break;
592 default:
593 BUG();
594 break;
595 }
596
597 ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
598}
599EXPORT_SYMBOL(rdma_rw_ctx_destroy);
600
601/**
602 * rdma_rw_ctx_destroy_signature - release all resources allocated by
603 * rdma_rw_ctx_signature_init
604 * @ctx: context to release
605 * @qp: queue pair to operate on
606 * @port_num: port num to which the connection is bound
607 * @sg: scatterlist that was used for the READ/WRITE
608 * @sg_cnt: number of entries in @sg
609 * @prot_sg: scatterlist that was used for the READ/WRITE of the PI
610 * @prot_sg_cnt: number of entries in @prot_sg
611 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
612 */
613void rdma_rw_ctx_destroy_signature(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
614 u32 port_num, struct scatterlist *sg, u32 sg_cnt,
615 struct scatterlist *prot_sg, u32 prot_sg_cnt,
616 enum dma_data_direction dir)
617{
618 if (WARN_ON_ONCE(ctx->type != RDMA_RW_SIG_MR))
619 return;
620
621 ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr);
622 kfree(ctx->reg);
623
624 if (prot_sg_cnt)
625 ib_dma_unmap_sg(qp->pd->device, prot_sg, prot_sg_cnt, dir);
626 ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
627}
628EXPORT_SYMBOL(rdma_rw_ctx_destroy_signature);
629
630/**
631 * rdma_rw_mr_factor - return number of MRs required for a payload
632 * @device: device handling the connection
633 * @port_num: port num to which the connection is bound
634 * @maxpages: maximum payload pages per rdma_rw_ctx
635 *
636 * Returns the number of MRs the device requires to move @maxpayload
637 * bytes. The returned value is used during transport creation to
638 * compute max_rdma_ctxts and the size of the transport's Send and
639 * Send Completion Queues.
640 */
641unsigned int rdma_rw_mr_factor(struct ib_device *device, u32 port_num,
642 unsigned int maxpages)
643{
644 unsigned int mr_pages;
645
646 if (rdma_rw_can_use_mr(device, port_num))
647 mr_pages = rdma_rw_fr_page_list_len(device, false);
648 else
649 mr_pages = device->attrs.max_sge_rd;
650 return DIV_ROUND_UP(maxpages, mr_pages);
651}
652EXPORT_SYMBOL(rdma_rw_mr_factor);
653
654void rdma_rw_init_qp(struct ib_device *dev, struct ib_qp_init_attr *attr)
655{
656 u32 factor;
657
658 WARN_ON_ONCE(attr->port_num == 0);
659
660 /*
661 * Each context needs at least one RDMA READ or WRITE WR.
662 *
663 * For some hardware we might need more, eventually we should ask the
664 * HCA driver for a multiplier here.
665 */
666 factor = 1;
667
668 /*
669 * If the device needs MRs to perform RDMA READ or WRITE operations,
670 * we'll need two additional MRs for the registrations and the
671 * invalidation.
672 */
673 if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN ||
674 rdma_rw_can_use_mr(dev, attr->port_num))
675 factor += 2; /* inv + reg */
676
677 attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs;
678
679 /*
680 * But maybe we were just too high in the sky and the device doesn't
681 * even support all we need, and we'll have to live with what we get..
682 */
683 attr->cap.max_send_wr =
684 min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr);
685}
686
687int rdma_rw_init_mrs(struct ib_qp *qp, struct ib_qp_init_attr *attr)
688{
689 struct ib_device *dev = qp->pd->device;
690 u32 nr_mrs = 0, nr_sig_mrs = 0, max_num_sg = 0;
691 int ret = 0;
692
693 if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN) {
694 nr_sig_mrs = attr->cap.max_rdma_ctxs;
695 nr_mrs = attr->cap.max_rdma_ctxs;
696 max_num_sg = rdma_rw_fr_page_list_len(dev, true);
697 } else if (rdma_rw_can_use_mr(dev, attr->port_num)) {
698 nr_mrs = attr->cap.max_rdma_ctxs;
699 max_num_sg = rdma_rw_fr_page_list_len(dev, false);
700 }
701
702 if (nr_mrs) {
703 ret = ib_mr_pool_init(qp, &qp->rdma_mrs, nr_mrs,
704 IB_MR_TYPE_MEM_REG,
705 max_num_sg, 0);
706 if (ret) {
707 pr_err("%s: failed to allocated %u MRs\n",
708 __func__, nr_mrs);
709 return ret;
710 }
711 }
712
713 if (nr_sig_mrs) {
714 ret = ib_mr_pool_init(qp, &qp->sig_mrs, nr_sig_mrs,
715 IB_MR_TYPE_INTEGRITY, max_num_sg, max_num_sg);
716 if (ret) {
717 pr_err("%s: failed to allocated %u SIG MRs\n",
718 __func__, nr_sig_mrs);
719 goto out_free_rdma_mrs;
720 }
721 }
722
723 return 0;
724
725out_free_rdma_mrs:
726 ib_mr_pool_destroy(qp, &qp->rdma_mrs);
727 return ret;
728}
729
730void rdma_rw_cleanup_mrs(struct ib_qp *qp)
731{
732 ib_mr_pool_destroy(qp, &qp->sig_mrs);
733 ib_mr_pool_destroy(qp, &qp->rdma_mrs);
734}
1/*
2 * Copyright (c) 2016 HGST, a Western Digital Company.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13#include <linux/moduleparam.h>
14#include <linux/slab.h>
15#include <rdma/mr_pool.h>
16#include <rdma/rw.h>
17
18enum {
19 RDMA_RW_SINGLE_WR,
20 RDMA_RW_MULTI_WR,
21 RDMA_RW_MR,
22 RDMA_RW_SIG_MR,
23};
24
25static bool rdma_rw_force_mr;
26module_param_named(force_mr, rdma_rw_force_mr, bool, 0);
27MODULE_PARM_DESC(force_mr, "Force usage of MRs for RDMA READ/WRITE operations");
28
29/*
30 * Check if the device might use memory registration. This is currently only
31 * true for iWarp devices. In the future we can hopefully fine tune this based
32 * on HCA driver input.
33 */
34static inline bool rdma_rw_can_use_mr(struct ib_device *dev, u8 port_num)
35{
36 if (rdma_protocol_iwarp(dev, port_num))
37 return true;
38 if (unlikely(rdma_rw_force_mr))
39 return true;
40 return false;
41}
42
43/*
44 * Check if the device will use memory registration for this RW operation.
45 * We currently always use memory registrations for iWarp RDMA READs, and
46 * have a debug option to force usage of MRs.
47 *
48 * XXX: In the future we can hopefully fine tune this based on HCA driver
49 * input.
50 */
51static inline bool rdma_rw_io_needs_mr(struct ib_device *dev, u8 port_num,
52 enum dma_data_direction dir, int dma_nents)
53{
54 if (rdma_protocol_iwarp(dev, port_num) && dir == DMA_FROM_DEVICE)
55 return true;
56 if (unlikely(rdma_rw_force_mr))
57 return true;
58 return false;
59}
60
61static inline u32 rdma_rw_fr_page_list_len(struct ib_device *dev)
62{
63 /* arbitrary limit to avoid allocating gigantic resources */
64 return min_t(u32, dev->attrs.max_fast_reg_page_list_len, 256);
65}
66
67/* Caller must have zero-initialized *reg. */
68static int rdma_rw_init_one_mr(struct ib_qp *qp, u8 port_num,
69 struct rdma_rw_reg_ctx *reg, struct scatterlist *sg,
70 u32 sg_cnt, u32 offset)
71{
72 u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device);
73 u32 nents = min(sg_cnt, pages_per_mr);
74 int count = 0, ret;
75
76 reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs);
77 if (!reg->mr)
78 return -EAGAIN;
79
80 if (reg->mr->need_inval) {
81 reg->inv_wr.opcode = IB_WR_LOCAL_INV;
82 reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey;
83 reg->inv_wr.next = ®->reg_wr.wr;
84 count++;
85 } else {
86 reg->inv_wr.next = NULL;
87 }
88
89 ret = ib_map_mr_sg(reg->mr, sg, nents, &offset, PAGE_SIZE);
90 if (ret < nents) {
91 ib_mr_pool_put(qp, &qp->rdma_mrs, reg->mr);
92 return -EINVAL;
93 }
94
95 reg->reg_wr.wr.opcode = IB_WR_REG_MR;
96 reg->reg_wr.mr = reg->mr;
97 reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
98 if (rdma_protocol_iwarp(qp->device, port_num))
99 reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
100 count++;
101
102 reg->sge.addr = reg->mr->iova;
103 reg->sge.length = reg->mr->length;
104 return count;
105}
106
107static int rdma_rw_init_mr_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
108 u8 port_num, struct scatterlist *sg, u32 sg_cnt, u32 offset,
109 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
110{
111 struct rdma_rw_reg_ctx *prev = NULL;
112 u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device);
113 int i, j, ret = 0, count = 0;
114
115 ctx->nr_ops = (sg_cnt + pages_per_mr - 1) / pages_per_mr;
116 ctx->reg = kcalloc(ctx->nr_ops, sizeof(*ctx->reg), GFP_KERNEL);
117 if (!ctx->reg) {
118 ret = -ENOMEM;
119 goto out;
120 }
121
122 for (i = 0; i < ctx->nr_ops; i++) {
123 struct rdma_rw_reg_ctx *reg = &ctx->reg[i];
124 u32 nents = min(sg_cnt, pages_per_mr);
125
126 ret = rdma_rw_init_one_mr(qp, port_num, reg, sg, sg_cnt,
127 offset);
128 if (ret < 0)
129 goto out_free;
130 count += ret;
131
132 if (prev) {
133 if (reg->mr->need_inval)
134 prev->wr.wr.next = ®->inv_wr;
135 else
136 prev->wr.wr.next = ®->reg_wr.wr;
137 }
138
139 reg->reg_wr.wr.next = ®->wr.wr;
140
141 reg->wr.wr.sg_list = ®->sge;
142 reg->wr.wr.num_sge = 1;
143 reg->wr.remote_addr = remote_addr;
144 reg->wr.rkey = rkey;
145 if (dir == DMA_TO_DEVICE) {
146 reg->wr.wr.opcode = IB_WR_RDMA_WRITE;
147 } else if (!rdma_cap_read_inv(qp->device, port_num)) {
148 reg->wr.wr.opcode = IB_WR_RDMA_READ;
149 } else {
150 reg->wr.wr.opcode = IB_WR_RDMA_READ_WITH_INV;
151 reg->wr.wr.ex.invalidate_rkey = reg->mr->lkey;
152 }
153 count++;
154
155 remote_addr += reg->sge.length;
156 sg_cnt -= nents;
157 for (j = 0; j < nents; j++)
158 sg = sg_next(sg);
159 prev = reg;
160 offset = 0;
161 }
162
163 if (prev)
164 prev->wr.wr.next = NULL;
165
166 ctx->type = RDMA_RW_MR;
167 return count;
168
169out_free:
170 while (--i >= 0)
171 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
172 kfree(ctx->reg);
173out:
174 return ret;
175}
176
177static int rdma_rw_init_map_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
178 struct scatterlist *sg, u32 sg_cnt, u32 offset,
179 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
180{
181 struct ib_device *dev = qp->pd->device;
182 u32 max_sge = dir == DMA_TO_DEVICE ? qp->max_write_sge :
183 qp->max_read_sge;
184 struct ib_sge *sge;
185 u32 total_len = 0, i, j;
186
187 ctx->nr_ops = DIV_ROUND_UP(sg_cnt, max_sge);
188
189 ctx->map.sges = sge = kcalloc(sg_cnt, sizeof(*sge), GFP_KERNEL);
190 if (!ctx->map.sges)
191 goto out;
192
193 ctx->map.wrs = kcalloc(ctx->nr_ops, sizeof(*ctx->map.wrs), GFP_KERNEL);
194 if (!ctx->map.wrs)
195 goto out_free_sges;
196
197 for (i = 0; i < ctx->nr_ops; i++) {
198 struct ib_rdma_wr *rdma_wr = &ctx->map.wrs[i];
199 u32 nr_sge = min(sg_cnt, max_sge);
200
201 if (dir == DMA_TO_DEVICE)
202 rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
203 else
204 rdma_wr->wr.opcode = IB_WR_RDMA_READ;
205 rdma_wr->remote_addr = remote_addr + total_len;
206 rdma_wr->rkey = rkey;
207 rdma_wr->wr.num_sge = nr_sge;
208 rdma_wr->wr.sg_list = sge;
209
210 for (j = 0; j < nr_sge; j++, sg = sg_next(sg)) {
211 sge->addr = ib_sg_dma_address(dev, sg) + offset;
212 sge->length = ib_sg_dma_len(dev, sg) - offset;
213 sge->lkey = qp->pd->local_dma_lkey;
214
215 total_len += sge->length;
216 sge++;
217 sg_cnt--;
218 offset = 0;
219 }
220
221 rdma_wr->wr.next = i + 1 < ctx->nr_ops ?
222 &ctx->map.wrs[i + 1].wr : NULL;
223 }
224
225 ctx->type = RDMA_RW_MULTI_WR;
226 return ctx->nr_ops;
227
228out_free_sges:
229 kfree(ctx->map.sges);
230out:
231 return -ENOMEM;
232}
233
234static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
235 struct scatterlist *sg, u32 offset, u64 remote_addr, u32 rkey,
236 enum dma_data_direction dir)
237{
238 struct ib_device *dev = qp->pd->device;
239 struct ib_rdma_wr *rdma_wr = &ctx->single.wr;
240
241 ctx->nr_ops = 1;
242
243 ctx->single.sge.lkey = qp->pd->local_dma_lkey;
244 ctx->single.sge.addr = ib_sg_dma_address(dev, sg) + offset;
245 ctx->single.sge.length = ib_sg_dma_len(dev, sg) - offset;
246
247 memset(rdma_wr, 0, sizeof(*rdma_wr));
248 if (dir == DMA_TO_DEVICE)
249 rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
250 else
251 rdma_wr->wr.opcode = IB_WR_RDMA_READ;
252 rdma_wr->wr.sg_list = &ctx->single.sge;
253 rdma_wr->wr.num_sge = 1;
254 rdma_wr->remote_addr = remote_addr;
255 rdma_wr->rkey = rkey;
256
257 ctx->type = RDMA_RW_SINGLE_WR;
258 return 1;
259}
260
261/**
262 * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context
263 * @ctx: context to initialize
264 * @qp: queue pair to operate on
265 * @port_num: port num to which the connection is bound
266 * @sg: scatterlist to READ/WRITE from/to
267 * @sg_cnt: number of entries in @sg
268 * @sg_offset: current byte offset into @sg
269 * @remote_addr:remote address to read/write (relative to @rkey)
270 * @rkey: remote key to operate on
271 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
272 *
273 * Returns the number of WQEs that will be needed on the workqueue if
274 * successful, or a negative error code.
275 */
276int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
277 struct scatterlist *sg, u32 sg_cnt, u32 sg_offset,
278 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
279{
280 struct ib_device *dev = qp->pd->device;
281 int ret;
282
283 ret = ib_dma_map_sg(dev, sg, sg_cnt, dir);
284 if (!ret)
285 return -ENOMEM;
286 sg_cnt = ret;
287
288 /*
289 * Skip to the S/G entry that sg_offset falls into:
290 */
291 for (;;) {
292 u32 len = ib_sg_dma_len(dev, sg);
293
294 if (sg_offset < len)
295 break;
296
297 sg = sg_next(sg);
298 sg_offset -= len;
299 sg_cnt--;
300 }
301
302 ret = -EIO;
303 if (WARN_ON_ONCE(sg_cnt == 0))
304 goto out_unmap_sg;
305
306 if (rdma_rw_io_needs_mr(qp->device, port_num, dir, sg_cnt)) {
307 ret = rdma_rw_init_mr_wrs(ctx, qp, port_num, sg, sg_cnt,
308 sg_offset, remote_addr, rkey, dir);
309 } else if (sg_cnt > 1) {
310 ret = rdma_rw_init_map_wrs(ctx, qp, sg, sg_cnt, sg_offset,
311 remote_addr, rkey, dir);
312 } else {
313 ret = rdma_rw_init_single_wr(ctx, qp, sg, sg_offset,
314 remote_addr, rkey, dir);
315 }
316
317 if (ret < 0)
318 goto out_unmap_sg;
319 return ret;
320
321out_unmap_sg:
322 ib_dma_unmap_sg(dev, sg, sg_cnt, dir);
323 return ret;
324}
325EXPORT_SYMBOL(rdma_rw_ctx_init);
326
327/**
328 * rdma_rw_ctx_signature init - initialize a RW context with signature offload
329 * @ctx: context to initialize
330 * @qp: queue pair to operate on
331 * @port_num: port num to which the connection is bound
332 * @sg: scatterlist to READ/WRITE from/to
333 * @sg_cnt: number of entries in @sg
334 * @prot_sg: scatterlist to READ/WRITE protection information from/to
335 * @prot_sg_cnt: number of entries in @prot_sg
336 * @sig_attrs: signature offloading algorithms
337 * @remote_addr:remote address to read/write (relative to @rkey)
338 * @rkey: remote key to operate on
339 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
340 *
341 * Returns the number of WQEs that will be needed on the workqueue if
342 * successful, or a negative error code.
343 */
344int rdma_rw_ctx_signature_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
345 u8 port_num, struct scatterlist *sg, u32 sg_cnt,
346 struct scatterlist *prot_sg, u32 prot_sg_cnt,
347 struct ib_sig_attrs *sig_attrs,
348 u64 remote_addr, u32 rkey, enum dma_data_direction dir)
349{
350 struct ib_device *dev = qp->pd->device;
351 u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device);
352 struct ib_rdma_wr *rdma_wr;
353 struct ib_send_wr *prev_wr = NULL;
354 int count = 0, ret;
355
356 if (sg_cnt > pages_per_mr || prot_sg_cnt > pages_per_mr) {
357 pr_err("SG count too large\n");
358 return -EINVAL;
359 }
360
361 ret = ib_dma_map_sg(dev, sg, sg_cnt, dir);
362 if (!ret)
363 return -ENOMEM;
364 sg_cnt = ret;
365
366 ret = ib_dma_map_sg(dev, prot_sg, prot_sg_cnt, dir);
367 if (!ret) {
368 ret = -ENOMEM;
369 goto out_unmap_sg;
370 }
371 prot_sg_cnt = ret;
372
373 ctx->type = RDMA_RW_SIG_MR;
374 ctx->nr_ops = 1;
375 ctx->sig = kcalloc(1, sizeof(*ctx->sig), GFP_KERNEL);
376 if (!ctx->sig) {
377 ret = -ENOMEM;
378 goto out_unmap_prot_sg;
379 }
380
381 ret = rdma_rw_init_one_mr(qp, port_num, &ctx->sig->data, sg, sg_cnt, 0);
382 if (ret < 0)
383 goto out_free_ctx;
384 count += ret;
385 prev_wr = &ctx->sig->data.reg_wr.wr;
386
387 if (prot_sg_cnt) {
388 ret = rdma_rw_init_one_mr(qp, port_num, &ctx->sig->prot,
389 prot_sg, prot_sg_cnt, 0);
390 if (ret < 0)
391 goto out_destroy_data_mr;
392 count += ret;
393
394 if (ctx->sig->prot.inv_wr.next)
395 prev_wr->next = &ctx->sig->prot.inv_wr;
396 else
397 prev_wr->next = &ctx->sig->prot.reg_wr.wr;
398 prev_wr = &ctx->sig->prot.reg_wr.wr;
399 } else {
400 ctx->sig->prot.mr = NULL;
401 }
402
403 ctx->sig->sig_mr = ib_mr_pool_get(qp, &qp->sig_mrs);
404 if (!ctx->sig->sig_mr) {
405 ret = -EAGAIN;
406 goto out_destroy_prot_mr;
407 }
408
409 if (ctx->sig->sig_mr->need_inval) {
410 memset(&ctx->sig->sig_inv_wr, 0, sizeof(ctx->sig->sig_inv_wr));
411
412 ctx->sig->sig_inv_wr.opcode = IB_WR_LOCAL_INV;
413 ctx->sig->sig_inv_wr.ex.invalidate_rkey = ctx->sig->sig_mr->rkey;
414
415 prev_wr->next = &ctx->sig->sig_inv_wr;
416 prev_wr = &ctx->sig->sig_inv_wr;
417 }
418
419 ctx->sig->sig_wr.wr.opcode = IB_WR_REG_SIG_MR;
420 ctx->sig->sig_wr.wr.wr_cqe = NULL;
421 ctx->sig->sig_wr.wr.sg_list = &ctx->sig->data.sge;
422 ctx->sig->sig_wr.wr.num_sge = 1;
423 ctx->sig->sig_wr.access_flags = IB_ACCESS_LOCAL_WRITE;
424 ctx->sig->sig_wr.sig_attrs = sig_attrs;
425 ctx->sig->sig_wr.sig_mr = ctx->sig->sig_mr;
426 if (prot_sg_cnt)
427 ctx->sig->sig_wr.prot = &ctx->sig->prot.sge;
428 prev_wr->next = &ctx->sig->sig_wr.wr;
429 prev_wr = &ctx->sig->sig_wr.wr;
430 count++;
431
432 ctx->sig->sig_sge.addr = 0;
433 ctx->sig->sig_sge.length = ctx->sig->data.sge.length;
434 if (sig_attrs->wire.sig_type != IB_SIG_TYPE_NONE)
435 ctx->sig->sig_sge.length += ctx->sig->prot.sge.length;
436
437 rdma_wr = &ctx->sig->data.wr;
438 rdma_wr->wr.sg_list = &ctx->sig->sig_sge;
439 rdma_wr->wr.num_sge = 1;
440 rdma_wr->remote_addr = remote_addr;
441 rdma_wr->rkey = rkey;
442 if (dir == DMA_TO_DEVICE)
443 rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
444 else
445 rdma_wr->wr.opcode = IB_WR_RDMA_READ;
446 prev_wr->next = &rdma_wr->wr;
447 prev_wr = &rdma_wr->wr;
448 count++;
449
450 return count;
451
452out_destroy_prot_mr:
453 if (prot_sg_cnt)
454 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->prot.mr);
455out_destroy_data_mr:
456 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->data.mr);
457out_free_ctx:
458 kfree(ctx->sig);
459out_unmap_prot_sg:
460 ib_dma_unmap_sg(dev, prot_sg, prot_sg_cnt, dir);
461out_unmap_sg:
462 ib_dma_unmap_sg(dev, sg, sg_cnt, dir);
463 return ret;
464}
465EXPORT_SYMBOL(rdma_rw_ctx_signature_init);
466
467/*
468 * Now that we are going to post the WRs we can update the lkey and need_inval
469 * state on the MRs. If we were doing this at init time, we would get double
470 * or missing invalidations if a context was initialized but not actually
471 * posted.
472 */
473static void rdma_rw_update_lkey(struct rdma_rw_reg_ctx *reg, bool need_inval)
474{
475 reg->mr->need_inval = need_inval;
476 ib_update_fast_reg_key(reg->mr, ib_inc_rkey(reg->mr->lkey));
477 reg->reg_wr.key = reg->mr->lkey;
478 reg->sge.lkey = reg->mr->lkey;
479}
480
481/**
482 * rdma_rw_ctx_wrs - return chain of WRs for a RDMA READ or WRITE operation
483 * @ctx: context to operate on
484 * @qp: queue pair to operate on
485 * @port_num: port num to which the connection is bound
486 * @cqe: completion queue entry for the last WR
487 * @chain_wr: WR to append to the posted chain
488 *
489 * Return the WR chain for the set of RDMA READ/WRITE operations described by
490 * @ctx, as well as any memory registration operations needed. If @chain_wr
491 * is non-NULL the WR it points to will be appended to the chain of WRs posted.
492 * If @chain_wr is not set @cqe must be set so that the caller gets a
493 * completion notification.
494 */
495struct ib_send_wr *rdma_rw_ctx_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
496 u8 port_num, struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
497{
498 struct ib_send_wr *first_wr, *last_wr;
499 int i;
500
501 switch (ctx->type) {
502 case RDMA_RW_SIG_MR:
503 rdma_rw_update_lkey(&ctx->sig->data, true);
504 if (ctx->sig->prot.mr)
505 rdma_rw_update_lkey(&ctx->sig->prot, true);
506
507 ctx->sig->sig_mr->need_inval = true;
508 ib_update_fast_reg_key(ctx->sig->sig_mr,
509 ib_inc_rkey(ctx->sig->sig_mr->lkey));
510 ctx->sig->sig_sge.lkey = ctx->sig->sig_mr->lkey;
511
512 if (ctx->sig->data.inv_wr.next)
513 first_wr = &ctx->sig->data.inv_wr;
514 else
515 first_wr = &ctx->sig->data.reg_wr.wr;
516 last_wr = &ctx->sig->data.wr.wr;
517 break;
518 case RDMA_RW_MR:
519 for (i = 0; i < ctx->nr_ops; i++) {
520 rdma_rw_update_lkey(&ctx->reg[i],
521 ctx->reg[i].wr.wr.opcode !=
522 IB_WR_RDMA_READ_WITH_INV);
523 }
524
525 if (ctx->reg[0].inv_wr.next)
526 first_wr = &ctx->reg[0].inv_wr;
527 else
528 first_wr = &ctx->reg[0].reg_wr.wr;
529 last_wr = &ctx->reg[ctx->nr_ops - 1].wr.wr;
530 break;
531 case RDMA_RW_MULTI_WR:
532 first_wr = &ctx->map.wrs[0].wr;
533 last_wr = &ctx->map.wrs[ctx->nr_ops - 1].wr;
534 break;
535 case RDMA_RW_SINGLE_WR:
536 first_wr = &ctx->single.wr.wr;
537 last_wr = &ctx->single.wr.wr;
538 break;
539 default:
540 BUG();
541 }
542
543 if (chain_wr) {
544 last_wr->next = chain_wr;
545 } else {
546 last_wr->wr_cqe = cqe;
547 last_wr->send_flags |= IB_SEND_SIGNALED;
548 }
549
550 return first_wr;
551}
552EXPORT_SYMBOL(rdma_rw_ctx_wrs);
553
554/**
555 * rdma_rw_ctx_post - post a RDMA READ or RDMA WRITE operation
556 * @ctx: context to operate on
557 * @qp: queue pair to operate on
558 * @port_num: port num to which the connection is bound
559 * @cqe: completion queue entry for the last WR
560 * @chain_wr: WR to append to the posted chain
561 *
562 * Post the set of RDMA READ/WRITE operations described by @ctx, as well as
563 * any memory registration operations needed. If @chain_wr is non-NULL the
564 * WR it points to will be appended to the chain of WRs posted. If @chain_wr
565 * is not set @cqe must be set so that the caller gets a completion
566 * notification.
567 */
568int rdma_rw_ctx_post(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
569 struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
570{
571 struct ib_send_wr *first_wr, *bad_wr;
572
573 first_wr = rdma_rw_ctx_wrs(ctx, qp, port_num, cqe, chain_wr);
574 return ib_post_send(qp, first_wr, &bad_wr);
575}
576EXPORT_SYMBOL(rdma_rw_ctx_post);
577
578/**
579 * rdma_rw_ctx_destroy - release all resources allocated by rdma_rw_ctx_init
580 * @ctx: context to release
581 * @qp: queue pair to operate on
582 * @port_num: port num to which the connection is bound
583 * @sg: scatterlist that was used for the READ/WRITE
584 * @sg_cnt: number of entries in @sg
585 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
586 */
587void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
588 struct scatterlist *sg, u32 sg_cnt, enum dma_data_direction dir)
589{
590 int i;
591
592 switch (ctx->type) {
593 case RDMA_RW_MR:
594 for (i = 0; i < ctx->nr_ops; i++)
595 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
596 kfree(ctx->reg);
597 break;
598 case RDMA_RW_MULTI_WR:
599 kfree(ctx->map.wrs);
600 kfree(ctx->map.sges);
601 break;
602 case RDMA_RW_SINGLE_WR:
603 break;
604 default:
605 BUG();
606 break;
607 }
608
609 ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
610}
611EXPORT_SYMBOL(rdma_rw_ctx_destroy);
612
613/**
614 * rdma_rw_ctx_destroy_signature - release all resources allocated by
615 * rdma_rw_ctx_init_signature
616 * @ctx: context to release
617 * @qp: queue pair to operate on
618 * @port_num: port num to which the connection is bound
619 * @sg: scatterlist that was used for the READ/WRITE
620 * @sg_cnt: number of entries in @sg
621 * @prot_sg: scatterlist that was used for the READ/WRITE of the PI
622 * @prot_sg_cnt: number of entries in @prot_sg
623 * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
624 */
625void rdma_rw_ctx_destroy_signature(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
626 u8 port_num, struct scatterlist *sg, u32 sg_cnt,
627 struct scatterlist *prot_sg, u32 prot_sg_cnt,
628 enum dma_data_direction dir)
629{
630 if (WARN_ON_ONCE(ctx->type != RDMA_RW_SIG_MR))
631 return;
632
633 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->data.mr);
634 ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
635
636 if (ctx->sig->prot.mr) {
637 ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->prot.mr);
638 ib_dma_unmap_sg(qp->pd->device, prot_sg, prot_sg_cnt, dir);
639 }
640
641 ib_mr_pool_put(qp, &qp->sig_mrs, ctx->sig->sig_mr);
642 kfree(ctx->sig);
643}
644EXPORT_SYMBOL(rdma_rw_ctx_destroy_signature);
645
646void rdma_rw_init_qp(struct ib_device *dev, struct ib_qp_init_attr *attr)
647{
648 u32 factor;
649
650 WARN_ON_ONCE(attr->port_num == 0);
651
652 /*
653 * Each context needs at least one RDMA READ or WRITE WR.
654 *
655 * For some hardware we might need more, eventually we should ask the
656 * HCA driver for a multiplier here.
657 */
658 factor = 1;
659
660 /*
661 * If the devices needs MRs to perform RDMA READ or WRITE operations,
662 * we'll need two additional MRs for the registrations and the
663 * invalidation.
664 */
665 if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN)
666 factor += 6; /* (inv + reg) * (data + prot + sig) */
667 else if (rdma_rw_can_use_mr(dev, attr->port_num))
668 factor += 2; /* inv + reg */
669
670 attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs;
671
672 /*
673 * But maybe we were just too high in the sky and the device doesn't
674 * even support all we need, and we'll have to live with what we get..
675 */
676 attr->cap.max_send_wr =
677 min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr);
678}
679
680int rdma_rw_init_mrs(struct ib_qp *qp, struct ib_qp_init_attr *attr)
681{
682 struct ib_device *dev = qp->pd->device;
683 u32 nr_mrs = 0, nr_sig_mrs = 0;
684 int ret = 0;
685
686 if (attr->create_flags & IB_QP_CREATE_SIGNATURE_EN) {
687 nr_sig_mrs = attr->cap.max_rdma_ctxs;
688 nr_mrs = attr->cap.max_rdma_ctxs * 2;
689 } else if (rdma_rw_can_use_mr(dev, attr->port_num)) {
690 nr_mrs = attr->cap.max_rdma_ctxs;
691 }
692
693 if (nr_mrs) {
694 ret = ib_mr_pool_init(qp, &qp->rdma_mrs, nr_mrs,
695 IB_MR_TYPE_MEM_REG,
696 rdma_rw_fr_page_list_len(dev));
697 if (ret) {
698 pr_err("%s: failed to allocated %d MRs\n",
699 __func__, nr_mrs);
700 return ret;
701 }
702 }
703
704 if (nr_sig_mrs) {
705 ret = ib_mr_pool_init(qp, &qp->sig_mrs, nr_sig_mrs,
706 IB_MR_TYPE_SIGNATURE, 2);
707 if (ret) {
708 pr_err("%s: failed to allocated %d SIG MRs\n",
709 __func__, nr_mrs);
710 goto out_free_rdma_mrs;
711 }
712 }
713
714 return 0;
715
716out_free_rdma_mrs:
717 ib_mr_pool_destroy(qp, &qp->rdma_mrs);
718 return ret;
719}
720
721void rdma_rw_cleanup_mrs(struct ib_qp *qp)
722{
723 ib_mr_pool_destroy(qp, &qp->sig_mrs);
724 ib_mr_pool_destroy(qp, &qp->rdma_mrs);
725}