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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Synopsys DesignWare I2C adapter driver.
4 *
5 * Based on the TI DAVINCI I2C adapter driver.
6 *
7 * Copyright (C) 2006 Texas Instruments.
8 * Copyright (C) 2007 MontaVista Software Inc.
9 * Copyright (C) 2009 Provigent Ltd.
10 */
11#include <linux/acpi.h>
12#include <linux/clk-provider.h>
13#include <linux/clk.h>
14#include <linux/delay.h>
15#include <linux/dmi.h>
16#include <linux/err.h>
17#include <linux/errno.h>
18#include <linux/i2c.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/kernel.h>
22#include <linux/mfd/syscon.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/platform_device.h>
26#include <linux/pm.h>
27#include <linux/pm_runtime.h>
28#include <linux/property.h>
29#include <linux/regmap.h>
30#include <linux/reset.h>
31#include <linux/sched.h>
32#include <linux/slab.h>
33#include <linux/suspend.h>
34#include <linux/units.h>
35
36#include "i2c-designware-core.h"
37
38static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
39{
40 return clk_get_rate(dev->clk) / KILO;
41}
42
43#ifdef CONFIG_ACPI
44static const struct acpi_device_id dw_i2c_acpi_match[] = {
45 { "INT33C2", 0 },
46 { "INT33C3", 0 },
47 { "INT3432", 0 },
48 { "INT3433", 0 },
49 { "80860F41", ACCESS_NO_IRQ_SUSPEND },
50 { "808622C1", ACCESS_NO_IRQ_SUSPEND },
51 { "AMD0010", ACCESS_INTR_MASK },
52 { "AMDI0010", ACCESS_INTR_MASK },
53 { "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE },
54 { "AMDI0510", 0 },
55 { "APMC0D0F", 0 },
56 { "HISI02A1", 0 },
57 { "HISI02A2", 0 },
58 { "HISI02A3", 0 },
59 { "HYGO0010", ACCESS_INTR_MASK },
60 { }
61};
62MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
63#endif
64
65#ifdef CONFIG_OF
66#define BT1_I2C_CTL 0x100
67#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0)
68#define BT1_I2C_CTL_WR BIT(8)
69#define BT1_I2C_CTL_GO BIT(31)
70#define BT1_I2C_DI 0x104
71#define BT1_I2C_DO 0x108
72
73static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val)
74{
75 struct dw_i2c_dev *dev = context;
76 int ret;
77
78 /*
79 * Note these methods shouldn't ever fail because the system controller
80 * registers are memory mapped. We check the return value just in case.
81 */
82 ret = regmap_write(dev->sysmap, BT1_I2C_CTL,
83 BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK));
84 if (ret)
85 return ret;
86
87 return regmap_read(dev->sysmap, BT1_I2C_DO, val);
88}
89
90static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val)
91{
92 struct dw_i2c_dev *dev = context;
93 int ret;
94
95 ret = regmap_write(dev->sysmap, BT1_I2C_DI, val);
96 if (ret)
97 return ret;
98
99 return regmap_write(dev->sysmap, BT1_I2C_CTL,
100 BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK));
101}
102
103static struct regmap_config bt1_i2c_cfg = {
104 .reg_bits = 32,
105 .val_bits = 32,
106 .reg_stride = 4,
107 .fast_io = true,
108 .reg_read = bt1_i2c_read,
109 .reg_write = bt1_i2c_write,
110 .max_register = DW_IC_COMP_TYPE,
111};
112
113static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
114{
115 dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent);
116 if (IS_ERR(dev->sysmap))
117 return PTR_ERR(dev->sysmap);
118
119 dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg);
120 return PTR_ERR_OR_ZERO(dev->map);
121}
122
123#define MSCC_ICPU_CFG_TWI_DELAY 0x0
124#define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
125#define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
126
127static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
128{
129 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
130 dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
131
132 return 0;
133}
134
135static int dw_i2c_of_configure(struct platform_device *pdev)
136{
137 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
138
139 switch (dev->flags & MODEL_MASK) {
140 case MODEL_MSCC_OCELOT:
141 dev->ext = devm_platform_ioremap_resource(pdev, 1);
142 if (!IS_ERR(dev->ext))
143 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
144 break;
145 default:
146 break;
147 }
148
149 return 0;
150}
151
152static const struct of_device_id dw_i2c_of_match[] = {
153 { .compatible = "snps,designware-i2c", },
154 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
155 { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
156 {},
157};
158MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
159#else
160static int bt1_i2c_request_regs(struct dw_i2c_dev *dev)
161{
162 return -ENODEV;
163}
164
165static inline int dw_i2c_of_configure(struct platform_device *pdev)
166{
167 return -ENODEV;
168}
169#endif
170
171static int txgbe_i2c_request_regs(struct dw_i2c_dev *dev)
172{
173 dev->map = dev_get_regmap(dev->dev->parent, NULL);
174 if (!dev->map)
175 return -ENODEV;
176
177 return 0;
178}
179
180static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
181{
182 pm_runtime_disable(dev->dev);
183
184 if (dev->shared_with_punit)
185 pm_runtime_put_noidle(dev->dev);
186}
187
188static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev)
189{
190 struct platform_device *pdev = to_platform_device(dev->dev);
191 int ret;
192
193 switch (dev->flags & MODEL_MASK) {
194 case MODEL_BAIKAL_BT1:
195 ret = bt1_i2c_request_regs(dev);
196 break;
197 case MODEL_WANGXUN_SP:
198 ret = txgbe_i2c_request_regs(dev);
199 break;
200 default:
201 dev->base = devm_platform_ioremap_resource(pdev, 0);
202 ret = PTR_ERR_OR_ZERO(dev->base);
203 break;
204 }
205
206 return ret;
207}
208
209static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
210 {
211 .ident = "Qtechnology QT5222",
212 .matches = {
213 DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"),
214 DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"),
215 },
216 },
217 { } /* terminate list */
218};
219
220static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = {
221#ifdef CONFIG_I2C_DESIGNWARE_BAYTRAIL
222 {
223 .probe = i2c_dw_baytrail_probe_lock_support,
224 },
225#endif
226#ifdef CONFIG_I2C_DESIGNWARE_AMDPSP
227 {
228 .probe = i2c_dw_amdpsp_probe_lock_support,
229 },
230#endif
231 {}
232};
233
234static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
235{
236 const struct i2c_dw_semaphore_callbacks *ptr;
237 int i = 0;
238 int ret;
239
240 ptr = i2c_dw_semaphore_cb_table;
241
242 dev->semaphore_idx = -1;
243
244 while (ptr->probe) {
245 ret = ptr->probe(dev);
246 if (ret) {
247 /*
248 * If there is no semaphore device attached to this
249 * controller, we shouldn't abort general i2c_controller
250 * probe.
251 */
252 if (ret != -ENODEV)
253 return ret;
254
255 i++;
256 ptr++;
257 continue;
258 }
259
260 dev->semaphore_idx = i;
261 break;
262 }
263
264 return 0;
265}
266
267static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev)
268{
269 if (dev->semaphore_idx < 0)
270 return;
271
272 if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove)
273 i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev);
274}
275
276static int dw_i2c_plat_probe(struct platform_device *pdev)
277{
278 struct i2c_adapter *adap;
279 struct dw_i2c_dev *dev;
280 struct i2c_timings *t;
281 int irq, ret;
282
283 irq = platform_get_irq(pdev, 0);
284 if (irq < 0)
285 return irq;
286
287 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
288 if (!dev)
289 return -ENOMEM;
290
291 dev->flags = (uintptr_t)device_get_match_data(&pdev->dev);
292 if (device_property_present(&pdev->dev, "wx,i2c-snps-model"))
293 dev->flags = MODEL_WANGXUN_SP;
294
295 dev->dev = &pdev->dev;
296 dev->irq = irq;
297 platform_set_drvdata(pdev, dev);
298
299 ret = dw_i2c_plat_request_regs(dev);
300 if (ret)
301 return ret;
302
303 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
304 if (IS_ERR(dev->rst))
305 return PTR_ERR(dev->rst);
306
307 reset_control_deassert(dev->rst);
308
309 t = &dev->timings;
310 i2c_parse_fw_timings(&pdev->dev, t, false);
311
312 i2c_dw_adjust_bus_speed(dev);
313
314 if (pdev->dev.of_node)
315 dw_i2c_of_configure(pdev);
316
317 if (has_acpi_companion(&pdev->dev))
318 i2c_dw_acpi_configure(&pdev->dev);
319
320 ret = i2c_dw_validate_speed(dev);
321 if (ret)
322 goto exit_reset;
323
324 ret = i2c_dw_probe_lock_support(dev);
325 if (ret)
326 goto exit_reset;
327
328 i2c_dw_configure(dev);
329
330 /* Optional interface clock */
331 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
332 if (IS_ERR(dev->pclk)) {
333 ret = PTR_ERR(dev->pclk);
334 goto exit_reset;
335 }
336
337 dev->clk = devm_clk_get_optional(&pdev->dev, NULL);
338 if (IS_ERR(dev->clk)) {
339 ret = PTR_ERR(dev->clk);
340 goto exit_reset;
341 }
342
343 ret = i2c_dw_prepare_clk(dev, true);
344 if (ret)
345 goto exit_reset;
346
347 if (dev->clk) {
348 u64 clk_khz;
349
350 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
351 clk_khz = dev->get_clk_rate_khz(dev);
352
353 if (!dev->sda_hold_time && t->sda_hold_ns)
354 dev->sda_hold_time =
355 DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO);
356 }
357
358 adap = &dev->adapter;
359 adap->owner = THIS_MODULE;
360 adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ?
361 I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED;
362 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
363 adap->dev.of_node = pdev->dev.of_node;
364 adap->nr = -1;
365
366 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
367 dev_pm_set_driver_flags(&pdev->dev,
368 DPM_FLAG_SMART_PREPARE);
369 } else {
370 dev_pm_set_driver_flags(&pdev->dev,
371 DPM_FLAG_SMART_PREPARE |
372 DPM_FLAG_SMART_SUSPEND);
373 }
374
375 device_enable_async_suspend(&pdev->dev);
376
377 /* The code below assumes runtime PM to be disabled. */
378 WARN_ON(pm_runtime_enabled(&pdev->dev));
379
380 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
381 pm_runtime_use_autosuspend(&pdev->dev);
382 pm_runtime_set_active(&pdev->dev);
383
384 if (dev->shared_with_punit)
385 pm_runtime_get_noresume(&pdev->dev);
386
387 pm_runtime_enable(&pdev->dev);
388
389 ret = i2c_dw_probe(dev);
390 if (ret)
391 goto exit_probe;
392
393 return ret;
394
395exit_probe:
396 dw_i2c_plat_pm_cleanup(dev);
397exit_reset:
398 reset_control_assert(dev->rst);
399 return ret;
400}
401
402static void dw_i2c_plat_remove(struct platform_device *pdev)
403{
404 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
405
406 pm_runtime_get_sync(&pdev->dev);
407
408 i2c_del_adapter(&dev->adapter);
409
410 dev->disable(dev);
411
412 pm_runtime_dont_use_autosuspend(&pdev->dev);
413 pm_runtime_put_sync(&pdev->dev);
414 dw_i2c_plat_pm_cleanup(dev);
415
416 i2c_dw_remove_lock_support(dev);
417
418 reset_control_assert(dev->rst);
419}
420
421static int dw_i2c_plat_prepare(struct device *dev)
422{
423 /*
424 * If the ACPI companion device object is present for this device, it
425 * may be accessed during suspend and resume of other devices via I2C
426 * operation regions, so tell the PM core and middle layers to avoid
427 * skipping system suspend/resume callbacks for it in that case.
428 */
429 return !has_acpi_companion(dev);
430}
431
432static int dw_i2c_plat_runtime_suspend(struct device *dev)
433{
434 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
435
436 if (i_dev->shared_with_punit)
437 return 0;
438
439 i_dev->disable(i_dev);
440 i2c_dw_prepare_clk(i_dev, false);
441
442 return 0;
443}
444
445static int dw_i2c_plat_suspend(struct device *dev)
446{
447 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
448
449 i2c_mark_adapter_suspended(&i_dev->adapter);
450
451 return dw_i2c_plat_runtime_suspend(dev);
452}
453
454static int dw_i2c_plat_runtime_resume(struct device *dev)
455{
456 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
457
458 if (!i_dev->shared_with_punit)
459 i2c_dw_prepare_clk(i_dev, true);
460
461 i_dev->init(i_dev);
462
463 return 0;
464}
465
466static int dw_i2c_plat_resume(struct device *dev)
467{
468 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
469
470 dw_i2c_plat_runtime_resume(dev);
471 i2c_mark_adapter_resumed(&i_dev->adapter);
472
473 return 0;
474}
475
476static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
477 .prepare = pm_sleep_ptr(dw_i2c_plat_prepare),
478 LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
479 RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend, dw_i2c_plat_runtime_resume, NULL)
480};
481
482/* Work with hotplug and coldplug */
483MODULE_ALIAS("platform:i2c_designware");
484
485static struct platform_driver dw_i2c_driver = {
486 .probe = dw_i2c_plat_probe,
487 .remove_new = dw_i2c_plat_remove,
488 .driver = {
489 .name = "i2c_designware",
490 .of_match_table = of_match_ptr(dw_i2c_of_match),
491 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
492 .pm = pm_ptr(&dw_i2c_dev_pm_ops),
493 },
494};
495
496static int __init dw_i2c_init_driver(void)
497{
498 return platform_driver_register(&dw_i2c_driver);
499}
500subsys_initcall(dw_i2c_init_driver);
501
502static void __exit dw_i2c_exit_driver(void)
503{
504 platform_driver_unregister(&dw_i2c_driver);
505}
506module_exit(dw_i2c_exit_driver);
507
508MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
509MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
510MODULE_LICENSE("GPL");
1/*
2 * Synopsys DesignWare I2C adapter driver (master only).
3 *
4 * Based on the TI DAVINCI I2C adapter driver.
5 *
6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd.
9 *
10 * ----------------------------------------------------------------------------
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 * ----------------------------------------------------------------------------
22 *
23 */
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/delay.h>
27#include <linux/dmi.h>
28#include <linux/i2c.h>
29#include <linux/clk.h>
30#include <linux/clk-provider.h>
31#include <linux/errno.h>
32#include <linux/sched.h>
33#include <linux/err.h>
34#include <linux/interrupt.h>
35#include <linux/of.h>
36#include <linux/platform_device.h>
37#include <linux/pm.h>
38#include <linux/pm_runtime.h>
39#include <linux/property.h>
40#include <linux/io.h>
41#include <linux/slab.h>
42#include <linux/acpi.h>
43#include <linux/platform_data/i2c-designware.h>
44#include "i2c-designware-core.h"
45
46static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
47{
48 return clk_get_rate(dev->clk)/1000;
49}
50
51#ifdef CONFIG_ACPI
52/*
53 * The HCNT/LCNT information coming from ACPI should be the most accurate
54 * for given platform. However, some systems get it wrong. On such systems
55 * we get better results by calculating those based on the input clock.
56 */
57static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
58 {
59 .ident = "Dell Inspiron 7348",
60 .matches = {
61 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
62 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
63 },
64 },
65 { }
66};
67
68static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
69 u16 *hcnt, u16 *lcnt, u32 *sda_hold)
70{
71 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
72 acpi_handle handle = ACPI_HANDLE(&pdev->dev);
73 union acpi_object *obj;
74
75 if (dmi_check_system(dw_i2c_no_acpi_params))
76 return;
77
78 if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
79 return;
80
81 obj = (union acpi_object *)buf.pointer;
82 if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
83 const union acpi_object *objs = obj->package.elements;
84
85 *hcnt = (u16)objs[0].integer.value;
86 *lcnt = (u16)objs[1].integer.value;
87 if (sda_hold)
88 *sda_hold = (u32)objs[2].integer.value;
89 }
90
91 kfree(buf.pointer);
92}
93
94static int dw_i2c_acpi_configure(struct platform_device *pdev)
95{
96 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
97 const struct acpi_device_id *id;
98
99 dev->adapter.nr = -1;
100 dev->tx_fifo_depth = 32;
101 dev->rx_fifo_depth = 32;
102
103 /*
104 * Try to get SDA hold time and *CNT values from an ACPI method if
105 * it exists for both supported speed modes.
106 */
107 dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, NULL);
108 dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt,
109 &dev->sda_hold_time);
110 dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, NULL);
111 dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, NULL);
112
113 id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
114 if (id && id->driver_data)
115 dev->accessor_flags |= (u32)id->driver_data;
116
117 return 0;
118}
119
120static const struct acpi_device_id dw_i2c_acpi_match[] = {
121 { "INT33C2", 0 },
122 { "INT33C3", 0 },
123 { "INT3432", 0 },
124 { "INT3433", 0 },
125 { "80860F41", 0 },
126 { "808622C1", 0 },
127 { "AMD0010", ACCESS_INTR_MASK },
128 { "AMDI0010", ACCESS_INTR_MASK },
129 { "AMDI0510", 0 },
130 { "APMC0D0F", 0 },
131 { }
132};
133MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
134#else
135static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
136{
137 return -ENODEV;
138}
139#endif
140
141static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
142{
143 if (IS_ERR(i_dev->clk))
144 return PTR_ERR(i_dev->clk);
145
146 if (prepare)
147 return clk_prepare_enable(i_dev->clk);
148
149 clk_disable_unprepare(i_dev->clk);
150 return 0;
151}
152
153static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
154{
155 u32 param, tx_fifo_depth, rx_fifo_depth;
156
157 /*
158 * Try to detect the FIFO depth if not set by interface driver,
159 * the depth could be from 2 to 256 from HW spec.
160 */
161 param = i2c_dw_read_comp_param(dev);
162 tx_fifo_depth = ((param >> 16) & 0xff) + 1;
163 rx_fifo_depth = ((param >> 8) & 0xff) + 1;
164 if (!dev->tx_fifo_depth) {
165 dev->tx_fifo_depth = tx_fifo_depth;
166 dev->rx_fifo_depth = rx_fifo_depth;
167 dev->adapter.nr = id;
168 } else if (tx_fifo_depth >= 2) {
169 dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
170 tx_fifo_depth);
171 dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
172 rx_fifo_depth);
173 }
174}
175
176static int dw_i2c_plat_probe(struct platform_device *pdev)
177{
178 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
179 struct dw_i2c_dev *dev;
180 struct i2c_adapter *adap;
181 struct resource *mem;
182 int irq, r;
183 u32 acpi_speed, ht = 0;
184
185 irq = platform_get_irq(pdev, 0);
186 if (irq < 0)
187 return irq;
188
189 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
190 if (!dev)
191 return -ENOMEM;
192
193 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
194 dev->base = devm_ioremap_resource(&pdev->dev, mem);
195 if (IS_ERR(dev->base))
196 return PTR_ERR(dev->base);
197
198 dev->dev = &pdev->dev;
199 dev->irq = irq;
200 platform_set_drvdata(pdev, dev);
201
202 if (pdata) {
203 dev->clk_freq = pdata->i2c_scl_freq;
204 } else {
205 device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
206 &ht);
207 device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
208 &dev->sda_falling_time);
209 device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
210 &dev->scl_falling_time);
211 device_property_read_u32(&pdev->dev, "clock-frequency",
212 &dev->clk_freq);
213 }
214
215 acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
216 /*
217 * Find bus speed from the "clock-frequency" device property, ACPI
218 * or by using fast mode if neither is set.
219 */
220 if (acpi_speed && dev->clk_freq)
221 dev->clk_freq = min(dev->clk_freq, acpi_speed);
222 else if (acpi_speed || dev->clk_freq)
223 dev->clk_freq = max(dev->clk_freq, acpi_speed);
224 else
225 dev->clk_freq = 400000;
226
227 if (has_acpi_companion(&pdev->dev))
228 dw_i2c_acpi_configure(pdev);
229
230 /*
231 * Only standard mode at 100kHz, fast mode at 400kHz,
232 * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
233 */
234 if (dev->clk_freq != 100000 && dev->clk_freq != 400000
235 && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
236 dev_err(&pdev->dev,
237 "Only 100kHz, 400kHz, 1MHz and 3.4MHz supported");
238 return -EINVAL;
239 }
240
241 r = i2c_dw_eval_lock_support(dev);
242 if (r)
243 return r;
244
245 dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
246
247 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
248 DW_IC_CON_RESTART_EN;
249
250 switch (dev->clk_freq) {
251 case 100000:
252 dev->master_cfg |= DW_IC_CON_SPEED_STD;
253 break;
254 case 3400000:
255 dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
256 break;
257 default:
258 dev->master_cfg |= DW_IC_CON_SPEED_FAST;
259 }
260
261 dev->clk = devm_clk_get(&pdev->dev, NULL);
262 if (!i2c_dw_plat_prepare_clk(dev, true)) {
263 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
264
265 if (!dev->sda_hold_time && ht)
266 dev->sda_hold_time = div_u64(
267 (u64)dev->get_clk_rate_khz(dev) * ht + 500000,
268 1000000);
269 }
270
271 dw_i2c_set_fifo_size(dev, pdev->id);
272
273 adap = &dev->adapter;
274 adap->owner = THIS_MODULE;
275 adap->class = I2C_CLASS_DEPRECATED;
276 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
277 adap->dev.of_node = pdev->dev.of_node;
278
279 if (dev->pm_runtime_disabled) {
280 pm_runtime_forbid(&pdev->dev);
281 } else {
282 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
283 pm_runtime_use_autosuspend(&pdev->dev);
284 pm_runtime_set_active(&pdev->dev);
285 pm_runtime_enable(&pdev->dev);
286 }
287
288 r = i2c_dw_probe(dev);
289 if (r && !dev->pm_runtime_disabled)
290 pm_runtime_disable(&pdev->dev);
291
292 return r;
293}
294
295static int dw_i2c_plat_remove(struct platform_device *pdev)
296{
297 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
298
299 pm_runtime_get_sync(&pdev->dev);
300
301 i2c_del_adapter(&dev->adapter);
302
303 i2c_dw_disable(dev);
304
305 pm_runtime_dont_use_autosuspend(&pdev->dev);
306 pm_runtime_put_sync(&pdev->dev);
307 if (!dev->pm_runtime_disabled)
308 pm_runtime_disable(&pdev->dev);
309
310 return 0;
311}
312
313#ifdef CONFIG_OF
314static const struct of_device_id dw_i2c_of_match[] = {
315 { .compatible = "snps,designware-i2c", },
316 {},
317};
318MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
319#endif
320
321#ifdef CONFIG_PM_SLEEP
322static int dw_i2c_plat_prepare(struct device *dev)
323{
324 return pm_runtime_suspended(dev);
325}
326
327static void dw_i2c_plat_complete(struct device *dev)
328{
329 if (dev->power.direct_complete)
330 pm_request_resume(dev);
331}
332#else
333#define dw_i2c_plat_prepare NULL
334#define dw_i2c_plat_complete NULL
335#endif
336
337#ifdef CONFIG_PM
338static int dw_i2c_plat_suspend(struct device *dev)
339{
340 struct platform_device *pdev = to_platform_device(dev);
341 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
342
343 i2c_dw_disable(i_dev);
344 i2c_dw_plat_prepare_clk(i_dev, false);
345
346 return 0;
347}
348
349static int dw_i2c_plat_resume(struct device *dev)
350{
351 struct platform_device *pdev = to_platform_device(dev);
352 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
353
354 i2c_dw_plat_prepare_clk(i_dev, true);
355
356 if (!i_dev->pm_runtime_disabled)
357 i2c_dw_init(i_dev);
358
359 return 0;
360}
361
362static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
363 .prepare = dw_i2c_plat_prepare,
364 .complete = dw_i2c_plat_complete,
365 SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
366 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
367};
368
369#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
370#else
371#define DW_I2C_DEV_PMOPS NULL
372#endif
373
374/* work with hotplug and coldplug */
375MODULE_ALIAS("platform:i2c_designware");
376
377static struct platform_driver dw_i2c_driver = {
378 .probe = dw_i2c_plat_probe,
379 .remove = dw_i2c_plat_remove,
380 .driver = {
381 .name = "i2c_designware",
382 .of_match_table = of_match_ptr(dw_i2c_of_match),
383 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
384 .pm = DW_I2C_DEV_PMOPS,
385 },
386};
387
388static int __init dw_i2c_init_driver(void)
389{
390 return platform_driver_register(&dw_i2c_driver);
391}
392subsys_initcall(dw_i2c_init_driver);
393
394static void __exit dw_i2c_exit_driver(void)
395{
396 platform_driver_unregister(&dw_i2c_driver);
397}
398module_exit(dw_i2c_exit_driver);
399
400MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
401MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
402MODULE_LICENSE("GPL");