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v6.8
  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/* exynos_drm_drv.h
  3 *
  4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  5 * Authors:
  6 *	Inki Dae <inki.dae@samsung.com>
  7 *	Joonyoung Shim <jy0922.shim@samsung.com>
  8 *	Seung-Woo Kim <sw0312.kim@samsung.com>
 
 
 
 
 
  9 */
 10
 11#ifndef _EXYNOS_DRM_DRV_H_
 12#define _EXYNOS_DRM_DRV_H_
 13
 
 14#include <linux/module.h>
 15
 16#include <drm/drm_crtc.h>
 17#include <drm/drm_device.h>
 18#include <drm/drm_plane.h>
 19
 20#define MAX_CRTC	3
 21#define MAX_PLANE	5
 22#define MAX_FB_BUFFER	4
 23
 24#define DEFAULT_WIN	0
 25
 26struct drm_crtc_state;
 27struct drm_display_mode;
 28
 29#define to_exynos_crtc(x)	container_of(x, struct exynos_drm_crtc, base)
 30#define to_exynos_plane(x)	container_of(x, struct exynos_drm_plane, base)
 31
 32/* this enumerates display type. */
 33enum exynos_drm_output_type {
 34	EXYNOS_DISPLAY_TYPE_NONE,
 35	/* RGB or CPU Interface. */
 36	EXYNOS_DISPLAY_TYPE_LCD,
 37	/* HDMI Interface. */
 38	EXYNOS_DISPLAY_TYPE_HDMI,
 39	/* Virtual Display Interface. */
 40	EXYNOS_DISPLAY_TYPE_VIDI,
 41};
 42
 43struct exynos_drm_rect {
 44	unsigned int x, y;
 45	unsigned int w, h;
 46};
 47
 48/*
 49 * Exynos drm plane state structure.
 50 *
 51 * @base: plane_state object (contains drm_framebuffer pointer)
 52 * @src: rectangle of the source image data to be displayed (clipped to
 53 *       visible part).
 54 * @crtc: rectangle of the target image position on hardware screen
 55 *       (clipped to visible part).
 56 * @h_ratio: horizontal scaling ratio, 16.16 fixed point
 57 * @v_ratio: vertical scaling ratio, 16.16 fixed point
 58 *
 59 * this structure consists plane state data that will be applied to hardware
 60 * specific overlay info.
 61 */
 62
 63struct exynos_drm_plane_state {
 64	struct drm_plane_state base;
 65	struct exynos_drm_rect crtc;
 66	struct exynos_drm_rect src;
 67	unsigned int h_ratio;
 68	unsigned int v_ratio;
 69};
 70
 71static inline struct exynos_drm_plane_state *
 72to_exynos_plane_state(struct drm_plane_state *state)
 73{
 74	return container_of(state, struct exynos_drm_plane_state, base);
 75}
 76
 77/*
 78 * Exynos drm common overlay structure.
 79 *
 80 * @base: plane object
 81 * @index: hardware index of the overlay layer
 82 *
 83 * this structure is common to exynos SoC and its contents would be copied
 84 * to hardware specific overlay info.
 85 */
 86
 87struct exynos_drm_plane {
 88	struct drm_plane base;
 89	const struct exynos_drm_plane_config *config;
 90	unsigned int index;
 91};
 92
 93#define EXYNOS_DRM_PLANE_CAP_DOUBLE	(1 << 0)
 94#define EXYNOS_DRM_PLANE_CAP_SCALE	(1 << 1)
 95#define EXYNOS_DRM_PLANE_CAP_ZPOS	(1 << 2)
 96#define EXYNOS_DRM_PLANE_CAP_TILE	(1 << 3)
 97#define EXYNOS_DRM_PLANE_CAP_PIX_BLEND	(1 << 4)
 98#define EXYNOS_DRM_PLANE_CAP_WIN_BLEND	(1 << 5)
 99
100/*
101 * Exynos DRM plane configuration structure.
102 *
103 * @zpos: initial z-position of the plane.
104 * @type: type of the plane (primary, cursor or overlay).
105 * @pixel_formats: supported pixel formats.
106 * @num_pixel_formats: number of elements in 'pixel_formats'.
107 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
108 */
109
110struct exynos_drm_plane_config {
111	unsigned int zpos;
112	enum drm_plane_type type;
113	const uint32_t *pixel_formats;
114	unsigned int num_pixel_formats;
115	unsigned int capabilities;
116};
117
118/*
119 * Exynos drm crtc ops
120 *
121 * @atomic_enable: enable the device
122 * @atomic_disable: disable the device
 
123 * @enable_vblank: specific driver callback for enabling vblank interrupt.
124 * @disable_vblank: specific driver callback for disabling vblank interrupt.
125 * @mode_valid: specific driver callback for mode validation
126 * @atomic_check: validate state
127 * @atomic_begin: prepare device to receive an update
128 * @atomic_flush: mark the end of device update
129 * @update_plane: apply hardware specific overlay data to registers.
130 * @disable_plane: disable hardware specific overlay.
131 * @te_handler: trigger to transfer video image at the tearing effect
132 *	synchronization signal if there is a page flip request.
133 */
134struct exynos_drm_crtc;
135struct exynos_drm_crtc_ops {
136	void (*atomic_enable)(struct exynos_drm_crtc *crtc);
137	void (*atomic_disable)(struct exynos_drm_crtc *crtc);
 
138	int (*enable_vblank)(struct exynos_drm_crtc *crtc);
139	void (*disable_vblank)(struct exynos_drm_crtc *crtc);
140	enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,
141		const struct drm_display_mode *mode);
142	bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
143			   const struct drm_display_mode *mode,
144			   struct drm_display_mode *adjusted_mode);
145	int (*atomic_check)(struct exynos_drm_crtc *crtc,
146			    struct drm_crtc_state *state);
147	void (*atomic_begin)(struct exynos_drm_crtc *crtc);
148	void (*update_plane)(struct exynos_drm_crtc *crtc,
149			     struct exynos_drm_plane *plane);
150	void (*disable_plane)(struct exynos_drm_crtc *crtc,
151			      struct exynos_drm_plane *plane);
152	void (*atomic_flush)(struct exynos_drm_crtc *crtc);
153	void (*te_handler)(struct exynos_drm_crtc *crtc);
154};
155
156struct exynos_drm_clk {
157	void (*enable)(struct exynos_drm_clk *clk, bool enable);
158};
159
160/*
161 * Exynos specific crtc structure.
162 *
163 * @base: crtc object.
164 * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
 
 
 
 
 
 
 
 
 
 
 
165 * @ops: pointer to callbacks for exynos drm specific functionality
166 * @ctx: A pointer to the crtc's implementation specific context
167 * @pipe_clk: A pointer to the crtc's pipeline clock.
168 */
169struct exynos_drm_crtc {
170	struct drm_crtc			base;
171	enum exynos_drm_output_type	type;
 
172	const struct exynos_drm_crtc_ops	*ops;
173	void				*ctx;
174	struct exynos_drm_clk		*pipe_clk;
175	bool				i80_mode : 1;
176};
177
178static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
179					      bool enable)
180{
181	if (crtc->pipe_clk)
182		crtc->pipe_clk->enable(crtc->pipe_clk, enable);
183}
184
185struct drm_exynos_file_private {
186	/* for g2d api */
187	struct list_head	inuse_cmdlist;
188	struct list_head	event_list;
189	struct list_head	userptr_list;
190};
191
 
 
 
 
 
192/*
193 * Exynos drm private structure.
194 *
 
 
 
 
 
 
195 * @pending: the crtcs that have pending updates to finish
196 * @lock: protect access to @pending
197 * @wait: wait an atomic commit to finish
198 */
199struct exynos_drm_private {
200	struct device *g2d_dev;
 
 
 
 
 
 
 
201	struct device *dma_dev;
202	void *mapping;
203
 
 
204	/* for atomic commit */
205	u32			pending;
206	spinlock_t		lock;
207	wait_queue_head_t	wait;
208};
209
 
 
 
 
 
 
 
 
210static inline struct device *to_dma_dev(struct drm_device *dev)
211{
212	struct exynos_drm_private *priv = dev->dev_private;
213
214	return priv->dma_dev;
215}
216
217static inline bool is_drm_iommu_supported(struct drm_device *drm_dev)
218{
219	struct exynos_drm_private *priv = drm_dev->dev_private;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
220
221	return priv->mapping ? true : false;
222}
 
 
 
223
224int exynos_drm_register_dma(struct drm_device *drm, struct device *dev,
225			    void **dma_priv);
226void exynos_drm_unregister_dma(struct drm_device *drm, struct device *dev,
227			       void **dma_priv);
228void exynos_drm_cleanup_dma(struct drm_device *drm);
229
230#ifdef CONFIG_DRM_EXYNOS_DPI
231struct drm_encoder *exynos_dpi_probe(struct device *dev);
232int exynos_dpi_remove(struct drm_encoder *encoder);
233int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
234#else
235static inline struct drm_encoder *
236exynos_dpi_probe(struct device *dev) { return NULL; }
237static inline int exynos_dpi_remove(struct drm_encoder *encoder)
238{
239	return 0;
240}
241static inline int exynos_dpi_bind(struct drm_device *dev,
242				  struct drm_encoder *encoder)
243{
244	return 0;
245}
246#endif
247
248#ifdef CONFIG_DRM_EXYNOS_FIMC
249int exynos_drm_check_fimc_device(struct device *dev);
250#else
251static inline int exynos_drm_check_fimc_device(struct device *dev)
252{
253	return 0;
254}
255#endif
256
257int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
258			 bool nonblock);
 
259
260
261extern struct platform_driver fimd_driver;
262extern struct platform_driver exynos5433_decon_driver;
263extern struct platform_driver decon_driver;
264extern struct platform_driver dp_driver;
265extern struct platform_driver dsi_driver;
266extern struct platform_driver mixer_driver;
267extern struct platform_driver hdmi_driver;
268extern struct platform_driver vidi_driver;
269extern struct platform_driver g2d_driver;
270extern struct platform_driver fimc_driver;
271extern struct platform_driver rotator_driver;
272extern struct platform_driver scaler_driver;
273extern struct platform_driver gsc_driver;
 
274extern struct platform_driver mic_driver;
275#endif
v4.10.11
 
  1/* exynos_drm_drv.h
  2 *
  3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4 * Authors:
  5 *	Inki Dae <inki.dae@samsung.com>
  6 *	Joonyoung Shim <jy0922.shim@samsung.com>
  7 *	Seung-Woo Kim <sw0312.kim@samsung.com>
  8 *
  9 * This program is free software; you can redistribute  it and/or modify it
 10 * under  the terms of  the GNU General  Public License as published by the
 11 * Free Software Foundation;  either version 2 of the  License, or (at your
 12 * option) any later version.
 13 */
 14
 15#ifndef _EXYNOS_DRM_DRV_H_
 16#define _EXYNOS_DRM_DRV_H_
 17
 18#include <drm/drmP.h>
 19#include <linux/module.h>
 20
 
 
 
 
 21#define MAX_CRTC	3
 22#define MAX_PLANE	5
 23#define MAX_FB_BUFFER	4
 24
 25#define DEFAULT_WIN	0
 26
 
 
 
 27#define to_exynos_crtc(x)	container_of(x, struct exynos_drm_crtc, base)
 28#define to_exynos_plane(x)	container_of(x, struct exynos_drm_plane, base)
 29
 30/* this enumerates display type. */
 31enum exynos_drm_output_type {
 32	EXYNOS_DISPLAY_TYPE_NONE,
 33	/* RGB or CPU Interface. */
 34	EXYNOS_DISPLAY_TYPE_LCD,
 35	/* HDMI Interface. */
 36	EXYNOS_DISPLAY_TYPE_HDMI,
 37	/* Virtual Display Interface. */
 38	EXYNOS_DISPLAY_TYPE_VIDI,
 39};
 40
 41struct exynos_drm_rect {
 42	unsigned int x, y;
 43	unsigned int w, h;
 44};
 45
 46/*
 47 * Exynos drm plane state structure.
 48 *
 49 * @base: plane_state object (contains drm_framebuffer pointer)
 50 * @src: rectangle of the source image data to be displayed (clipped to
 51 *       visible part).
 52 * @crtc: rectangle of the target image position on hardware screen
 53 *       (clipped to visible part).
 54 * @h_ratio: horizontal scaling ratio, 16.16 fixed point
 55 * @v_ratio: vertical scaling ratio, 16.16 fixed point
 56 *
 57 * this structure consists plane state data that will be applied to hardware
 58 * specific overlay info.
 59 */
 60
 61struct exynos_drm_plane_state {
 62	struct drm_plane_state base;
 63	struct exynos_drm_rect crtc;
 64	struct exynos_drm_rect src;
 65	unsigned int h_ratio;
 66	unsigned int v_ratio;
 67};
 68
 69static inline struct exynos_drm_plane_state *
 70to_exynos_plane_state(struct drm_plane_state *state)
 71{
 72	return container_of(state, struct exynos_drm_plane_state, base);
 73}
 74
 75/*
 76 * Exynos drm common overlay structure.
 77 *
 78 * @base: plane object
 79 * @index: hardware index of the overlay layer
 80 *
 81 * this structure is common to exynos SoC and its contents would be copied
 82 * to hardware specific overlay info.
 83 */
 84
 85struct exynos_drm_plane {
 86	struct drm_plane base;
 87	const struct exynos_drm_plane_config *config;
 88	unsigned int index;
 89};
 90
 91#define EXYNOS_DRM_PLANE_CAP_DOUBLE	(1 << 0)
 92#define EXYNOS_DRM_PLANE_CAP_SCALE	(1 << 1)
 93#define EXYNOS_DRM_PLANE_CAP_ZPOS	(1 << 2)
 
 
 
 94
 95/*
 96 * Exynos DRM plane configuration structure.
 97 *
 98 * @zpos: initial z-position of the plane.
 99 * @type: type of the plane (primary, cursor or overlay).
100 * @pixel_formats: supported pixel formats.
101 * @num_pixel_formats: number of elements in 'pixel_formats'.
102 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
103 */
104
105struct exynos_drm_plane_config {
106	unsigned int zpos;
107	enum drm_plane_type type;
108	const uint32_t *pixel_formats;
109	unsigned int num_pixel_formats;
110	unsigned int capabilities;
111};
112
113/*
114 * Exynos drm crtc ops
115 *
116 * @enable: enable the device
117 * @disable: disable the device
118 * @commit: set current hw specific display mode to hw.
119 * @enable_vblank: specific driver callback for enabling vblank interrupt.
120 * @disable_vblank: specific driver callback for disabling vblank interrupt.
 
121 * @atomic_check: validate state
122 * @atomic_begin: prepare device to receive an update
123 * @atomic_flush: mark the end of device update
124 * @update_plane: apply hardware specific overlay data to registers.
125 * @disable_plane: disable hardware specific overlay.
126 * @te_handler: trigger to transfer video image at the tearing effect
127 *	synchronization signal if there is a page flip request.
128 */
129struct exynos_drm_crtc;
130struct exynos_drm_crtc_ops {
131	void (*enable)(struct exynos_drm_crtc *crtc);
132	void (*disable)(struct exynos_drm_crtc *crtc);
133	void (*commit)(struct exynos_drm_crtc *crtc);
134	int (*enable_vblank)(struct exynos_drm_crtc *crtc);
135	void (*disable_vblank)(struct exynos_drm_crtc *crtc);
 
 
 
 
 
136	int (*atomic_check)(struct exynos_drm_crtc *crtc,
137			    struct drm_crtc_state *state);
138	void (*atomic_begin)(struct exynos_drm_crtc *crtc);
139	void (*update_plane)(struct exynos_drm_crtc *crtc,
140			     struct exynos_drm_plane *plane);
141	void (*disable_plane)(struct exynos_drm_crtc *crtc,
142			      struct exynos_drm_plane *plane);
143	void (*atomic_flush)(struct exynos_drm_crtc *crtc);
144	void (*te_handler)(struct exynos_drm_crtc *crtc);
145};
146
147struct exynos_drm_clk {
148	void (*enable)(struct exynos_drm_clk *clk, bool enable);
149};
150
151/*
152 * Exynos specific crtc structure.
153 *
154 * @base: crtc object.
155 * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
156 * @pipe: a crtc index created at load() with a new crtc object creation
157 *	and the crtc object would be set to private->crtc array
158 *	to get a crtc object corresponding to this pipe from private->crtc
159 *	array when irq interrupt occurred. the reason of using this pipe is that
160 *	drm framework doesn't support multiple irq yet.
161 *	we can refer to the crtc to current hardware interrupt occurred through
162 *	this pipe value.
163 * @enabled: if the crtc is enabled or not
164 * @event: vblank event that is currently queued for flip
165 * @wait_update: wait all pending planes updates to finish
166 * @pending_update: number of pending plane updates in this crtc
167 * @ops: pointer to callbacks for exynos drm specific functionality
168 * @ctx: A pointer to the crtc's implementation specific context
 
169 */
170struct exynos_drm_crtc {
171	struct drm_crtc			base;
172	enum exynos_drm_output_type	type;
173	unsigned int			pipe;
174	const struct exynos_drm_crtc_ops	*ops;
175	void				*ctx;
176	struct exynos_drm_clk		*pipe_clk;
 
177};
178
179static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
180					      bool enable)
181{
182	if (crtc->pipe_clk)
183		crtc->pipe_clk->enable(crtc->pipe_clk, enable);
184}
185
186struct exynos_drm_g2d_private {
187	struct device		*dev;
188	struct list_head	inuse_cmdlist;
189	struct list_head	event_list;
190	struct list_head	userptr_list;
191};
192
193struct drm_exynos_file_private {
194	struct exynos_drm_g2d_private	*g2d_priv;
195	struct device			*ipp_dev;
196};
197
198/*
199 * Exynos drm private structure.
200 *
201 * @da_start: start address to device address space.
202 *	with iommu, device address space starts from this address
203 *	otherwise default one.
204 * @da_space_size: size of device address space.
205 *	if 0 then default value is used for it.
206 * @pipe: the pipe number for this crtc/manager.
207 * @pending: the crtcs that have pending updates to finish
208 * @lock: protect access to @pending
209 * @wait: wait an atomic commit to finish
210 */
211struct exynos_drm_private {
212	struct drm_fb_helper *fb_helper;
213
214	/*
215	 * created crtc object would be contained at this array and
216	 * this array is used to be aware of which crtc did it request vblank.
217	 */
218	struct drm_crtc *crtc[MAX_CRTC];
219
220	struct device *dma_dev;
221	void *mapping;
222
223	unsigned int pipe;
224
225	/* for atomic commit */
226	u32			pending;
227	spinlock_t		lock;
228	wait_queue_head_t	wait;
229};
230
231static inline struct exynos_drm_crtc *
232exynos_drm_crtc_from_pipe(struct drm_device *dev, int pipe)
233{
234	struct exynos_drm_private *private = dev->dev_private;
235
236	return to_exynos_crtc(private->crtc[pipe]);
237}
238
239static inline struct device *to_dma_dev(struct drm_device *dev)
240{
241	struct exynos_drm_private *priv = dev->dev_private;
242
243	return priv->dma_dev;
244}
245
246/*
247 * Exynos drm sub driver structure.
248 *
249 * @list: sub driver has its own list object to register to exynos drm driver.
250 * @dev: pointer to device object for subdrv device driver.
251 * @drm_dev: pointer to drm_device and this pointer would be set
252 *	when sub driver calls exynos_drm_subdrv_register().
253 * @probe: this callback would be called by exynos drm driver after
254 *     subdrv is registered to it.
255 * @remove: this callback is used to release resources created
256 *     by probe callback.
257 * @open: this would be called with drm device file open.
258 * @close: this would be called with drm device file close.
259 */
260struct exynos_drm_subdrv {
261	struct list_head list;
262	struct device *dev;
263	struct drm_device *drm_dev;
264
265	int (*probe)(struct drm_device *drm_dev, struct device *dev);
266	void (*remove)(struct drm_device *drm_dev, struct device *dev);
267	int (*open)(struct drm_device *drm_dev, struct device *dev,
268			struct drm_file *file);
269	void (*close)(struct drm_device *drm_dev, struct device *dev,
270			struct drm_file *file);
271};
272
273 /* This function would be called by non kms drivers such as g2d and ipp. */
274int exynos_drm_subdrv_register(struct exynos_drm_subdrv *drm_subdrv);
275
276/* this function removes subdrv list from exynos drm driver */
277int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *drm_subdrv);
278
279int exynos_drm_device_subdrv_probe(struct drm_device *dev);
280int exynos_drm_device_subdrv_remove(struct drm_device *dev);
281int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file);
282void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file);
 
283
284#ifdef CONFIG_DRM_EXYNOS_DPI
285struct drm_encoder *exynos_dpi_probe(struct device *dev);
286int exynos_dpi_remove(struct drm_encoder *encoder);
287int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
288#else
289static inline struct drm_encoder *
290exynos_dpi_probe(struct device *dev) { return NULL; }
291static inline int exynos_dpi_remove(struct drm_encoder *encoder)
292{
293	return 0;
294}
295static inline int exynos_dpi_bind(struct drm_device *dev,
296				  struct drm_encoder *encoder)
297{
298	return 0;
299}
300#endif
301
 
 
 
 
 
 
 
 
 
302int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
303			 bool nonblock);
304int exynos_atomic_check(struct drm_device *dev, struct drm_atomic_state *state);
305
306
307extern struct platform_driver fimd_driver;
308extern struct platform_driver exynos5433_decon_driver;
309extern struct platform_driver decon_driver;
310extern struct platform_driver dp_driver;
311extern struct platform_driver dsi_driver;
312extern struct platform_driver mixer_driver;
313extern struct platform_driver hdmi_driver;
314extern struct platform_driver vidi_driver;
315extern struct platform_driver g2d_driver;
316extern struct platform_driver fimc_driver;
317extern struct platform_driver rotator_driver;
 
318extern struct platform_driver gsc_driver;
319extern struct platform_driver ipp_driver;
320extern struct platform_driver mic_driver;
321#endif