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v6.8
 1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _SPARC64_CACHEFLUSH_H
 3#define _SPARC64_CACHEFLUSH_H
 4
 5#include <asm/page.h>
 6
 7#ifndef __ASSEMBLY__
 8
 9#include <linux/mm.h>
10
11/* Cache flush operations. */
12#define flushw_all()	__asm__ __volatile__("flushw")
13
14void __flushw_user(void);
15#define flushw_user() __flushw_user()
16
17#define flush_user_windows flushw_user
18#define flush_register_windows flushw_all
19
20/* These are the same regardless of whether this is an SMP kernel or not. */
21#define flush_cache_mm(__mm) \
22	do { if ((__mm) == current->mm) flushw_user(); } while(0)
23#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
24#define flush_cache_range(vma, start, end) \
25	flush_cache_mm((vma)->vm_mm)
26#define flush_cache_page(vma, page, pfn) \
27	flush_cache_mm((vma)->vm_mm)
28
29/*
30 * On spitfire, the icache doesn't snoop local stores and we don't
31 * use block commit stores (which invalidate icache lines) during
32 * module load, so we need this.
33 */
34void flush_icache_range(unsigned long start, unsigned long end);
35void __flush_icache_page(unsigned long);
36
37void __flush_dcache_page(void *addr, int flush_icache);
38void flush_dcache_folio_impl(struct folio *folio);
39#ifdef CONFIG_SMP
40void smp_flush_dcache_folio_impl(struct folio *folio, int cpu);
41void flush_dcache_folio_all(struct mm_struct *mm, struct folio *folio);
42#else
43#define smp_flush_dcache_folio_impl(folio, cpu) flush_dcache_folio_impl(folio)
44#define flush_dcache_folio_all(mm, folio) flush_dcache_folio_impl(folio)
45#endif
46
47void __flush_dcache_range(unsigned long start, unsigned long end);
48#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
49void flush_dcache_folio(struct folio *folio);
50#define flush_dcache_folio flush_dcache_folio
51static inline void flush_dcache_page(struct page *page)
52{
53	flush_dcache_folio(page_folio(page));
54}
55
56void flush_ptrace_access(struct vm_area_struct *, struct page *,
57			 unsigned long uaddr, void *kaddr,
58			 unsigned long len, int write);
59
60#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
61	do {								\
62		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
63		memcpy(dst, src, len);					\
64		flush_ptrace_access(vma, page, vaddr, src, len, 0);	\
65	} while (0)
66
67#define copy_from_user_page(vma, page, vaddr, dst, src, len) 		\
68	do {								\
69		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
70		memcpy(dst, src, len);					\
71		flush_ptrace_access(vma, page, vaddr, dst, len, 1);	\
72	} while (0)
73
74#define flush_dcache_mmap_lock(mapping)		do { } while (0)
75#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
76
77#define flush_cache_vmap(start, end)		do { } while (0)
78#define flush_cache_vmap_early(start, end)	do { } while (0)
79#define flush_cache_vunmap(start, end)		do { } while (0)
80
81#endif /* !__ASSEMBLY__ */
82
83#endif /* _SPARC64_CACHEFLUSH_H */
v4.10.11
 
 1#ifndef _SPARC64_CACHEFLUSH_H
 2#define _SPARC64_CACHEFLUSH_H
 3
 4#include <asm/page.h>
 5
 6#ifndef __ASSEMBLY__
 7
 8#include <linux/mm.h>
 9
10/* Cache flush operations. */
11#define flushw_all()	__asm__ __volatile__("flushw")
12
13void __flushw_user(void);
14#define flushw_user() __flushw_user()
15
16#define flush_user_windows flushw_user
17#define flush_register_windows flushw_all
18
19/* These are the same regardless of whether this is an SMP kernel or not. */
20#define flush_cache_mm(__mm) \
21	do { if ((__mm) == current->mm) flushw_user(); } while(0)
22#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
23#define flush_cache_range(vma, start, end) \
24	flush_cache_mm((vma)->vm_mm)
25#define flush_cache_page(vma, page, pfn) \
26	flush_cache_mm((vma)->vm_mm)
27
28/*
29 * On spitfire, the icache doesn't snoop local stores and we don't
30 * use block commit stores (which invalidate icache lines) during
31 * module load, so we need this.
32 */
33void flush_icache_range(unsigned long start, unsigned long end);
34void __flush_icache_page(unsigned long);
35
36void __flush_dcache_page(void *addr, int flush_icache);
37void flush_dcache_page_impl(struct page *page);
38#ifdef CONFIG_SMP
39void smp_flush_dcache_page_impl(struct page *page, int cpu);
40void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
41#else
42#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
43#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
44#endif
45
46void __flush_dcache_range(unsigned long start, unsigned long end);
47#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
48void flush_dcache_page(struct page *page);
49
50#define flush_icache_page(vma, pg)	do { } while(0)
51#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
 
 
52
53void flush_ptrace_access(struct vm_area_struct *, struct page *,
54			 unsigned long uaddr, void *kaddr,
55			 unsigned long len, int write);
56
57#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
58	do {								\
59		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
60		memcpy(dst, src, len);					\
61		flush_ptrace_access(vma, page, vaddr, src, len, 0);	\
62	} while (0)
63
64#define copy_from_user_page(vma, page, vaddr, dst, src, len) 		\
65	do {								\
66		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
67		memcpy(dst, src, len);					\
68		flush_ptrace_access(vma, page, vaddr, dst, len, 1);	\
69	} while (0)
70
71#define flush_dcache_mmap_lock(mapping)		do { } while (0)
72#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
73
74#define flush_cache_vmap(start, end)		do { } while (0)
 
75#define flush_cache_vunmap(start, end)		do { } while (0)
76
77#endif /* !__ASSEMBLY__ */
78
79#endif /* _SPARC64_CACHEFLUSH_H */