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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
6 *
7 * Copyright (C) 1999 Harald Koerfgen
8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10 * Copyright (C) 2000-2002 Toshiba Corporation
11 *
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
13 */
14
15#include <linux/module.h>
16#include <linux/ioport.h>
17#include <linux/init.h>
18#include <linux/console.h>
19#include <linux/delay.h>
20#include <linux/platform_device.h>
21#include <linux/pci.h>
22#include <linux/serial_core.h>
23#include <linux/serial.h>
24#include <linux/tty.h>
25#include <linux/tty_flip.h>
26
27#include <linux/io.h>
28
29#define PASS_LIMIT 256
30
31#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
32/* "ttyS" is used for standard serial driver */
33#define TXX9_TTY_NAME "ttyTX"
34#define TXX9_TTY_MINOR_START 196
35#define TXX9_TTY_MAJOR 204
36#else
37/* acts like standard serial driver */
38#define TXX9_TTY_NAME "ttyS"
39#define TXX9_TTY_MINOR_START 64
40#define TXX9_TTY_MAJOR TTY_MAJOR
41#endif
42
43/* flag aliases */
44#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
45#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
46
47#ifdef CONFIG_PCI
48/* support for Toshiba TC86C001 SIO */
49#define ENABLE_SERIAL_TXX9_PCI
50#endif
51
52/*
53 * Number of serial ports
54 */
55#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
56
57#define TXX9_REGION_SIZE 0x24
58
59/* TXX9 Serial Registers */
60#define TXX9_SILCR 0x00
61#define TXX9_SIDICR 0x04
62#define TXX9_SIDISR 0x08
63#define TXX9_SICISR 0x0c
64#define TXX9_SIFCR 0x10
65#define TXX9_SIFLCR 0x14
66#define TXX9_SIBGR 0x18
67#define TXX9_SITFIFO 0x1c
68#define TXX9_SIRFIFO 0x20
69
70/* SILCR : Line Control */
71#define TXX9_SILCR_SCS_MASK 0x00000060
72#define TXX9_SILCR_SCS_IMCLK 0x00000000
73#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
74#define TXX9_SILCR_SCS_SCLK 0x00000040
75#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
76#define TXX9_SILCR_UEPS 0x00000010
77#define TXX9_SILCR_UPEN 0x00000008
78#define TXX9_SILCR_USBL_MASK 0x00000004
79#define TXX9_SILCR_USBL_1BIT 0x00000000
80#define TXX9_SILCR_USBL_2BIT 0x00000004
81#define TXX9_SILCR_UMODE_MASK 0x00000003
82#define TXX9_SILCR_UMODE_8BIT 0x00000000
83#define TXX9_SILCR_UMODE_7BIT 0x00000001
84
85/* SIDICR : DMA/Int. Control */
86#define TXX9_SIDICR_TDE 0x00008000
87#define TXX9_SIDICR_RDE 0x00004000
88#define TXX9_SIDICR_TIE 0x00002000
89#define TXX9_SIDICR_RIE 0x00001000
90#define TXX9_SIDICR_SPIE 0x00000800
91#define TXX9_SIDICR_CTSAC 0x00000600
92#define TXX9_SIDICR_STIE_MASK 0x0000003f
93#define TXX9_SIDICR_STIE_OERS 0x00000020
94#define TXX9_SIDICR_STIE_CTSS 0x00000010
95#define TXX9_SIDICR_STIE_RBRKD 0x00000008
96#define TXX9_SIDICR_STIE_TRDY 0x00000004
97#define TXX9_SIDICR_STIE_TXALS 0x00000002
98#define TXX9_SIDICR_STIE_UBRKD 0x00000001
99
100/* SIDISR : DMA/Int. Status */
101#define TXX9_SIDISR_UBRK 0x00008000
102#define TXX9_SIDISR_UVALID 0x00004000
103#define TXX9_SIDISR_UFER 0x00002000
104#define TXX9_SIDISR_UPER 0x00001000
105#define TXX9_SIDISR_UOER 0x00000800
106#define TXX9_SIDISR_ERI 0x00000400
107#define TXX9_SIDISR_TOUT 0x00000200
108#define TXX9_SIDISR_TDIS 0x00000100
109#define TXX9_SIDISR_RDIS 0x00000080
110#define TXX9_SIDISR_STIS 0x00000040
111#define TXX9_SIDISR_RFDN_MASK 0x0000001f
112
113/* SICISR : Change Int. Status */
114#define TXX9_SICISR_OERS 0x00000020
115#define TXX9_SICISR_CTSS 0x00000010
116#define TXX9_SICISR_RBRKD 0x00000008
117#define TXX9_SICISR_TRDY 0x00000004
118#define TXX9_SICISR_TXALS 0x00000002
119#define TXX9_SICISR_UBRKD 0x00000001
120
121/* SIFCR : FIFO Control */
122#define TXX9_SIFCR_SWRST 0x00008000
123#define TXX9_SIFCR_RDIL_MASK 0x00000180
124#define TXX9_SIFCR_RDIL_1 0x00000000
125#define TXX9_SIFCR_RDIL_4 0x00000080
126#define TXX9_SIFCR_RDIL_8 0x00000100
127#define TXX9_SIFCR_RDIL_12 0x00000180
128#define TXX9_SIFCR_RDIL_MAX 0x00000180
129#define TXX9_SIFCR_TDIL_MASK 0x00000018
130#define TXX9_SIFCR_TDIL_1 0x00000000
131#define TXX9_SIFCR_TDIL_4 0x00000001
132#define TXX9_SIFCR_TDIL_8 0x00000010
133#define TXX9_SIFCR_TDIL_MAX 0x00000010
134#define TXX9_SIFCR_TFRST 0x00000004
135#define TXX9_SIFCR_RFRST 0x00000002
136#define TXX9_SIFCR_FRSTE 0x00000001
137#define TXX9_SIO_TX_FIFO 8
138#define TXX9_SIO_RX_FIFO 16
139
140/* SIFLCR : Flow Control */
141#define TXX9_SIFLCR_RCS 0x00001000
142#define TXX9_SIFLCR_TES 0x00000800
143#define TXX9_SIFLCR_RTSSC 0x00000200
144#define TXX9_SIFLCR_RSDE 0x00000100
145#define TXX9_SIFLCR_TSDE 0x00000080
146#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
147#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
148#define TXX9_SIFLCR_TBRK 0x00000001
149
150/* SIBGR : Baudrate Control */
151#define TXX9_SIBGR_BCLK_MASK 0x00000300
152#define TXX9_SIBGR_BCLK_T0 0x00000000
153#define TXX9_SIBGR_BCLK_T2 0x00000100
154#define TXX9_SIBGR_BCLK_T4 0x00000200
155#define TXX9_SIBGR_BCLK_T6 0x00000300
156#define TXX9_SIBGR_BRD_MASK 0x000000ff
157
158static inline unsigned int sio_in(struct uart_port *up, int offset)
159{
160 switch (up->iotype) {
161 default:
162 return __raw_readl(up->membase + offset);
163 case UPIO_PORT:
164 return inl(up->iobase + offset);
165 }
166}
167
168static inline void
169sio_out(struct uart_port *up, int offset, int value)
170{
171 switch (up->iotype) {
172 default:
173 __raw_writel(value, up->membase + offset);
174 break;
175 case UPIO_PORT:
176 outl(value, up->iobase + offset);
177 break;
178 }
179}
180
181static inline void
182sio_mask(struct uart_port *up, int offset, unsigned int value)
183{
184 sio_out(up, offset, sio_in(up, offset) & ~value);
185}
186static inline void
187sio_set(struct uart_port *up, int offset, unsigned int value)
188{
189 sio_out(up, offset, sio_in(up, offset) | value);
190}
191
192static inline void
193sio_quot_set(struct uart_port *up, int quot)
194{
195 quot >>= 1;
196 if (quot < 256)
197 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
198 else if (quot < (256 << 2))
199 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
200 else if (quot < (256 << 4))
201 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
202 else if (quot < (256 << 6))
203 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
204 else
205 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
206}
207
208static void serial_txx9_stop_tx(struct uart_port *up)
209{
210 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
211}
212
213static void serial_txx9_start_tx(struct uart_port *up)
214{
215 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
216}
217
218static void serial_txx9_stop_rx(struct uart_port *up)
219{
220 up->read_status_mask &= ~TXX9_SIDISR_RDIS;
221}
222
223static void serial_txx9_initialize(struct uart_port *up)
224{
225 unsigned int tmout = 10000;
226
227 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
228 /* TX4925 BUG WORKAROUND. Accessing SIOC register
229 * immediately after soft reset causes bus error. */
230 udelay(1);
231 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
232 udelay(1);
233 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
234 sio_set(up, TXX9_SIFCR,
235 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
236 /* initial settings */
237 sio_out(up, TXX9_SILCR,
238 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
239 ((up->flags & UPF_TXX9_USE_SCLK) ?
240 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
241 sio_quot_set(up, uart_get_divisor(up, 9600));
242 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
243 sio_out(up, TXX9_SIDICR, 0);
244}
245
246static inline void
247receive_chars(struct uart_port *up, unsigned int *status)
248{
249 unsigned int disr = *status;
250 int max_count = 256;
251 unsigned int next_ignore_status_mask;
252 u8 ch, flag;
253
254 do {
255 ch = sio_in(up, TXX9_SIRFIFO);
256 flag = TTY_NORMAL;
257 up->icount.rx++;
258
259 /* mask out RFDN_MASK bit added by previous overrun */
260 next_ignore_status_mask =
261 up->ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
262 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
263 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
264 /*
265 * For statistics only
266 */
267 if (disr & TXX9_SIDISR_UBRK) {
268 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
269 up->icount.brk++;
270 /*
271 * We do the SysRQ and SAK checking
272 * here because otherwise the break
273 * may get masked by ignore_status_mask
274 * or read_status_mask.
275 */
276 if (uart_handle_break(up))
277 goto ignore_char;
278 } else if (disr & TXX9_SIDISR_UPER)
279 up->icount.parity++;
280 else if (disr & TXX9_SIDISR_UFER)
281 up->icount.frame++;
282 if (disr & TXX9_SIDISR_UOER) {
283 up->icount.overrun++;
284 /*
285 * The receiver read buffer still hold
286 * a char which caused overrun.
287 * Ignore next char by adding RFDN_MASK
288 * to ignore_status_mask temporarily.
289 */
290 next_ignore_status_mask |=
291 TXX9_SIDISR_RFDN_MASK;
292 }
293
294 /*
295 * Mask off conditions which should be ingored.
296 */
297 disr &= up->read_status_mask;
298
299 if (disr & TXX9_SIDISR_UBRK) {
300 flag = TTY_BREAK;
301 } else if (disr & TXX9_SIDISR_UPER)
302 flag = TTY_PARITY;
303 else if (disr & TXX9_SIDISR_UFER)
304 flag = TTY_FRAME;
305 }
306 if (uart_handle_sysrq_char(up, ch))
307 goto ignore_char;
308
309 uart_insert_char(up, disr, TXX9_SIDISR_UOER, ch, flag);
310
311 ignore_char:
312 up->ignore_status_mask = next_ignore_status_mask;
313 disr = sio_in(up, TXX9_SIDISR);
314 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
315
316 tty_flip_buffer_push(&up->state->port);
317
318 *status = disr;
319}
320
321static inline void transmit_chars(struct uart_port *up)
322{
323 u8 ch;
324
325 uart_port_tx_limited(up, ch, TXX9_SIO_TX_FIFO,
326 true,
327 sio_out(up, TXX9_SITFIFO, ch),
328 ({}));
329}
330
331static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
332{
333 int pass_counter = 0;
334 struct uart_port *up = dev_id;
335 unsigned int status;
336
337 while (1) {
338 uart_port_lock(up);
339 status = sio_in(up, TXX9_SIDISR);
340 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
341 status &= ~TXX9_SIDISR_TDIS;
342 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
343 TXX9_SIDISR_TOUT))) {
344 uart_port_unlock(up);
345 break;
346 }
347
348 if (status & TXX9_SIDISR_RDIS)
349 receive_chars(up, &status);
350 if (status & TXX9_SIDISR_TDIS)
351 transmit_chars(up);
352 /* Clear TX/RX Int. Status */
353 sio_mask(up, TXX9_SIDISR,
354 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
355 TXX9_SIDISR_TOUT);
356 uart_port_unlock(up);
357
358 if (pass_counter++ > PASS_LIMIT)
359 break;
360 }
361
362 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
363}
364
365static unsigned int serial_txx9_tx_empty(struct uart_port *up)
366{
367 unsigned long flags;
368 unsigned int ret;
369
370 uart_port_lock_irqsave(up, &flags);
371 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
372 uart_port_unlock_irqrestore(up, flags);
373
374 return ret;
375}
376
377static unsigned int serial_txx9_get_mctrl(struct uart_port *up)
378{
379 unsigned int ret;
380
381 /* no modem control lines */
382 ret = TIOCM_CAR | TIOCM_DSR;
383 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
384 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
385
386 return ret;
387}
388
389static void serial_txx9_set_mctrl(struct uart_port *up, unsigned int mctrl)
390{
391
392 if (mctrl & TIOCM_RTS)
393 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
394 else
395 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
396}
397
398static void serial_txx9_break_ctl(struct uart_port *up, int break_state)
399{
400 unsigned long flags;
401
402 uart_port_lock_irqsave(up, &flags);
403 if (break_state == -1)
404 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
405 else
406 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
407 uart_port_unlock_irqrestore(up, flags);
408}
409
410#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
411/*
412 * Wait for transmitter & holding register to empty
413 */
414static void wait_for_xmitr(struct uart_port *up)
415{
416 unsigned int tmout = 10000;
417
418 /* Wait up to 10ms for the character(s) to be sent. */
419 while (--tmout &&
420 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
421 udelay(1);
422
423 /* Wait up to 1s for flow control if necessary */
424 if (up->flags & UPF_CONS_FLOW) {
425 tmout = 1000000;
426 while (--tmout &&
427 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
428 udelay(1);
429 }
430}
431#endif
432
433#ifdef CONFIG_CONSOLE_POLL
434/*
435 * Console polling routines for writing and reading from the uart while
436 * in an interrupt or debug context.
437 */
438
439static int serial_txx9_get_poll_char(struct uart_port *up)
440{
441 unsigned int ier;
442 unsigned char c;
443
444 /*
445 * First save the IER then disable the interrupts
446 */
447 ier = sio_in(up, TXX9_SIDICR);
448 sio_out(up, TXX9_SIDICR, 0);
449
450 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
451 ;
452
453 c = sio_in(up, TXX9_SIRFIFO);
454
455 /*
456 * Finally, clear RX interrupt status
457 * and restore the IER
458 */
459 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
460 sio_out(up, TXX9_SIDICR, ier);
461 return c;
462}
463
464
465static void serial_txx9_put_poll_char(struct uart_port *up, unsigned char c)
466{
467 unsigned int ier;
468
469 /*
470 * First save the IER then disable the interrupts
471 */
472 ier = sio_in(up, TXX9_SIDICR);
473 sio_out(up, TXX9_SIDICR, 0);
474
475 wait_for_xmitr(up);
476 /*
477 * Send the character out.
478 */
479 sio_out(up, TXX9_SITFIFO, c);
480
481 /*
482 * Finally, wait for transmitter to become empty
483 * and restore the IER
484 */
485 wait_for_xmitr(up);
486 sio_out(up, TXX9_SIDICR, ier);
487}
488
489#endif /* CONFIG_CONSOLE_POLL */
490
491static int serial_txx9_startup(struct uart_port *up)
492{
493 unsigned long flags;
494 int retval;
495
496 /*
497 * Clear the FIFO buffers and disable them.
498 * (they will be reenabled in set_termios())
499 */
500 sio_set(up, TXX9_SIFCR,
501 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
502 /* clear reset */
503 sio_mask(up, TXX9_SIFCR,
504 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
505 sio_out(up, TXX9_SIDICR, 0);
506
507 /*
508 * Clear the interrupt registers.
509 */
510 sio_out(up, TXX9_SIDISR, 0);
511
512 retval = request_irq(up->irq, serial_txx9_interrupt,
513 IRQF_SHARED, "serial_txx9", up);
514 if (retval)
515 return retval;
516
517 /*
518 * Now, initialize the UART
519 */
520 uart_port_lock_irqsave(up, &flags);
521 serial_txx9_set_mctrl(up, up->mctrl);
522 uart_port_unlock_irqrestore(up, flags);
523
524 /* Enable RX/TX */
525 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
526
527 /*
528 * Finally, enable interrupts.
529 */
530 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
531
532 return 0;
533}
534
535static void serial_txx9_shutdown(struct uart_port *up)
536{
537 unsigned long flags;
538
539 /*
540 * Disable interrupts from this port
541 */
542 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
543
544 uart_port_lock_irqsave(up, &flags);
545 serial_txx9_set_mctrl(up, up->mctrl);
546 uart_port_unlock_irqrestore(up, flags);
547
548 /*
549 * Disable break condition
550 */
551 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
552
553#ifdef CONFIG_SERIAL_TXX9_CONSOLE
554 if (up->cons && up->line == up->cons->index) {
555 free_irq(up->irq, up);
556 return;
557 }
558#endif
559 /* reset FIFOs */
560 sio_set(up, TXX9_SIFCR,
561 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
562 /* clear reset */
563 sio_mask(up, TXX9_SIFCR,
564 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
565
566 /* Disable RX/TX */
567 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
568
569 free_irq(up->irq, up);
570}
571
572static void
573serial_txx9_set_termios(struct uart_port *up, struct ktermios *termios,
574 const struct ktermios *old)
575{
576 unsigned int cval, fcr = 0;
577 unsigned long flags;
578 unsigned int baud, quot;
579
580 /*
581 * We don't support modem control lines.
582 */
583 termios->c_cflag &= ~(HUPCL | CMSPAR);
584 termios->c_cflag |= CLOCAL;
585
586 cval = sio_in(up, TXX9_SILCR);
587 /* byte size and parity */
588 cval &= ~TXX9_SILCR_UMODE_MASK;
589 switch (termios->c_cflag & CSIZE) {
590 case CS7:
591 cval |= TXX9_SILCR_UMODE_7BIT;
592 break;
593 default:
594 case CS5: /* not supported */
595 case CS6: /* not supported */
596 case CS8:
597 cval |= TXX9_SILCR_UMODE_8BIT;
598 termios->c_cflag &= ~CSIZE;
599 termios->c_cflag |= CS8;
600 break;
601 }
602
603 cval &= ~TXX9_SILCR_USBL_MASK;
604 if (termios->c_cflag & CSTOPB)
605 cval |= TXX9_SILCR_USBL_2BIT;
606 else
607 cval |= TXX9_SILCR_USBL_1BIT;
608 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
609 if (termios->c_cflag & PARENB)
610 cval |= TXX9_SILCR_UPEN;
611 if (!(termios->c_cflag & PARODD))
612 cval |= TXX9_SILCR_UEPS;
613
614 /*
615 * Ask the core to calculate the divisor for us.
616 */
617 baud = uart_get_baud_rate(up, termios, old, 0, up->uartclk/16/2);
618 quot = uart_get_divisor(up, baud);
619
620 /* Set up FIFOs */
621 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
622 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
623
624 /*
625 * Ok, we're now changing the port state. Do it with
626 * interrupts disabled.
627 */
628 uart_port_lock_irqsave(up, &flags);
629
630 /*
631 * Update the per-port timeout.
632 */
633 uart_update_timeout(up, termios->c_cflag, baud);
634
635 up->read_status_mask = TXX9_SIDISR_UOER |
636 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
637 if (termios->c_iflag & INPCK)
638 up->read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
639 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
640 up->read_status_mask |= TXX9_SIDISR_UBRK;
641
642 /*
643 * Characteres to ignore
644 */
645 up->ignore_status_mask = 0;
646 if (termios->c_iflag & IGNPAR)
647 up->ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
648 if (termios->c_iflag & IGNBRK) {
649 up->ignore_status_mask |= TXX9_SIDISR_UBRK;
650 /*
651 * If we're ignoring parity and break indicators,
652 * ignore overruns too (for real raw support).
653 */
654 if (termios->c_iflag & IGNPAR)
655 up->ignore_status_mask |= TXX9_SIDISR_UOER;
656 }
657
658 /*
659 * ignore all characters if CREAD is not set
660 */
661 if ((termios->c_cflag & CREAD) == 0)
662 up->ignore_status_mask |= TXX9_SIDISR_RDIS;
663
664 /* CTS flow control flag */
665 if ((termios->c_cflag & CRTSCTS) &&
666 (up->flags & UPF_TXX9_HAVE_CTS_LINE)) {
667 sio_set(up, TXX9_SIFLCR,
668 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
669 } else {
670 sio_mask(up, TXX9_SIFLCR,
671 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
672 }
673
674 sio_out(up, TXX9_SILCR, cval);
675 sio_quot_set(up, quot);
676 sio_out(up, TXX9_SIFCR, fcr);
677
678 serial_txx9_set_mctrl(up, up->mctrl);
679 uart_port_unlock_irqrestore(up, flags);
680}
681
682static void
683serial_txx9_pm(struct uart_port *port, unsigned int state,
684 unsigned int oldstate)
685{
686 /*
687 * If oldstate was -1 this is called from
688 * uart_configure_port(). In this case do not initialize the
689 * port now, because the port was already initialized (for
690 * non-console port) or should not be initialized here (for
691 * console port). If we initialized the port here we lose
692 * serial console settings.
693 */
694 if (state == 0 && oldstate != -1)
695 serial_txx9_initialize(port);
696}
697
698static int serial_txx9_request_resource(struct uart_port *up)
699{
700 unsigned int size = TXX9_REGION_SIZE;
701 int ret = 0;
702
703 switch (up->iotype) {
704 default:
705 if (!up->mapbase)
706 break;
707
708 if (!request_mem_region(up->mapbase, size, "serial_txx9")) {
709 ret = -EBUSY;
710 break;
711 }
712
713 if (up->flags & UPF_IOREMAP) {
714 up->membase = ioremap(up->mapbase, size);
715 if (!up->membase) {
716 release_mem_region(up->mapbase, size);
717 ret = -ENOMEM;
718 }
719 }
720 break;
721
722 case UPIO_PORT:
723 if (!request_region(up->iobase, size, "serial_txx9"))
724 ret = -EBUSY;
725 break;
726 }
727 return ret;
728}
729
730static void serial_txx9_release_resource(struct uart_port *up)
731{
732 unsigned int size = TXX9_REGION_SIZE;
733
734 switch (up->iotype) {
735 default:
736 if (!up->mapbase)
737 break;
738
739 if (up->flags & UPF_IOREMAP) {
740 iounmap(up->membase);
741 up->membase = NULL;
742 }
743
744 release_mem_region(up->mapbase, size);
745 break;
746
747 case UPIO_PORT:
748 release_region(up->iobase, size);
749 break;
750 }
751}
752
753static void serial_txx9_release_port(struct uart_port *up)
754{
755 serial_txx9_release_resource(up);
756}
757
758static int serial_txx9_request_port(struct uart_port *up)
759{
760 return serial_txx9_request_resource(up);
761}
762
763static void serial_txx9_config_port(struct uart_port *up, int uflags)
764{
765 int ret;
766
767 /*
768 * Find the region that we can probe for. This in turn
769 * tells us whether we can probe for the type of port.
770 */
771 ret = serial_txx9_request_resource(up);
772 if (ret < 0)
773 return;
774 up->type = PORT_TXX9;
775 up->fifosize = TXX9_SIO_TX_FIFO;
776
777#ifdef CONFIG_SERIAL_TXX9_CONSOLE
778 if (up->line == up->cons->index)
779 return;
780#endif
781 serial_txx9_initialize(up);
782}
783
784static const char *
785serial_txx9_type(struct uart_port *port)
786{
787 return "txx9";
788}
789
790static const struct uart_ops serial_txx9_pops = {
791 .tx_empty = serial_txx9_tx_empty,
792 .set_mctrl = serial_txx9_set_mctrl,
793 .get_mctrl = serial_txx9_get_mctrl,
794 .stop_tx = serial_txx9_stop_tx,
795 .start_tx = serial_txx9_start_tx,
796 .stop_rx = serial_txx9_stop_rx,
797 .break_ctl = serial_txx9_break_ctl,
798 .startup = serial_txx9_startup,
799 .shutdown = serial_txx9_shutdown,
800 .set_termios = serial_txx9_set_termios,
801 .pm = serial_txx9_pm,
802 .type = serial_txx9_type,
803 .release_port = serial_txx9_release_port,
804 .request_port = serial_txx9_request_port,
805 .config_port = serial_txx9_config_port,
806#ifdef CONFIG_CONSOLE_POLL
807 .poll_get_char = serial_txx9_get_poll_char,
808 .poll_put_char = serial_txx9_put_poll_char,
809#endif
810};
811
812static struct uart_port serial_txx9_ports[UART_NR];
813
814static void __init serial_txx9_register_ports(struct uart_driver *drv,
815 struct device *dev)
816{
817 int i;
818
819 for (i = 0; i < UART_NR; i++) {
820 struct uart_port *up = &serial_txx9_ports[i];
821
822 up->line = i;
823 up->ops = &serial_txx9_pops;
824 up->dev = dev;
825 if (up->iobase || up->mapbase)
826 uart_add_one_port(drv, up);
827 }
828}
829
830#ifdef CONFIG_SERIAL_TXX9_CONSOLE
831
832static void serial_txx9_console_putchar(struct uart_port *up, unsigned char ch)
833{
834 wait_for_xmitr(up);
835 sio_out(up, TXX9_SITFIFO, ch);
836}
837
838/*
839 * Print a string to the serial port trying not to disturb
840 * any possible real use of the port...
841 *
842 * The console_lock must be held when we get here.
843 */
844static void
845serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
846{
847 struct uart_port *up = &serial_txx9_ports[co->index];
848 unsigned int ier, flcr;
849
850 /*
851 * First save the UER then disable the interrupts
852 */
853 ier = sio_in(up, TXX9_SIDICR);
854 sio_out(up, TXX9_SIDICR, 0);
855 /*
856 * Disable flow-control if enabled (and unnecessary)
857 */
858 flcr = sio_in(up, TXX9_SIFLCR);
859 if (!(up->flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
860 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
861
862 uart_console_write(up, s, count, serial_txx9_console_putchar);
863
864 /*
865 * Finally, wait for transmitter to become empty
866 * and restore the IER
867 */
868 wait_for_xmitr(up);
869 sio_out(up, TXX9_SIFLCR, flcr);
870 sio_out(up, TXX9_SIDICR, ier);
871}
872
873static int __init serial_txx9_console_setup(struct console *co, char *options)
874{
875 struct uart_port *up;
876 int baud = 9600;
877 int bits = 8;
878 int parity = 'n';
879 int flow = 'n';
880
881 /*
882 * Check whether an invalid uart number has been specified, and
883 * if so, search for the first available port that does have
884 * console support.
885 */
886 if (co->index >= UART_NR)
887 co->index = 0;
888 up = &serial_txx9_ports[co->index];
889 if (!up->ops)
890 return -ENODEV;
891
892 serial_txx9_initialize(up);
893
894 if (options)
895 uart_parse_options(options, &baud, &parity, &bits, &flow);
896
897 return uart_set_options(up, co, baud, parity, bits, flow);
898}
899
900static struct uart_driver serial_txx9_reg;
901static struct console serial_txx9_console = {
902 .name = TXX9_TTY_NAME,
903 .write = serial_txx9_console_write,
904 .device = uart_console_device,
905 .setup = serial_txx9_console_setup,
906 .flags = CON_PRINTBUFFER,
907 .index = -1,
908 .data = &serial_txx9_reg,
909};
910
911static int __init serial_txx9_console_init(void)
912{
913 register_console(&serial_txx9_console);
914 return 0;
915}
916console_initcall(serial_txx9_console_init);
917
918#define SERIAL_TXX9_CONSOLE &serial_txx9_console
919#else
920#define SERIAL_TXX9_CONSOLE NULL
921#endif
922
923static struct uart_driver serial_txx9_reg = {
924 .owner = THIS_MODULE,
925 .driver_name = "serial_txx9",
926 .dev_name = TXX9_TTY_NAME,
927 .major = TXX9_TTY_MAJOR,
928 .minor = TXX9_TTY_MINOR_START,
929 .nr = UART_NR,
930 .cons = SERIAL_TXX9_CONSOLE,
931};
932
933int __init early_serial_txx9_setup(struct uart_port *port)
934{
935 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
936 return -ENODEV;
937
938 serial_txx9_ports[port->line] = *port;
939 serial_txx9_ports[port->line].ops = &serial_txx9_pops;
940 serial_txx9_ports[port->line].flags |=
941 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
942 return 0;
943}
944
945static DEFINE_MUTEX(serial_txx9_mutex);
946
947/**
948 * serial_txx9_register_port - register a serial port
949 * @port: serial port template
950 *
951 * Configure the serial port specified by the request.
952 *
953 * The port is then probed and if necessary the IRQ is autodetected
954 * If this fails an error is returned.
955 *
956 * On success the port is ready to use and the line number is returned.
957 */
958static int serial_txx9_register_port(struct uart_port *port)
959{
960 int i;
961 struct uart_port *uart;
962 int ret = -ENOSPC;
963
964 mutex_lock(&serial_txx9_mutex);
965 for (i = 0; i < UART_NR; i++) {
966 uart = &serial_txx9_ports[i];
967 if (uart_match_port(uart, port)) {
968 uart_remove_one_port(&serial_txx9_reg, uart);
969 break;
970 }
971 }
972 if (i == UART_NR) {
973 /* Find unused port */
974 for (i = 0; i < UART_NR; i++) {
975 uart = &serial_txx9_ports[i];
976 if (!(uart->iobase || uart->mapbase))
977 break;
978 }
979 }
980 if (i < UART_NR) {
981 uart->iobase = port->iobase;
982 uart->membase = port->membase;
983 uart->irq = port->irq;
984 uart->uartclk = port->uartclk;
985 uart->iotype = port->iotype;
986 uart->flags = port->flags
987 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
988 uart->mapbase = port->mapbase;
989 if (port->dev)
990 uart->dev = port->dev;
991 ret = uart_add_one_port(&serial_txx9_reg, uart);
992 if (ret == 0)
993 ret = uart->line;
994 }
995 mutex_unlock(&serial_txx9_mutex);
996 return ret;
997}
998
999/**
1000 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1001 * @line: serial line number
1002 *
1003 * Remove one serial port. This may not be called from interrupt
1004 * context. We hand the port back to the our control.
1005 */
1006static void serial_txx9_unregister_port(int line)
1007{
1008 struct uart_port *uart = &serial_txx9_ports[line];
1009
1010 mutex_lock(&serial_txx9_mutex);
1011 uart_remove_one_port(&serial_txx9_reg, uart);
1012 uart->flags = 0;
1013 uart->type = PORT_UNKNOWN;
1014 uart->iobase = 0;
1015 uart->mapbase = 0;
1016 uart->membase = NULL;
1017 uart->dev = NULL;
1018 mutex_unlock(&serial_txx9_mutex);
1019}
1020
1021/*
1022 * Register a set of serial devices attached to a platform device.
1023 */
1024static int serial_txx9_probe(struct platform_device *dev)
1025{
1026 struct uart_port *p = dev_get_platdata(&dev->dev);
1027 struct uart_port port;
1028 int ret, i;
1029
1030 memset(&port, 0, sizeof(struct uart_port));
1031 for (i = 0; p && p->uartclk != 0; p++, i++) {
1032 port.iobase = p->iobase;
1033 port.membase = p->membase;
1034 port.irq = p->irq;
1035 port.uartclk = p->uartclk;
1036 port.iotype = p->iotype;
1037 port.flags = p->flags;
1038 port.mapbase = p->mapbase;
1039 port.dev = &dev->dev;
1040 port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1041 ret = serial_txx9_register_port(&port);
1042 if (ret < 0) {
1043 dev_err(&dev->dev, "unable to register port at index %d "
1044 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1045 p->iobase, (unsigned long long)p->mapbase,
1046 p->irq, ret);
1047 }
1048 }
1049 return 0;
1050}
1051
1052/*
1053 * Remove serial ports registered against a platform device.
1054 */
1055static void serial_txx9_remove(struct platform_device *dev)
1056{
1057 int i;
1058
1059 for (i = 0; i < UART_NR; i++) {
1060 struct uart_port *up = &serial_txx9_ports[i];
1061
1062 if (up->dev == &dev->dev)
1063 serial_txx9_unregister_port(i);
1064 }
1065}
1066
1067#ifdef CONFIG_PM
1068static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1069{
1070 int i;
1071
1072 for (i = 0; i < UART_NR; i++) {
1073 struct uart_port *up = &serial_txx9_ports[i];
1074
1075 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1076 uart_suspend_port(&serial_txx9_reg, up);
1077 }
1078
1079 return 0;
1080}
1081
1082static int serial_txx9_resume(struct platform_device *dev)
1083{
1084 int i;
1085
1086 for (i = 0; i < UART_NR; i++) {
1087 struct uart_port *up = &serial_txx9_ports[i];
1088
1089 if (up->type != PORT_UNKNOWN && up->dev == &dev->dev)
1090 uart_resume_port(&serial_txx9_reg, up);
1091 }
1092
1093 return 0;
1094}
1095#endif
1096
1097static struct platform_driver serial_txx9_plat_driver = {
1098 .probe = serial_txx9_probe,
1099 .remove_new = serial_txx9_remove,
1100#ifdef CONFIG_PM
1101 .suspend = serial_txx9_suspend,
1102 .resume = serial_txx9_resume,
1103#endif
1104 .driver = {
1105 .name = "serial_txx9",
1106 },
1107};
1108
1109#ifdef ENABLE_SERIAL_TXX9_PCI
1110/*
1111 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1112 * to the arrangement of serial ports on a PCI card.
1113 */
1114static int
1115pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1116{
1117 struct uart_port port;
1118 int line;
1119 int rc;
1120
1121 rc = pci_enable_device(dev);
1122 if (rc)
1123 return rc;
1124
1125 memset(&port, 0, sizeof(port));
1126 port.ops = &serial_txx9_pops;
1127 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1128 port.uartclk = 66670000;
1129 port.irq = dev->irq;
1130 port.iotype = UPIO_PORT;
1131 port.iobase = pci_resource_start(dev, 1);
1132 port.dev = &dev->dev;
1133 line = serial_txx9_register_port(&port);
1134 if (line < 0) {
1135 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1136 pci_disable_device(dev);
1137 return line;
1138 }
1139 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1140
1141 return 0;
1142}
1143
1144static void pciserial_txx9_remove_one(struct pci_dev *dev)
1145{
1146 struct uart_port *up = pci_get_drvdata(dev);
1147
1148 if (up) {
1149 serial_txx9_unregister_port(up->line);
1150 pci_disable_device(dev);
1151 }
1152}
1153
1154#ifdef CONFIG_PM
1155static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1156{
1157 struct uart_port *up = pci_get_drvdata(dev);
1158
1159 if (up)
1160 uart_suspend_port(&serial_txx9_reg, up);
1161 pci_save_state(dev);
1162 pci_set_power_state(dev, pci_choose_state(dev, state));
1163 return 0;
1164}
1165
1166static int pciserial_txx9_resume_one(struct pci_dev *dev)
1167{
1168 struct uart_port *up = pci_get_drvdata(dev);
1169
1170 pci_set_power_state(dev, PCI_D0);
1171 pci_restore_state(dev);
1172 if (up)
1173 uart_resume_port(&serial_txx9_reg, up);
1174 return 0;
1175}
1176#endif
1177
1178static const struct pci_device_id serial_txx9_pci_tbl[] = {
1179 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1180 { 0, }
1181};
1182
1183static struct pci_driver serial_txx9_pci_driver = {
1184 .name = "serial_txx9",
1185 .probe = pciserial_txx9_init_one,
1186 .remove = pciserial_txx9_remove_one,
1187#ifdef CONFIG_PM
1188 .suspend = pciserial_txx9_suspend_one,
1189 .resume = pciserial_txx9_resume_one,
1190#endif
1191 .id_table = serial_txx9_pci_tbl,
1192};
1193
1194MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1195#endif /* ENABLE_SERIAL_TXX9_PCI */
1196
1197static struct platform_device *serial_txx9_plat_devs;
1198
1199static int __init serial_txx9_init(void)
1200{
1201 int ret;
1202
1203 ret = uart_register_driver(&serial_txx9_reg);
1204 if (ret)
1205 goto out;
1206
1207 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1208 if (!serial_txx9_plat_devs) {
1209 ret = -ENOMEM;
1210 goto unreg_uart_drv;
1211 }
1212
1213 ret = platform_device_add(serial_txx9_plat_devs);
1214 if (ret)
1215 goto put_dev;
1216
1217 serial_txx9_register_ports(&serial_txx9_reg,
1218 &serial_txx9_plat_devs->dev);
1219
1220 ret = platform_driver_register(&serial_txx9_plat_driver);
1221 if (ret)
1222 goto del_dev;
1223
1224#ifdef ENABLE_SERIAL_TXX9_PCI
1225 ret = pci_register_driver(&serial_txx9_pci_driver);
1226 if (ret) {
1227 platform_driver_unregister(&serial_txx9_plat_driver);
1228 }
1229#endif
1230 if (ret == 0)
1231 goto out;
1232
1233 del_dev:
1234 platform_device_del(serial_txx9_plat_devs);
1235 put_dev:
1236 platform_device_put(serial_txx9_plat_devs);
1237 unreg_uart_drv:
1238 uart_unregister_driver(&serial_txx9_reg);
1239 out:
1240 return ret;
1241}
1242
1243static void __exit serial_txx9_exit(void)
1244{
1245 int i;
1246
1247#ifdef ENABLE_SERIAL_TXX9_PCI
1248 pci_unregister_driver(&serial_txx9_pci_driver);
1249#endif
1250 platform_driver_unregister(&serial_txx9_plat_driver);
1251 platform_device_unregister(serial_txx9_plat_devs);
1252 for (i = 0; i < UART_NR; i++) {
1253 struct uart_port *up = &serial_txx9_ports[i];
1254 if (up->iobase || up->mapbase)
1255 uart_remove_one_port(&serial_txx9_reg, up);
1256 }
1257
1258 uart_unregister_driver(&serial_txx9_reg);
1259}
1260
1261module_init(serial_txx9_init);
1262module_exit(serial_txx9_exit);
1263
1264MODULE_LICENSE("GPL");
1265MODULE_DESCRIPTION("TX39/49 serial driver");
1266
1267MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
1/*
2 * Derived from many drivers using generic_serial interface,
3 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
4 * (was in Linux/VR tree) by Jim Pick.
5 *
6 * Copyright (C) 1999 Harald Koerfgen
7 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
8 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
9 * Copyright (C) 2000-2002 Toshiba Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
16 */
17
18#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
19#define SUPPORT_SYSRQ
20#endif
21
22#include <linux/module.h>
23#include <linux/ioport.h>
24#include <linux/init.h>
25#include <linux/console.h>
26#include <linux/delay.h>
27#include <linux/platform_device.h>
28#include <linux/pci.h>
29#include <linux/serial_core.h>
30#include <linux/serial.h>
31#include <linux/tty.h>
32#include <linux/tty_flip.h>
33
34#include <asm/io.h>
35
36static char *serial_version = "1.11";
37static char *serial_name = "TX39/49 Serial driver";
38
39#define PASS_LIMIT 256
40
41#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
42/* "ttyS" is used for standard serial driver */
43#define TXX9_TTY_NAME "ttyTX"
44#define TXX9_TTY_MINOR_START 196
45#define TXX9_TTY_MAJOR 204
46#else
47/* acts like standard serial driver */
48#define TXX9_TTY_NAME "ttyS"
49#define TXX9_TTY_MINOR_START 64
50#define TXX9_TTY_MAJOR TTY_MAJOR
51#endif
52
53/* flag aliases */
54#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
55#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
56
57#ifdef CONFIG_PCI
58/* support for Toshiba TC86C001 SIO */
59#define ENABLE_SERIAL_TXX9_PCI
60#endif
61
62/*
63 * Number of serial ports
64 */
65#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
66
67struct uart_txx9_port {
68 struct uart_port port;
69 /* No additional info for now */
70};
71
72#define TXX9_REGION_SIZE 0x24
73
74/* TXX9 Serial Registers */
75#define TXX9_SILCR 0x00
76#define TXX9_SIDICR 0x04
77#define TXX9_SIDISR 0x08
78#define TXX9_SICISR 0x0c
79#define TXX9_SIFCR 0x10
80#define TXX9_SIFLCR 0x14
81#define TXX9_SIBGR 0x18
82#define TXX9_SITFIFO 0x1c
83#define TXX9_SIRFIFO 0x20
84
85/* SILCR : Line Control */
86#define TXX9_SILCR_SCS_MASK 0x00000060
87#define TXX9_SILCR_SCS_IMCLK 0x00000000
88#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
89#define TXX9_SILCR_SCS_SCLK 0x00000040
90#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
91#define TXX9_SILCR_UEPS 0x00000010
92#define TXX9_SILCR_UPEN 0x00000008
93#define TXX9_SILCR_USBL_MASK 0x00000004
94#define TXX9_SILCR_USBL_1BIT 0x00000000
95#define TXX9_SILCR_USBL_2BIT 0x00000004
96#define TXX9_SILCR_UMODE_MASK 0x00000003
97#define TXX9_SILCR_UMODE_8BIT 0x00000000
98#define TXX9_SILCR_UMODE_7BIT 0x00000001
99
100/* SIDICR : DMA/Int. Control */
101#define TXX9_SIDICR_TDE 0x00008000
102#define TXX9_SIDICR_RDE 0x00004000
103#define TXX9_SIDICR_TIE 0x00002000
104#define TXX9_SIDICR_RIE 0x00001000
105#define TXX9_SIDICR_SPIE 0x00000800
106#define TXX9_SIDICR_CTSAC 0x00000600
107#define TXX9_SIDICR_STIE_MASK 0x0000003f
108#define TXX9_SIDICR_STIE_OERS 0x00000020
109#define TXX9_SIDICR_STIE_CTSS 0x00000010
110#define TXX9_SIDICR_STIE_RBRKD 0x00000008
111#define TXX9_SIDICR_STIE_TRDY 0x00000004
112#define TXX9_SIDICR_STIE_TXALS 0x00000002
113#define TXX9_SIDICR_STIE_UBRKD 0x00000001
114
115/* SIDISR : DMA/Int. Status */
116#define TXX9_SIDISR_UBRK 0x00008000
117#define TXX9_SIDISR_UVALID 0x00004000
118#define TXX9_SIDISR_UFER 0x00002000
119#define TXX9_SIDISR_UPER 0x00001000
120#define TXX9_SIDISR_UOER 0x00000800
121#define TXX9_SIDISR_ERI 0x00000400
122#define TXX9_SIDISR_TOUT 0x00000200
123#define TXX9_SIDISR_TDIS 0x00000100
124#define TXX9_SIDISR_RDIS 0x00000080
125#define TXX9_SIDISR_STIS 0x00000040
126#define TXX9_SIDISR_RFDN_MASK 0x0000001f
127
128/* SICISR : Change Int. Status */
129#define TXX9_SICISR_OERS 0x00000020
130#define TXX9_SICISR_CTSS 0x00000010
131#define TXX9_SICISR_RBRKD 0x00000008
132#define TXX9_SICISR_TRDY 0x00000004
133#define TXX9_SICISR_TXALS 0x00000002
134#define TXX9_SICISR_UBRKD 0x00000001
135
136/* SIFCR : FIFO Control */
137#define TXX9_SIFCR_SWRST 0x00008000
138#define TXX9_SIFCR_RDIL_MASK 0x00000180
139#define TXX9_SIFCR_RDIL_1 0x00000000
140#define TXX9_SIFCR_RDIL_4 0x00000080
141#define TXX9_SIFCR_RDIL_8 0x00000100
142#define TXX9_SIFCR_RDIL_12 0x00000180
143#define TXX9_SIFCR_RDIL_MAX 0x00000180
144#define TXX9_SIFCR_TDIL_MASK 0x00000018
145#define TXX9_SIFCR_TDIL_1 0x00000000
146#define TXX9_SIFCR_TDIL_4 0x00000001
147#define TXX9_SIFCR_TDIL_8 0x00000010
148#define TXX9_SIFCR_TDIL_MAX 0x00000010
149#define TXX9_SIFCR_TFRST 0x00000004
150#define TXX9_SIFCR_RFRST 0x00000002
151#define TXX9_SIFCR_FRSTE 0x00000001
152#define TXX9_SIO_TX_FIFO 8
153#define TXX9_SIO_RX_FIFO 16
154
155/* SIFLCR : Flow Control */
156#define TXX9_SIFLCR_RCS 0x00001000
157#define TXX9_SIFLCR_TES 0x00000800
158#define TXX9_SIFLCR_RTSSC 0x00000200
159#define TXX9_SIFLCR_RSDE 0x00000100
160#define TXX9_SIFLCR_TSDE 0x00000080
161#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
162#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
163#define TXX9_SIFLCR_TBRK 0x00000001
164
165/* SIBGR : Baudrate Control */
166#define TXX9_SIBGR_BCLK_MASK 0x00000300
167#define TXX9_SIBGR_BCLK_T0 0x00000000
168#define TXX9_SIBGR_BCLK_T2 0x00000100
169#define TXX9_SIBGR_BCLK_T4 0x00000200
170#define TXX9_SIBGR_BCLK_T6 0x00000300
171#define TXX9_SIBGR_BRD_MASK 0x000000ff
172
173static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
174{
175 switch (up->port.iotype) {
176 default:
177 return __raw_readl(up->port.membase + offset);
178 case UPIO_PORT:
179 return inl(up->port.iobase + offset);
180 }
181}
182
183static inline void
184sio_out(struct uart_txx9_port *up, int offset, int value)
185{
186 switch (up->port.iotype) {
187 default:
188 __raw_writel(value, up->port.membase + offset);
189 break;
190 case UPIO_PORT:
191 outl(value, up->port.iobase + offset);
192 break;
193 }
194}
195
196static inline void
197sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
198{
199 sio_out(up, offset, sio_in(up, offset) & ~value);
200}
201static inline void
202sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
203{
204 sio_out(up, offset, sio_in(up, offset) | value);
205}
206
207static inline void
208sio_quot_set(struct uart_txx9_port *up, int quot)
209{
210 quot >>= 1;
211 if (quot < 256)
212 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
213 else if (quot < (256 << 2))
214 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
215 else if (quot < (256 << 4))
216 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
217 else if (quot < (256 << 6))
218 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
219 else
220 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
221}
222
223static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
224{
225 return container_of(port, struct uart_txx9_port, port);
226}
227
228static void serial_txx9_stop_tx(struct uart_port *port)
229{
230 struct uart_txx9_port *up = to_uart_txx9_port(port);
231 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
232}
233
234static void serial_txx9_start_tx(struct uart_port *port)
235{
236 struct uart_txx9_port *up = to_uart_txx9_port(port);
237 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
238}
239
240static void serial_txx9_stop_rx(struct uart_port *port)
241{
242 struct uart_txx9_port *up = to_uart_txx9_port(port);
243 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
244}
245
246static void serial_txx9_initialize(struct uart_port *port)
247{
248 struct uart_txx9_port *up = to_uart_txx9_port(port);
249 unsigned int tmout = 10000;
250
251 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
252 /* TX4925 BUG WORKAROUND. Accessing SIOC register
253 * immediately after soft reset causes bus error. */
254 mmiowb();
255 udelay(1);
256 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
257 udelay(1);
258 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
259 sio_set(up, TXX9_SIFCR,
260 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
261 /* initial settings */
262 sio_out(up, TXX9_SILCR,
263 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
264 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
265 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
266 sio_quot_set(up, uart_get_divisor(port, 9600));
267 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
268 sio_out(up, TXX9_SIDICR, 0);
269}
270
271static inline void
272receive_chars(struct uart_txx9_port *up, unsigned int *status)
273{
274 unsigned char ch;
275 unsigned int disr = *status;
276 int max_count = 256;
277 char flag;
278 unsigned int next_ignore_status_mask;
279
280 do {
281 ch = sio_in(up, TXX9_SIRFIFO);
282 flag = TTY_NORMAL;
283 up->port.icount.rx++;
284
285 /* mask out RFDN_MASK bit added by previous overrun */
286 next_ignore_status_mask =
287 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
288 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
289 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
290 /*
291 * For statistics only
292 */
293 if (disr & TXX9_SIDISR_UBRK) {
294 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
295 up->port.icount.brk++;
296 /*
297 * We do the SysRQ and SAK checking
298 * here because otherwise the break
299 * may get masked by ignore_status_mask
300 * or read_status_mask.
301 */
302 if (uart_handle_break(&up->port))
303 goto ignore_char;
304 } else if (disr & TXX9_SIDISR_UPER)
305 up->port.icount.parity++;
306 else if (disr & TXX9_SIDISR_UFER)
307 up->port.icount.frame++;
308 if (disr & TXX9_SIDISR_UOER) {
309 up->port.icount.overrun++;
310 /*
311 * The receiver read buffer still hold
312 * a char which caused overrun.
313 * Ignore next char by adding RFDN_MASK
314 * to ignore_status_mask temporarily.
315 */
316 next_ignore_status_mask |=
317 TXX9_SIDISR_RFDN_MASK;
318 }
319
320 /*
321 * Mask off conditions which should be ingored.
322 */
323 disr &= up->port.read_status_mask;
324
325 if (disr & TXX9_SIDISR_UBRK) {
326 flag = TTY_BREAK;
327 } else if (disr & TXX9_SIDISR_UPER)
328 flag = TTY_PARITY;
329 else if (disr & TXX9_SIDISR_UFER)
330 flag = TTY_FRAME;
331 }
332 if (uart_handle_sysrq_char(&up->port, ch))
333 goto ignore_char;
334
335 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
336
337 ignore_char:
338 up->port.ignore_status_mask = next_ignore_status_mask;
339 disr = sio_in(up, TXX9_SIDISR);
340 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
341 spin_unlock(&up->port.lock);
342 tty_flip_buffer_push(&up->port.state->port);
343 spin_lock(&up->port.lock);
344 *status = disr;
345}
346
347static inline void transmit_chars(struct uart_txx9_port *up)
348{
349 struct circ_buf *xmit = &up->port.state->xmit;
350 int count;
351
352 if (up->port.x_char) {
353 sio_out(up, TXX9_SITFIFO, up->port.x_char);
354 up->port.icount.tx++;
355 up->port.x_char = 0;
356 return;
357 }
358 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
359 serial_txx9_stop_tx(&up->port);
360 return;
361 }
362
363 count = TXX9_SIO_TX_FIFO;
364 do {
365 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
366 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
367 up->port.icount.tx++;
368 if (uart_circ_empty(xmit))
369 break;
370 } while (--count > 0);
371
372 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
373 uart_write_wakeup(&up->port);
374
375 if (uart_circ_empty(xmit))
376 serial_txx9_stop_tx(&up->port);
377}
378
379static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
380{
381 int pass_counter = 0;
382 struct uart_txx9_port *up = dev_id;
383 unsigned int status;
384
385 while (1) {
386 spin_lock(&up->port.lock);
387 status = sio_in(up, TXX9_SIDISR);
388 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
389 status &= ~TXX9_SIDISR_TDIS;
390 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
391 TXX9_SIDISR_TOUT))) {
392 spin_unlock(&up->port.lock);
393 break;
394 }
395
396 if (status & TXX9_SIDISR_RDIS)
397 receive_chars(up, &status);
398 if (status & TXX9_SIDISR_TDIS)
399 transmit_chars(up);
400 /* Clear TX/RX Int. Status */
401 sio_mask(up, TXX9_SIDISR,
402 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
403 TXX9_SIDISR_TOUT);
404 spin_unlock(&up->port.lock);
405
406 if (pass_counter++ > PASS_LIMIT)
407 break;
408 }
409
410 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
411}
412
413static unsigned int serial_txx9_tx_empty(struct uart_port *port)
414{
415 struct uart_txx9_port *up = to_uart_txx9_port(port);
416 unsigned long flags;
417 unsigned int ret;
418
419 spin_lock_irqsave(&up->port.lock, flags);
420 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
421 spin_unlock_irqrestore(&up->port.lock, flags);
422
423 return ret;
424}
425
426static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
427{
428 struct uart_txx9_port *up = to_uart_txx9_port(port);
429 unsigned int ret;
430
431 /* no modem control lines */
432 ret = TIOCM_CAR | TIOCM_DSR;
433 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
434 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
435
436 return ret;
437}
438
439static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
440{
441 struct uart_txx9_port *up = to_uart_txx9_port(port);
442
443 if (mctrl & TIOCM_RTS)
444 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
445 else
446 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
447}
448
449static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
450{
451 struct uart_txx9_port *up = to_uart_txx9_port(port);
452 unsigned long flags;
453
454 spin_lock_irqsave(&up->port.lock, flags);
455 if (break_state == -1)
456 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
457 else
458 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
459 spin_unlock_irqrestore(&up->port.lock, flags);
460}
461
462#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
463/*
464 * Wait for transmitter & holding register to empty
465 */
466static void wait_for_xmitr(struct uart_txx9_port *up)
467{
468 unsigned int tmout = 10000;
469
470 /* Wait up to 10ms for the character(s) to be sent. */
471 while (--tmout &&
472 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
473 udelay(1);
474
475 /* Wait up to 1s for flow control if necessary */
476 if (up->port.flags & UPF_CONS_FLOW) {
477 tmout = 1000000;
478 while (--tmout &&
479 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
480 udelay(1);
481 }
482}
483#endif
484
485#ifdef CONFIG_CONSOLE_POLL
486/*
487 * Console polling routines for writing and reading from the uart while
488 * in an interrupt or debug context.
489 */
490
491static int serial_txx9_get_poll_char(struct uart_port *port)
492{
493 unsigned int ier;
494 unsigned char c;
495 struct uart_txx9_port *up = to_uart_txx9_port(port);
496
497 /*
498 * First save the IER then disable the interrupts
499 */
500 ier = sio_in(up, TXX9_SIDICR);
501 sio_out(up, TXX9_SIDICR, 0);
502
503 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
504 ;
505
506 c = sio_in(up, TXX9_SIRFIFO);
507
508 /*
509 * Finally, clear RX interrupt status
510 * and restore the IER
511 */
512 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
513 sio_out(up, TXX9_SIDICR, ier);
514 return c;
515}
516
517
518static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
519{
520 unsigned int ier;
521 struct uart_txx9_port *up = to_uart_txx9_port(port);
522
523 /*
524 * First save the IER then disable the interrupts
525 */
526 ier = sio_in(up, TXX9_SIDICR);
527 sio_out(up, TXX9_SIDICR, 0);
528
529 wait_for_xmitr(up);
530 /*
531 * Send the character out.
532 */
533 sio_out(up, TXX9_SITFIFO, c);
534
535 /*
536 * Finally, wait for transmitter to become empty
537 * and restore the IER
538 */
539 wait_for_xmitr(up);
540 sio_out(up, TXX9_SIDICR, ier);
541}
542
543#endif /* CONFIG_CONSOLE_POLL */
544
545static int serial_txx9_startup(struct uart_port *port)
546{
547 struct uart_txx9_port *up = to_uart_txx9_port(port);
548 unsigned long flags;
549 int retval;
550
551 /*
552 * Clear the FIFO buffers and disable them.
553 * (they will be reenabled in set_termios())
554 */
555 sio_set(up, TXX9_SIFCR,
556 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
557 /* clear reset */
558 sio_mask(up, TXX9_SIFCR,
559 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
560 sio_out(up, TXX9_SIDICR, 0);
561
562 /*
563 * Clear the interrupt registers.
564 */
565 sio_out(up, TXX9_SIDISR, 0);
566
567 retval = request_irq(up->port.irq, serial_txx9_interrupt,
568 IRQF_SHARED, "serial_txx9", up);
569 if (retval)
570 return retval;
571
572 /*
573 * Now, initialize the UART
574 */
575 spin_lock_irqsave(&up->port.lock, flags);
576 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
577 spin_unlock_irqrestore(&up->port.lock, flags);
578
579 /* Enable RX/TX */
580 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
581
582 /*
583 * Finally, enable interrupts.
584 */
585 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
586
587 return 0;
588}
589
590static void serial_txx9_shutdown(struct uart_port *port)
591{
592 struct uart_txx9_port *up = to_uart_txx9_port(port);
593 unsigned long flags;
594
595 /*
596 * Disable interrupts from this port
597 */
598 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
599
600 spin_lock_irqsave(&up->port.lock, flags);
601 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
602 spin_unlock_irqrestore(&up->port.lock, flags);
603
604 /*
605 * Disable break condition
606 */
607 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
608
609#ifdef CONFIG_SERIAL_TXX9_CONSOLE
610 if (up->port.cons && up->port.line == up->port.cons->index) {
611 free_irq(up->port.irq, up);
612 return;
613 }
614#endif
615 /* reset FIFOs */
616 sio_set(up, TXX9_SIFCR,
617 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
618 /* clear reset */
619 sio_mask(up, TXX9_SIFCR,
620 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
621
622 /* Disable RX/TX */
623 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
624
625 free_irq(up->port.irq, up);
626}
627
628static void
629serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
630 struct ktermios *old)
631{
632 struct uart_txx9_port *up = to_uart_txx9_port(port);
633 unsigned int cval, fcr = 0;
634 unsigned long flags;
635 unsigned int baud, quot;
636
637 /*
638 * We don't support modem control lines.
639 */
640 termios->c_cflag &= ~(HUPCL | CMSPAR);
641 termios->c_cflag |= CLOCAL;
642
643 cval = sio_in(up, TXX9_SILCR);
644 /* byte size and parity */
645 cval &= ~TXX9_SILCR_UMODE_MASK;
646 switch (termios->c_cflag & CSIZE) {
647 case CS7:
648 cval |= TXX9_SILCR_UMODE_7BIT;
649 break;
650 default:
651 case CS5: /* not supported */
652 case CS6: /* not supported */
653 case CS8:
654 cval |= TXX9_SILCR_UMODE_8BIT;
655 break;
656 }
657
658 cval &= ~TXX9_SILCR_USBL_MASK;
659 if (termios->c_cflag & CSTOPB)
660 cval |= TXX9_SILCR_USBL_2BIT;
661 else
662 cval |= TXX9_SILCR_USBL_1BIT;
663 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
664 if (termios->c_cflag & PARENB)
665 cval |= TXX9_SILCR_UPEN;
666 if (!(termios->c_cflag & PARODD))
667 cval |= TXX9_SILCR_UEPS;
668
669 /*
670 * Ask the core to calculate the divisor for us.
671 */
672 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
673 quot = uart_get_divisor(port, baud);
674
675 /* Set up FIFOs */
676 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
677 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
678
679 /*
680 * Ok, we're now changing the port state. Do it with
681 * interrupts disabled.
682 */
683 spin_lock_irqsave(&up->port.lock, flags);
684
685 /*
686 * Update the per-port timeout.
687 */
688 uart_update_timeout(port, termios->c_cflag, baud);
689
690 up->port.read_status_mask = TXX9_SIDISR_UOER |
691 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
692 if (termios->c_iflag & INPCK)
693 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
694 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
695 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
696
697 /*
698 * Characteres to ignore
699 */
700 up->port.ignore_status_mask = 0;
701 if (termios->c_iflag & IGNPAR)
702 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
703 if (termios->c_iflag & IGNBRK) {
704 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
705 /*
706 * If we're ignoring parity and break indicators,
707 * ignore overruns too (for real raw support).
708 */
709 if (termios->c_iflag & IGNPAR)
710 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
711 }
712
713 /*
714 * ignore all characters if CREAD is not set
715 */
716 if ((termios->c_cflag & CREAD) == 0)
717 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
718
719 /* CTS flow control flag */
720 if ((termios->c_cflag & CRTSCTS) &&
721 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
722 sio_set(up, TXX9_SIFLCR,
723 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
724 } else {
725 sio_mask(up, TXX9_SIFLCR,
726 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
727 }
728
729 sio_out(up, TXX9_SILCR, cval);
730 sio_quot_set(up, quot);
731 sio_out(up, TXX9_SIFCR, fcr);
732
733 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
734 spin_unlock_irqrestore(&up->port.lock, flags);
735}
736
737static void
738serial_txx9_pm(struct uart_port *port, unsigned int state,
739 unsigned int oldstate)
740{
741 /*
742 * If oldstate was -1 this is called from
743 * uart_configure_port(). In this case do not initialize the
744 * port now, because the port was already initialized (for
745 * non-console port) or should not be initialized here (for
746 * console port). If we initialized the port here we lose
747 * serial console settings.
748 */
749 if (state == 0 && oldstate != -1)
750 serial_txx9_initialize(port);
751}
752
753static int serial_txx9_request_resource(struct uart_txx9_port *up)
754{
755 unsigned int size = TXX9_REGION_SIZE;
756 int ret = 0;
757
758 switch (up->port.iotype) {
759 default:
760 if (!up->port.mapbase)
761 break;
762
763 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
764 ret = -EBUSY;
765 break;
766 }
767
768 if (up->port.flags & UPF_IOREMAP) {
769 up->port.membase = ioremap(up->port.mapbase, size);
770 if (!up->port.membase) {
771 release_mem_region(up->port.mapbase, size);
772 ret = -ENOMEM;
773 }
774 }
775 break;
776
777 case UPIO_PORT:
778 if (!request_region(up->port.iobase, size, "serial_txx9"))
779 ret = -EBUSY;
780 break;
781 }
782 return ret;
783}
784
785static void serial_txx9_release_resource(struct uart_txx9_port *up)
786{
787 unsigned int size = TXX9_REGION_SIZE;
788
789 switch (up->port.iotype) {
790 default:
791 if (!up->port.mapbase)
792 break;
793
794 if (up->port.flags & UPF_IOREMAP) {
795 iounmap(up->port.membase);
796 up->port.membase = NULL;
797 }
798
799 release_mem_region(up->port.mapbase, size);
800 break;
801
802 case UPIO_PORT:
803 release_region(up->port.iobase, size);
804 break;
805 }
806}
807
808static void serial_txx9_release_port(struct uart_port *port)
809{
810 struct uart_txx9_port *up = to_uart_txx9_port(port);
811 serial_txx9_release_resource(up);
812}
813
814static int serial_txx9_request_port(struct uart_port *port)
815{
816 struct uart_txx9_port *up = to_uart_txx9_port(port);
817 return serial_txx9_request_resource(up);
818}
819
820static void serial_txx9_config_port(struct uart_port *port, int uflags)
821{
822 struct uart_txx9_port *up = to_uart_txx9_port(port);
823 int ret;
824
825 /*
826 * Find the region that we can probe for. This in turn
827 * tells us whether we can probe for the type of port.
828 */
829 ret = serial_txx9_request_resource(up);
830 if (ret < 0)
831 return;
832 port->type = PORT_TXX9;
833 up->port.fifosize = TXX9_SIO_TX_FIFO;
834
835#ifdef CONFIG_SERIAL_TXX9_CONSOLE
836 if (up->port.line == up->port.cons->index)
837 return;
838#endif
839 serial_txx9_initialize(port);
840}
841
842static const char *
843serial_txx9_type(struct uart_port *port)
844{
845 return "txx9";
846}
847
848static struct uart_ops serial_txx9_pops = {
849 .tx_empty = serial_txx9_tx_empty,
850 .set_mctrl = serial_txx9_set_mctrl,
851 .get_mctrl = serial_txx9_get_mctrl,
852 .stop_tx = serial_txx9_stop_tx,
853 .start_tx = serial_txx9_start_tx,
854 .stop_rx = serial_txx9_stop_rx,
855 .break_ctl = serial_txx9_break_ctl,
856 .startup = serial_txx9_startup,
857 .shutdown = serial_txx9_shutdown,
858 .set_termios = serial_txx9_set_termios,
859 .pm = serial_txx9_pm,
860 .type = serial_txx9_type,
861 .release_port = serial_txx9_release_port,
862 .request_port = serial_txx9_request_port,
863 .config_port = serial_txx9_config_port,
864#ifdef CONFIG_CONSOLE_POLL
865 .poll_get_char = serial_txx9_get_poll_char,
866 .poll_put_char = serial_txx9_put_poll_char,
867#endif
868};
869
870static struct uart_txx9_port serial_txx9_ports[UART_NR];
871
872static void __init serial_txx9_register_ports(struct uart_driver *drv,
873 struct device *dev)
874{
875 int i;
876
877 for (i = 0; i < UART_NR; i++) {
878 struct uart_txx9_port *up = &serial_txx9_ports[i];
879
880 up->port.line = i;
881 up->port.ops = &serial_txx9_pops;
882 up->port.dev = dev;
883 if (up->port.iobase || up->port.mapbase)
884 uart_add_one_port(drv, &up->port);
885 }
886}
887
888#ifdef CONFIG_SERIAL_TXX9_CONSOLE
889
890static void serial_txx9_console_putchar(struct uart_port *port, int ch)
891{
892 struct uart_txx9_port *up = to_uart_txx9_port(port);
893
894 wait_for_xmitr(up);
895 sio_out(up, TXX9_SITFIFO, ch);
896}
897
898/*
899 * Print a string to the serial port trying not to disturb
900 * any possible real use of the port...
901 *
902 * The console_lock must be held when we get here.
903 */
904static void
905serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
906{
907 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
908 unsigned int ier, flcr;
909
910 /*
911 * First save the UER then disable the interrupts
912 */
913 ier = sio_in(up, TXX9_SIDICR);
914 sio_out(up, TXX9_SIDICR, 0);
915 /*
916 * Disable flow-control if enabled (and unnecessary)
917 */
918 flcr = sio_in(up, TXX9_SIFLCR);
919 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
920 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
921
922 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
923
924 /*
925 * Finally, wait for transmitter to become empty
926 * and restore the IER
927 */
928 wait_for_xmitr(up);
929 sio_out(up, TXX9_SIFLCR, flcr);
930 sio_out(up, TXX9_SIDICR, ier);
931}
932
933static int __init serial_txx9_console_setup(struct console *co, char *options)
934{
935 struct uart_port *port;
936 struct uart_txx9_port *up;
937 int baud = 9600;
938 int bits = 8;
939 int parity = 'n';
940 int flow = 'n';
941
942 /*
943 * Check whether an invalid uart number has been specified, and
944 * if so, search for the first available port that does have
945 * console support.
946 */
947 if (co->index >= UART_NR)
948 co->index = 0;
949 up = &serial_txx9_ports[co->index];
950 port = &up->port;
951 if (!port->ops)
952 return -ENODEV;
953
954 serial_txx9_initialize(&up->port);
955
956 if (options)
957 uart_parse_options(options, &baud, &parity, &bits, &flow);
958
959 return uart_set_options(port, co, baud, parity, bits, flow);
960}
961
962static struct uart_driver serial_txx9_reg;
963static struct console serial_txx9_console = {
964 .name = TXX9_TTY_NAME,
965 .write = serial_txx9_console_write,
966 .device = uart_console_device,
967 .setup = serial_txx9_console_setup,
968 .flags = CON_PRINTBUFFER,
969 .index = -1,
970 .data = &serial_txx9_reg,
971};
972
973static int __init serial_txx9_console_init(void)
974{
975 register_console(&serial_txx9_console);
976 return 0;
977}
978console_initcall(serial_txx9_console_init);
979
980#define SERIAL_TXX9_CONSOLE &serial_txx9_console
981#else
982#define SERIAL_TXX9_CONSOLE NULL
983#endif
984
985static struct uart_driver serial_txx9_reg = {
986 .owner = THIS_MODULE,
987 .driver_name = "serial_txx9",
988 .dev_name = TXX9_TTY_NAME,
989 .major = TXX9_TTY_MAJOR,
990 .minor = TXX9_TTY_MINOR_START,
991 .nr = UART_NR,
992 .cons = SERIAL_TXX9_CONSOLE,
993};
994
995int __init early_serial_txx9_setup(struct uart_port *port)
996{
997 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
998 return -ENODEV;
999
1000 serial_txx9_ports[port->line].port = *port;
1001 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
1002 serial_txx9_ports[port->line].port.flags |=
1003 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1004 return 0;
1005}
1006
1007static DEFINE_MUTEX(serial_txx9_mutex);
1008
1009/**
1010 * serial_txx9_register_port - register a serial port
1011 * @port: serial port template
1012 *
1013 * Configure the serial port specified by the request.
1014 *
1015 * The port is then probed and if necessary the IRQ is autodetected
1016 * If this fails an error is returned.
1017 *
1018 * On success the port is ready to use and the line number is returned.
1019 */
1020static int serial_txx9_register_port(struct uart_port *port)
1021{
1022 int i;
1023 struct uart_txx9_port *uart;
1024 int ret = -ENOSPC;
1025
1026 mutex_lock(&serial_txx9_mutex);
1027 for (i = 0; i < UART_NR; i++) {
1028 uart = &serial_txx9_ports[i];
1029 if (uart_match_port(&uart->port, port)) {
1030 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1031 break;
1032 }
1033 }
1034 if (i == UART_NR) {
1035 /* Find unused port */
1036 for (i = 0; i < UART_NR; i++) {
1037 uart = &serial_txx9_ports[i];
1038 if (!(uart->port.iobase || uart->port.mapbase))
1039 break;
1040 }
1041 }
1042 if (i < UART_NR) {
1043 uart->port.iobase = port->iobase;
1044 uart->port.membase = port->membase;
1045 uart->port.irq = port->irq;
1046 uart->port.uartclk = port->uartclk;
1047 uart->port.iotype = port->iotype;
1048 uart->port.flags = port->flags
1049 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1050 uart->port.mapbase = port->mapbase;
1051 if (port->dev)
1052 uart->port.dev = port->dev;
1053 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1054 if (ret == 0)
1055 ret = uart->port.line;
1056 }
1057 mutex_unlock(&serial_txx9_mutex);
1058 return ret;
1059}
1060
1061/**
1062 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1063 * @line: serial line number
1064 *
1065 * Remove one serial port. This may not be called from interrupt
1066 * context. We hand the port back to the our control.
1067 */
1068static void serial_txx9_unregister_port(int line)
1069{
1070 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1071
1072 mutex_lock(&serial_txx9_mutex);
1073 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1074 uart->port.flags = 0;
1075 uart->port.type = PORT_UNKNOWN;
1076 uart->port.iobase = 0;
1077 uart->port.mapbase = 0;
1078 uart->port.membase = NULL;
1079 uart->port.dev = NULL;
1080 mutex_unlock(&serial_txx9_mutex);
1081}
1082
1083/*
1084 * Register a set of serial devices attached to a platform device.
1085 */
1086static int serial_txx9_probe(struct platform_device *dev)
1087{
1088 struct uart_port *p = dev_get_platdata(&dev->dev);
1089 struct uart_port port;
1090 int ret, i;
1091
1092 memset(&port, 0, sizeof(struct uart_port));
1093 for (i = 0; p && p->uartclk != 0; p++, i++) {
1094 port.iobase = p->iobase;
1095 port.membase = p->membase;
1096 port.irq = p->irq;
1097 port.uartclk = p->uartclk;
1098 port.iotype = p->iotype;
1099 port.flags = p->flags;
1100 port.mapbase = p->mapbase;
1101 port.dev = &dev->dev;
1102 ret = serial_txx9_register_port(&port);
1103 if (ret < 0) {
1104 dev_err(&dev->dev, "unable to register port at index %d "
1105 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1106 p->iobase, (unsigned long long)p->mapbase,
1107 p->irq, ret);
1108 }
1109 }
1110 return 0;
1111}
1112
1113/*
1114 * Remove serial ports registered against a platform device.
1115 */
1116static int serial_txx9_remove(struct platform_device *dev)
1117{
1118 int i;
1119
1120 for (i = 0; i < UART_NR; i++) {
1121 struct uart_txx9_port *up = &serial_txx9_ports[i];
1122
1123 if (up->port.dev == &dev->dev)
1124 serial_txx9_unregister_port(i);
1125 }
1126 return 0;
1127}
1128
1129#ifdef CONFIG_PM
1130static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1131{
1132 int i;
1133
1134 for (i = 0; i < UART_NR; i++) {
1135 struct uart_txx9_port *up = &serial_txx9_ports[i];
1136
1137 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1138 uart_suspend_port(&serial_txx9_reg, &up->port);
1139 }
1140
1141 return 0;
1142}
1143
1144static int serial_txx9_resume(struct platform_device *dev)
1145{
1146 int i;
1147
1148 for (i = 0; i < UART_NR; i++) {
1149 struct uart_txx9_port *up = &serial_txx9_ports[i];
1150
1151 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1152 uart_resume_port(&serial_txx9_reg, &up->port);
1153 }
1154
1155 return 0;
1156}
1157#endif
1158
1159static struct platform_driver serial_txx9_plat_driver = {
1160 .probe = serial_txx9_probe,
1161 .remove = serial_txx9_remove,
1162#ifdef CONFIG_PM
1163 .suspend = serial_txx9_suspend,
1164 .resume = serial_txx9_resume,
1165#endif
1166 .driver = {
1167 .name = "serial_txx9",
1168 },
1169};
1170
1171#ifdef ENABLE_SERIAL_TXX9_PCI
1172/*
1173 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1174 * to the arrangement of serial ports on a PCI card.
1175 */
1176static int
1177pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1178{
1179 struct uart_port port;
1180 int line;
1181 int rc;
1182
1183 rc = pci_enable_device(dev);
1184 if (rc)
1185 return rc;
1186
1187 memset(&port, 0, sizeof(port));
1188 port.ops = &serial_txx9_pops;
1189 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1190 port.uartclk = 66670000;
1191 port.irq = dev->irq;
1192 port.iotype = UPIO_PORT;
1193 port.iobase = pci_resource_start(dev, 1);
1194 port.dev = &dev->dev;
1195 line = serial_txx9_register_port(&port);
1196 if (line < 0) {
1197 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1198 pci_disable_device(dev);
1199 return line;
1200 }
1201 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1202
1203 return 0;
1204}
1205
1206static void pciserial_txx9_remove_one(struct pci_dev *dev)
1207{
1208 struct uart_txx9_port *up = pci_get_drvdata(dev);
1209
1210 if (up) {
1211 serial_txx9_unregister_port(up->port.line);
1212 pci_disable_device(dev);
1213 }
1214}
1215
1216#ifdef CONFIG_PM
1217static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1218{
1219 struct uart_txx9_port *up = pci_get_drvdata(dev);
1220
1221 if (up)
1222 uart_suspend_port(&serial_txx9_reg, &up->port);
1223 pci_save_state(dev);
1224 pci_set_power_state(dev, pci_choose_state(dev, state));
1225 return 0;
1226}
1227
1228static int pciserial_txx9_resume_one(struct pci_dev *dev)
1229{
1230 struct uart_txx9_port *up = pci_get_drvdata(dev);
1231
1232 pci_set_power_state(dev, PCI_D0);
1233 pci_restore_state(dev);
1234 if (up)
1235 uart_resume_port(&serial_txx9_reg, &up->port);
1236 return 0;
1237}
1238#endif
1239
1240static const struct pci_device_id serial_txx9_pci_tbl[] = {
1241 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1242 { 0, }
1243};
1244
1245static struct pci_driver serial_txx9_pci_driver = {
1246 .name = "serial_txx9",
1247 .probe = pciserial_txx9_init_one,
1248 .remove = pciserial_txx9_remove_one,
1249#ifdef CONFIG_PM
1250 .suspend = pciserial_txx9_suspend_one,
1251 .resume = pciserial_txx9_resume_one,
1252#endif
1253 .id_table = serial_txx9_pci_tbl,
1254};
1255
1256MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1257#endif /* ENABLE_SERIAL_TXX9_PCI */
1258
1259static struct platform_device *serial_txx9_plat_devs;
1260
1261static int __init serial_txx9_init(void)
1262{
1263 int ret;
1264
1265 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1266
1267 ret = uart_register_driver(&serial_txx9_reg);
1268 if (ret)
1269 goto out;
1270
1271 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1272 if (!serial_txx9_plat_devs) {
1273 ret = -ENOMEM;
1274 goto unreg_uart_drv;
1275 }
1276
1277 ret = platform_device_add(serial_txx9_plat_devs);
1278 if (ret)
1279 goto put_dev;
1280
1281 serial_txx9_register_ports(&serial_txx9_reg,
1282 &serial_txx9_plat_devs->dev);
1283
1284 ret = platform_driver_register(&serial_txx9_plat_driver);
1285 if (ret)
1286 goto del_dev;
1287
1288#ifdef ENABLE_SERIAL_TXX9_PCI
1289 ret = pci_register_driver(&serial_txx9_pci_driver);
1290#endif
1291 if (ret == 0)
1292 goto out;
1293
1294 del_dev:
1295 platform_device_del(serial_txx9_plat_devs);
1296 put_dev:
1297 platform_device_put(serial_txx9_plat_devs);
1298 unreg_uart_drv:
1299 uart_unregister_driver(&serial_txx9_reg);
1300 out:
1301 return ret;
1302}
1303
1304static void __exit serial_txx9_exit(void)
1305{
1306 int i;
1307
1308#ifdef ENABLE_SERIAL_TXX9_PCI
1309 pci_unregister_driver(&serial_txx9_pci_driver);
1310#endif
1311 platform_driver_unregister(&serial_txx9_plat_driver);
1312 platform_device_unregister(serial_txx9_plat_devs);
1313 for (i = 0; i < UART_NR; i++) {
1314 struct uart_txx9_port *up = &serial_txx9_ports[i];
1315 if (up->port.iobase || up->port.mapbase)
1316 uart_remove_one_port(&serial_txx9_reg, &up->port);
1317 }
1318
1319 uart_unregister_driver(&serial_txx9_reg);
1320}
1321
1322module_init(serial_txx9_init);
1323module_exit(serial_txx9_exit);
1324
1325MODULE_LICENSE("GPL");
1326MODULE_DESCRIPTION("TX39/49 serial driver");
1327
1328MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);