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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Dallas DS1302 RTC Support
4 *
5 * Copyright (C) 2002 David McCullough
6 * Copyright (C) 2003 - 2007 Paul Mundt
7 */
8
9#include <linux/bcd.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/of.h>
15#include <linux/rtc.h>
16#include <linux/spi/spi.h>
17
18#define RTC_CMD_READ 0x81 /* Read command */
19#define RTC_CMD_WRITE 0x80 /* Write command */
20
21#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
22#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
23
24#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
25#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
26#define RTC_CLCK_BURST 0x1F /* Address of clock burst */
27#define RTC_CLCK_LEN 0x08 /* Size of clock burst */
28#define RTC_ADDR_CTRL 0x07 /* Address of control register */
29#define RTC_ADDR_YEAR 0x06 /* Address of year register */
30#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
31#define RTC_ADDR_MON 0x04 /* Address of month register */
32#define RTC_ADDR_DATE 0x03 /* Address of day of month register */
33#define RTC_ADDR_HOUR 0x02 /* Address of hour register */
34#define RTC_ADDR_MIN 0x01 /* Address of minute register */
35#define RTC_ADDR_SEC 0x00 /* Address of second register */
36
37static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
38{
39 struct spi_device *spi = dev_get_drvdata(dev);
40 u8 buf[1 + RTC_CLCK_LEN];
41 u8 *bp;
42 int status;
43
44 /* Enable writing */
45 bp = buf;
46 *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
47 *bp++ = RTC_CMD_WRITE_ENABLE;
48
49 status = spi_write_then_read(spi, buf, 2,
50 NULL, 0);
51 if (status)
52 return status;
53
54 /* Write registers starting at the first time/date address. */
55 bp = buf;
56 *bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;
57
58 *bp++ = bin2bcd(time->tm_sec);
59 *bp++ = bin2bcd(time->tm_min);
60 *bp++ = bin2bcd(time->tm_hour);
61 *bp++ = bin2bcd(time->tm_mday);
62 *bp++ = bin2bcd(time->tm_mon + 1);
63 *bp++ = time->tm_wday + 1;
64 *bp++ = bin2bcd(time->tm_year % 100);
65 *bp++ = RTC_CMD_WRITE_DISABLE;
66
67 /* use write-then-read since dma from stack is nonportable */
68 return spi_write_then_read(spi, buf, sizeof(buf),
69 NULL, 0);
70}
71
72static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
73{
74 struct spi_device *spi = dev_get_drvdata(dev);
75 u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
76 u8 buf[RTC_CLCK_LEN - 1];
77 int status;
78
79 /* Use write-then-read to get all the date/time registers
80 * since dma from stack is nonportable
81 */
82 status = spi_write_then_read(spi, &addr, sizeof(addr),
83 buf, sizeof(buf));
84 if (status < 0)
85 return status;
86
87 /* Decode the registers */
88 time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
89 time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
90 time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
91 time->tm_wday = buf[RTC_ADDR_DAY] - 1;
92 time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
93 time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
94 time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
95
96 return 0;
97}
98
99static const struct rtc_class_ops ds1302_rtc_ops = {
100 .read_time = ds1302_rtc_get_time,
101 .set_time = ds1302_rtc_set_time,
102};
103
104static int ds1302_probe(struct spi_device *spi)
105{
106 struct rtc_device *rtc;
107 u8 addr;
108 u8 buf[4];
109 u8 *bp;
110 int status;
111
112 /* Sanity check board setup data. This may be hooked up
113 * in 3wire mode, but we don't care. Note that unless
114 * there's an inverter in place, this needs SPI_CS_HIGH!
115 */
116 if (spi->bits_per_word && (spi->bits_per_word != 8)) {
117 dev_err(&spi->dev, "bad word length\n");
118 return -EINVAL;
119 } else if (spi->max_speed_hz > 2000000) {
120 dev_err(&spi->dev, "speed is too high\n");
121 return -EINVAL;
122 } else if (spi->mode & SPI_CPHA) {
123 dev_err(&spi->dev, "bad mode\n");
124 return -EINVAL;
125 }
126
127 addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
128 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
129 if (status < 0) {
130 dev_err(&spi->dev, "control register read error %d\n",
131 status);
132 return status;
133 }
134
135 if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
136 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
137 if (status < 0) {
138 dev_err(&spi->dev, "control register read error %d\n",
139 status);
140 return status;
141 }
142
143 if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
144 dev_err(&spi->dev, "junk in control register\n");
145 return -ENODEV;
146 }
147 }
148 if (buf[0] == 0) {
149 bp = buf;
150 *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
151 *bp++ = RTC_CMD_WRITE_DISABLE;
152
153 status = spi_write_then_read(spi, buf, 2, NULL, 0);
154 if (status < 0) {
155 dev_err(&spi->dev, "control register write error %d\n",
156 status);
157 return status;
158 }
159
160 addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
161 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
162 if (status < 0) {
163 dev_err(&spi->dev,
164 "error %d reading control register\n",
165 status);
166 return status;
167 }
168
169 if (buf[0] != RTC_CMD_WRITE_DISABLE) {
170 dev_err(&spi->dev, "failed to detect chip\n");
171 return -ENODEV;
172 }
173 }
174
175 spi_set_drvdata(spi, spi);
176
177 rtc = devm_rtc_device_register(&spi->dev, "ds1302",
178 &ds1302_rtc_ops, THIS_MODULE);
179 if (IS_ERR(rtc)) {
180 status = PTR_ERR(rtc);
181 dev_err(&spi->dev, "error %d registering rtc\n", status);
182 return status;
183 }
184
185 return 0;
186}
187
188#ifdef CONFIG_OF
189static const struct of_device_id ds1302_dt_ids[] = {
190 { .compatible = "maxim,ds1302", },
191 { /* sentinel */ }
192};
193MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
194#endif
195
196static const struct spi_device_id ds1302_spi_ids[] = {
197 { .name = "ds1302", },
198 { /* sentinel */ }
199};
200MODULE_DEVICE_TABLE(spi, ds1302_spi_ids);
201
202static struct spi_driver ds1302_driver = {
203 .driver.name = "rtc-ds1302",
204 .driver.of_match_table = of_match_ptr(ds1302_dt_ids),
205 .probe = ds1302_probe,
206 .id_table = ds1302_spi_ids,
207};
208
209module_spi_driver(ds1302_driver);
210
211MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
212MODULE_AUTHOR("Paul Mundt, David McCullough");
213MODULE_LICENSE("GPL v2");
1/*
2 * Dallas DS1302 RTC Support
3 *
4 * Copyright (C) 2002 David McCullough
5 * Copyright (C) 2003 - 2007 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License version 2. See the file "COPYING" in the main directory of
9 * this archive for more details.
10 */
11
12#include <linux/bcd.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/rtc.h>
19#include <linux/spi/spi.h>
20
21#define DRV_NAME "rtc-ds1302"
22
23#define RTC_CMD_READ 0x81 /* Read command */
24#define RTC_CMD_WRITE 0x80 /* Write command */
25
26#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
27#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
28
29#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
30#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
31#define RTC_CLCK_BURST 0x1F /* Address of clock burst */
32#define RTC_CLCK_LEN 0x08 /* Size of clock burst */
33#define RTC_ADDR_CTRL 0x07 /* Address of control register */
34#define RTC_ADDR_YEAR 0x06 /* Address of year register */
35#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
36#define RTC_ADDR_MON 0x04 /* Address of month register */
37#define RTC_ADDR_DATE 0x03 /* Address of day of month register */
38#define RTC_ADDR_HOUR 0x02 /* Address of hour register */
39#define RTC_ADDR_MIN 0x01 /* Address of minute register */
40#define RTC_ADDR_SEC 0x00 /* Address of second register */
41
42static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
43{
44 struct spi_device *spi = dev_get_drvdata(dev);
45 u8 buf[1 + RTC_CLCK_LEN];
46 u8 *bp = buf;
47 int status;
48
49 /* Enable writing */
50 bp = buf;
51 *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
52 *bp++ = RTC_CMD_WRITE_ENABLE;
53
54 status = spi_write_then_read(spi, buf, 2,
55 NULL, 0);
56 if (status)
57 return status;
58
59 /* Write registers starting at the first time/date address. */
60 bp = buf;
61 *bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;
62
63 *bp++ = bin2bcd(time->tm_sec);
64 *bp++ = bin2bcd(time->tm_min);
65 *bp++ = bin2bcd(time->tm_hour);
66 *bp++ = bin2bcd(time->tm_mday);
67 *bp++ = bin2bcd(time->tm_mon + 1);
68 *bp++ = time->tm_wday + 1;
69 *bp++ = bin2bcd(time->tm_year % 100);
70 *bp++ = RTC_CMD_WRITE_DISABLE;
71
72 /* use write-then-read since dma from stack is nonportable */
73 return spi_write_then_read(spi, buf, sizeof(buf),
74 NULL, 0);
75}
76
77static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
78{
79 struct spi_device *spi = dev_get_drvdata(dev);
80 u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
81 u8 buf[RTC_CLCK_LEN - 1];
82 int status;
83
84 /* Use write-then-read to get all the date/time registers
85 * since dma from stack is nonportable
86 */
87 status = spi_write_then_read(spi, &addr, sizeof(addr),
88 buf, sizeof(buf));
89 if (status < 0)
90 return status;
91
92 /* Decode the registers */
93 time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
94 time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
95 time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
96 time->tm_wday = buf[RTC_ADDR_DAY] - 1;
97 time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
98 time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
99 time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
100
101 /* Time may not be set */
102 return rtc_valid_tm(time);
103}
104
105static const struct rtc_class_ops ds1302_rtc_ops = {
106 .read_time = ds1302_rtc_get_time,
107 .set_time = ds1302_rtc_set_time,
108};
109
110static int ds1302_probe(struct spi_device *spi)
111{
112 struct rtc_device *rtc;
113 u8 addr;
114 u8 buf[4];
115 u8 *bp = buf;
116 int status;
117
118 /* Sanity check board setup data. This may be hooked up
119 * in 3wire mode, but we don't care. Note that unless
120 * there's an inverter in place, this needs SPI_CS_HIGH!
121 */
122 if (spi->bits_per_word && (spi->bits_per_word != 8)) {
123 dev_err(&spi->dev, "bad word length\n");
124 return -EINVAL;
125 } else if (spi->max_speed_hz > 2000000) {
126 dev_err(&spi->dev, "speed is too high\n");
127 return -EINVAL;
128 } else if (spi->mode & SPI_CPHA) {
129 dev_err(&spi->dev, "bad mode\n");
130 return -EINVAL;
131 }
132
133 addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
134 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
135 if (status < 0) {
136 dev_err(&spi->dev, "control register read error %d\n",
137 status);
138 return status;
139 }
140
141 if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
142 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
143 if (status < 0) {
144 dev_err(&spi->dev, "control register read error %d\n",
145 status);
146 return status;
147 }
148
149 if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
150 dev_err(&spi->dev, "junk in control register\n");
151 return -ENODEV;
152 }
153 }
154 if (buf[0] == 0) {
155 bp = buf;
156 *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
157 *bp++ = RTC_CMD_WRITE_DISABLE;
158
159 status = spi_write_then_read(spi, buf, 2, NULL, 0);
160 if (status < 0) {
161 dev_err(&spi->dev, "control register write error %d\n",
162 status);
163 return status;
164 }
165
166 addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
167 status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
168 if (status < 0) {
169 dev_err(&spi->dev,
170 "error %d reading control register\n",
171 status);
172 return status;
173 }
174
175 if (buf[0] != RTC_CMD_WRITE_DISABLE) {
176 dev_err(&spi->dev, "failed to detect chip\n");
177 return -ENODEV;
178 }
179 }
180
181 spi_set_drvdata(spi, spi);
182
183 rtc = devm_rtc_device_register(&spi->dev, "ds1302",
184 &ds1302_rtc_ops, THIS_MODULE);
185 if (IS_ERR(rtc)) {
186 status = PTR_ERR(rtc);
187 dev_err(&spi->dev, "error %d registering rtc\n", status);
188 return status;
189 }
190
191 return 0;
192}
193
194static int ds1302_remove(struct spi_device *spi)
195{
196 spi_set_drvdata(spi, NULL);
197 return 0;
198}
199
200#ifdef CONFIG_OF
201static const struct of_device_id ds1302_dt_ids[] = {
202 { .compatible = "maxim,ds1302", },
203 { /* sentinel */ }
204};
205MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
206#endif
207
208static struct spi_driver ds1302_driver = {
209 .driver.name = "rtc-ds1302",
210 .driver.of_match_table = of_match_ptr(ds1302_dt_ids),
211 .probe = ds1302_probe,
212 .remove = ds1302_remove,
213};
214
215module_spi_driver(ds1302_driver);
216
217MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
218MODULE_AUTHOR("Paul Mundt, David McCullough");
219MODULE_LICENSE("GPL v2");