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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Expose a PWM controlled by the ChromeOS EC to the host processor.
4 *
5 * Copyright (C) 2016 Google, Inc.
6 */
7
8#include <linux/module.h>
9#include <linux/of.h>
10#include <linux/platform_data/cros_ec_commands.h>
11#include <linux/platform_data/cros_ec_proto.h>
12#include <linux/platform_device.h>
13#include <linux/pwm.h>
14#include <linux/slab.h>
15
16#include <dt-bindings/mfd/cros_ec.h>
17
18/**
19 * struct cros_ec_pwm_device - Driver data for EC PWM
20 *
21 * @ec: Pointer to EC device
22 * @chip: PWM controller chip
23 * @use_pwm_type: Use PWM types instead of generic channels
24 * @channel: array with per-channel data
25 */
26struct cros_ec_pwm_device {
27 struct cros_ec_device *ec;
28 struct pwm_chip chip;
29 bool use_pwm_type;
30 struct cros_ec_pwm *channel;
31};
32
33/**
34 * struct cros_ec_pwm - per-PWM driver data
35 * @duty_cycle: cached duty cycle
36 */
37struct cros_ec_pwm {
38 u16 duty_cycle;
39};
40
41static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *chip)
42{
43 return container_of(chip, struct cros_ec_pwm_device, chip);
44}
45
46static int cros_ec_dt_type_to_pwm_type(u8 dt_index, u8 *pwm_type)
47{
48 switch (dt_index) {
49 case CROS_EC_PWM_DT_KB_LIGHT:
50 *pwm_type = EC_PWM_TYPE_KB_LIGHT;
51 return 0;
52 case CROS_EC_PWM_DT_DISPLAY_LIGHT:
53 *pwm_type = EC_PWM_TYPE_DISPLAY_LIGHT;
54 return 0;
55 default:
56 return -EINVAL;
57 }
58}
59
60static int cros_ec_pwm_set_duty(struct cros_ec_pwm_device *ec_pwm, u8 index,
61 u16 duty)
62{
63 struct cros_ec_device *ec = ec_pwm->ec;
64 struct {
65 struct cros_ec_command msg;
66 struct ec_params_pwm_set_duty params;
67 } __packed buf;
68 struct ec_params_pwm_set_duty *params = &buf.params;
69 struct cros_ec_command *msg = &buf.msg;
70 int ret;
71
72 memset(&buf, 0, sizeof(buf));
73
74 msg->version = 0;
75 msg->command = EC_CMD_PWM_SET_DUTY;
76 msg->insize = 0;
77 msg->outsize = sizeof(*params);
78
79 params->duty = duty;
80
81 if (ec_pwm->use_pwm_type) {
82 ret = cros_ec_dt_type_to_pwm_type(index, ¶ms->pwm_type);
83 if (ret) {
84 dev_err(ec->dev, "Invalid PWM type index: %d\n", index);
85 return ret;
86 }
87 params->index = 0;
88 } else {
89 params->pwm_type = EC_PWM_TYPE_GENERIC;
90 params->index = index;
91 }
92
93 return cros_ec_cmd_xfer_status(ec, msg);
94}
95
96static int cros_ec_pwm_get_duty(struct cros_ec_pwm_device *ec_pwm, u8 index)
97{
98 struct cros_ec_device *ec = ec_pwm->ec;
99 struct {
100 struct cros_ec_command msg;
101 union {
102 struct ec_params_pwm_get_duty params;
103 struct ec_response_pwm_get_duty resp;
104 };
105 } __packed buf;
106 struct ec_params_pwm_get_duty *params = &buf.params;
107 struct ec_response_pwm_get_duty *resp = &buf.resp;
108 struct cros_ec_command *msg = &buf.msg;
109 int ret;
110
111 memset(&buf, 0, sizeof(buf));
112
113 msg->version = 0;
114 msg->command = EC_CMD_PWM_GET_DUTY;
115 msg->insize = sizeof(*resp);
116 msg->outsize = sizeof(*params);
117
118 if (ec_pwm->use_pwm_type) {
119 ret = cros_ec_dt_type_to_pwm_type(index, ¶ms->pwm_type);
120 if (ret) {
121 dev_err(ec->dev, "Invalid PWM type index: %d\n", index);
122 return ret;
123 }
124 params->index = 0;
125 } else {
126 params->pwm_type = EC_PWM_TYPE_GENERIC;
127 params->index = index;
128 }
129
130 ret = cros_ec_cmd_xfer_status(ec, msg);
131 if (ret < 0)
132 return ret;
133
134 return resp->duty;
135}
136
137static int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
138 const struct pwm_state *state)
139{
140 struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
141 struct cros_ec_pwm *channel = &ec_pwm->channel[pwm->hwpwm];
142 u16 duty_cycle;
143 int ret;
144
145 /* The EC won't let us change the period */
146 if (state->period != EC_PWM_MAX_DUTY)
147 return -EINVAL;
148
149 if (state->polarity != PWM_POLARITY_NORMAL)
150 return -EINVAL;
151
152 /*
153 * EC doesn't separate the concept of duty cycle and enabled, but
154 * kernel does. Translate.
155 */
156 duty_cycle = state->enabled ? state->duty_cycle : 0;
157
158 ret = cros_ec_pwm_set_duty(ec_pwm, pwm->hwpwm, duty_cycle);
159 if (ret < 0)
160 return ret;
161
162 channel->duty_cycle = state->duty_cycle;
163
164 return 0;
165}
166
167static int cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
168 struct pwm_state *state)
169{
170 struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
171 struct cros_ec_pwm *channel = &ec_pwm->channel[pwm->hwpwm];
172 int ret;
173
174 ret = cros_ec_pwm_get_duty(ec_pwm, pwm->hwpwm);
175 if (ret < 0) {
176 dev_err(chip->dev, "error getting initial duty: %d\n", ret);
177 return ret;
178 }
179
180 state->enabled = (ret > 0);
181 state->period = EC_PWM_MAX_DUTY;
182 state->polarity = PWM_POLARITY_NORMAL;
183
184 /*
185 * Note that "disabled" and "duty cycle == 0" are treated the same. If
186 * the cached duty cycle is not zero, used the cached duty cycle. This
187 * ensures that the configured duty cycle is kept across a disable and
188 * enable operation and avoids potentially confusing consumers.
189 *
190 * For the case of the initial hardware readout, channel->duty_cycle
191 * will be 0 and the actual duty cycle read from the EC is used.
192 */
193 if (ret == 0 && channel->duty_cycle > 0)
194 state->duty_cycle = channel->duty_cycle;
195 else
196 state->duty_cycle = ret;
197
198 return 0;
199}
200
201static struct pwm_device *
202cros_ec_pwm_xlate(struct pwm_chip *chip, const struct of_phandle_args *args)
203{
204 struct pwm_device *pwm;
205
206 if (args->args[0] >= chip->npwm)
207 return ERR_PTR(-EINVAL);
208
209 pwm = pwm_request_from_chip(chip, args->args[0], NULL);
210 if (IS_ERR(pwm))
211 return pwm;
212
213 /* The EC won't let us change the period */
214 pwm->args.period = EC_PWM_MAX_DUTY;
215
216 return pwm;
217}
218
219static const struct pwm_ops cros_ec_pwm_ops = {
220 .get_state = cros_ec_pwm_get_state,
221 .apply = cros_ec_pwm_apply,
222};
223
224/*
225 * Determine the number of supported PWMs. The EC does not return the number
226 * of PWMs it supports directly, so we have to read the pwm duty cycle for
227 * subsequent channels until we get an error.
228 */
229static int cros_ec_num_pwms(struct cros_ec_pwm_device *ec_pwm)
230{
231 int i, ret;
232
233 /* The index field is only 8 bits */
234 for (i = 0; i <= U8_MAX; i++) {
235 ret = cros_ec_pwm_get_duty(ec_pwm, i);
236 /*
237 * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM
238 * responses; everything else is treated as an error.
239 * The EC error codes map to -EOPNOTSUPP and -EINVAL,
240 * so check for those.
241 */
242 switch (ret) {
243 case -EOPNOTSUPP: /* invalid command */
244 return -ENODEV;
245 case -EINVAL: /* invalid parameter */
246 return i;
247 default:
248 if (ret < 0)
249 return ret;
250 break;
251 }
252 }
253
254 return U8_MAX;
255}
256
257static int cros_ec_pwm_probe(struct platform_device *pdev)
258{
259 struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
260 struct device *dev = &pdev->dev;
261 struct device_node *np = pdev->dev.of_node;
262 struct cros_ec_pwm_device *ec_pwm;
263 struct pwm_chip *chip;
264 int ret;
265
266 if (!ec)
267 return dev_err_probe(dev, -EINVAL, "no parent EC device\n");
268
269 ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL);
270 if (!ec_pwm)
271 return -ENOMEM;
272 chip = &ec_pwm->chip;
273 ec_pwm->ec = ec;
274
275 if (of_device_is_compatible(np, "google,cros-ec-pwm-type"))
276 ec_pwm->use_pwm_type = true;
277
278 /* PWM chip */
279 chip->dev = dev;
280 chip->ops = &cros_ec_pwm_ops;
281 chip->of_xlate = cros_ec_pwm_xlate;
282 chip->of_pwm_n_cells = 1;
283
284 if (ec_pwm->use_pwm_type) {
285 chip->npwm = CROS_EC_PWM_DT_COUNT;
286 } else {
287 ret = cros_ec_num_pwms(ec_pwm);
288 if (ret < 0)
289 return dev_err_probe(dev, ret, "Couldn't find PWMs\n");
290 chip->npwm = ret;
291 }
292
293 ec_pwm->channel = devm_kcalloc(dev, chip->npwm, sizeof(*ec_pwm->channel),
294 GFP_KERNEL);
295 if (!ec_pwm->channel)
296 return -ENOMEM;
297
298 dev_dbg(dev, "Probed %u PWMs\n", chip->npwm);
299
300 ret = devm_pwmchip_add(dev, chip);
301 if (ret < 0)
302 return dev_err_probe(dev, ret, "cannot register PWM\n");
303
304 return 0;
305}
306
307#ifdef CONFIG_OF
308static const struct of_device_id cros_ec_pwm_of_match[] = {
309 { .compatible = "google,cros-ec-pwm" },
310 { .compatible = "google,cros-ec-pwm-type" },
311 {},
312};
313MODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match);
314#endif
315
316static struct platform_driver cros_ec_pwm_driver = {
317 .probe = cros_ec_pwm_probe,
318 .driver = {
319 .name = "cros-ec-pwm",
320 .of_match_table = of_match_ptr(cros_ec_pwm_of_match),
321 },
322};
323module_platform_driver(cros_ec_pwm_driver);
324
325MODULE_ALIAS("platform:cros-ec-pwm");
326MODULE_DESCRIPTION("ChromeOS EC PWM driver");
327MODULE_LICENSE("GPL v2");
1/*
2 * Copyright (C) 2016 Google, Inc
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2, as published by
6 * the Free Software Foundation.
7 *
8 * Expose a PWM controlled by the ChromeOS EC to the host processor.
9 */
10
11#include <linux/module.h>
12#include <linux/mfd/cros_ec.h>
13#include <linux/mfd/cros_ec_commands.h>
14#include <linux/platform_device.h>
15#include <linux/pwm.h>
16#include <linux/slab.h>
17
18/**
19 * struct cros_ec_pwm_device - Driver data for EC PWM
20 *
21 * @dev: Device node
22 * @ec: Pointer to EC device
23 * @chip: PWM controller chip
24 */
25struct cros_ec_pwm_device {
26 struct device *dev;
27 struct cros_ec_device *ec;
28 struct pwm_chip chip;
29};
30
31static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *c)
32{
33 return container_of(c, struct cros_ec_pwm_device, chip);
34}
35
36static int cros_ec_pwm_set_duty(struct cros_ec_device *ec, u8 index, u16 duty)
37{
38 struct {
39 struct cros_ec_command msg;
40 struct ec_params_pwm_set_duty params;
41 } __packed buf;
42 struct ec_params_pwm_set_duty *params = &buf.params;
43 struct cros_ec_command *msg = &buf.msg;
44
45 memset(&buf, 0, sizeof(buf));
46
47 msg->version = 0;
48 msg->command = EC_CMD_PWM_SET_DUTY;
49 msg->insize = 0;
50 msg->outsize = sizeof(*params);
51
52 params->duty = duty;
53 params->pwm_type = EC_PWM_TYPE_GENERIC;
54 params->index = index;
55
56 return cros_ec_cmd_xfer_status(ec, msg);
57}
58
59static int __cros_ec_pwm_get_duty(struct cros_ec_device *ec, u8 index,
60 u32 *result)
61{
62 struct {
63 struct cros_ec_command msg;
64 union {
65 struct ec_params_pwm_get_duty params;
66 struct ec_response_pwm_get_duty resp;
67 };
68 } __packed buf;
69 struct ec_params_pwm_get_duty *params = &buf.params;
70 struct ec_response_pwm_get_duty *resp = &buf.resp;
71 struct cros_ec_command *msg = &buf.msg;
72 int ret;
73
74 memset(&buf, 0, sizeof(buf));
75
76 msg->version = 0;
77 msg->command = EC_CMD_PWM_GET_DUTY;
78 msg->insize = sizeof(*params);
79 msg->outsize = sizeof(*resp);
80
81 params->pwm_type = EC_PWM_TYPE_GENERIC;
82 params->index = index;
83
84 ret = cros_ec_cmd_xfer_status(ec, msg);
85 if (result)
86 *result = msg->result;
87 if (ret < 0)
88 return ret;
89
90 return resp->duty;
91}
92
93static int cros_ec_pwm_get_duty(struct cros_ec_device *ec, u8 index)
94{
95 return __cros_ec_pwm_get_duty(ec, index, NULL);
96}
97
98static int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
99 struct pwm_state *state)
100{
101 struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
102 int duty_cycle;
103
104 /* The EC won't let us change the period */
105 if (state->period != EC_PWM_MAX_DUTY)
106 return -EINVAL;
107
108 /*
109 * EC doesn't separate the concept of duty cycle and enabled, but
110 * kernel does. Translate.
111 */
112 duty_cycle = state->enabled ? state->duty_cycle : 0;
113
114 return cros_ec_pwm_set_duty(ec_pwm->ec, pwm->hwpwm, duty_cycle);
115}
116
117static void cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
118 struct pwm_state *state)
119{
120 struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
121 int ret;
122
123 ret = cros_ec_pwm_get_duty(ec_pwm->ec, pwm->hwpwm);
124 if (ret < 0) {
125 dev_err(chip->dev, "error getting initial duty: %d\n", ret);
126 return;
127 }
128
129 state->enabled = (ret > 0);
130 state->period = EC_PWM_MAX_DUTY;
131
132 /* Note that "disabled" and "duty cycle == 0" are treated the same */
133 state->duty_cycle = ret;
134}
135
136static struct pwm_device *
137cros_ec_pwm_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
138{
139 struct pwm_device *pwm;
140
141 if (args->args[0] >= pc->npwm)
142 return ERR_PTR(-EINVAL);
143
144 pwm = pwm_request_from_chip(pc, args->args[0], NULL);
145 if (IS_ERR(pwm))
146 return pwm;
147
148 /* The EC won't let us change the period */
149 pwm->args.period = EC_PWM_MAX_DUTY;
150
151 return pwm;
152}
153
154static const struct pwm_ops cros_ec_pwm_ops = {
155 .get_state = cros_ec_pwm_get_state,
156 .apply = cros_ec_pwm_apply,
157 .owner = THIS_MODULE,
158};
159
160static int cros_ec_num_pwms(struct cros_ec_device *ec)
161{
162 int i, ret;
163
164 /* The index field is only 8 bits */
165 for (i = 0; i <= U8_MAX; i++) {
166 u32 result = 0;
167
168 ret = __cros_ec_pwm_get_duty(ec, i, &result);
169 /* We want to parse EC protocol errors */
170 if (ret < 0 && !(ret == -EPROTO && result))
171 return ret;
172
173 /*
174 * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM
175 * responses; everything else is treated as an error.
176 */
177 if (result == EC_RES_INVALID_COMMAND)
178 return -ENODEV;
179 else if (result == EC_RES_INVALID_PARAM)
180 return i;
181 else if (result)
182 return -EPROTO;
183 }
184
185 return U8_MAX;
186}
187
188static int cros_ec_pwm_probe(struct platform_device *pdev)
189{
190 struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
191 struct device *dev = &pdev->dev;
192 struct cros_ec_pwm_device *ec_pwm;
193 struct pwm_chip *chip;
194 int ret;
195
196 if (!ec) {
197 dev_err(dev, "no parent EC device\n");
198 return -EINVAL;
199 }
200
201 ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL);
202 if (!ec_pwm)
203 return -ENOMEM;
204 chip = &ec_pwm->chip;
205 ec_pwm->ec = ec;
206
207 /* PWM chip */
208 chip->dev = dev;
209 chip->ops = &cros_ec_pwm_ops;
210 chip->of_xlate = cros_ec_pwm_xlate;
211 chip->of_pwm_n_cells = 1;
212 chip->base = -1;
213 ret = cros_ec_num_pwms(ec);
214 if (ret < 0) {
215 dev_err(dev, "Couldn't find PWMs: %d\n", ret);
216 return ret;
217 }
218 chip->npwm = ret;
219 dev_dbg(dev, "Probed %u PWMs\n", chip->npwm);
220
221 ret = pwmchip_add(chip);
222 if (ret < 0) {
223 dev_err(dev, "cannot register PWM: %d\n", ret);
224 return ret;
225 }
226
227 platform_set_drvdata(pdev, ec_pwm);
228
229 return ret;
230}
231
232static int cros_ec_pwm_remove(struct platform_device *dev)
233{
234 struct cros_ec_pwm_device *ec_pwm = platform_get_drvdata(dev);
235 struct pwm_chip *chip = &ec_pwm->chip;
236
237 return pwmchip_remove(chip);
238}
239
240#ifdef CONFIG_OF
241static const struct of_device_id cros_ec_pwm_of_match[] = {
242 { .compatible = "google,cros-ec-pwm" },
243 {},
244};
245MODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match);
246#endif
247
248static struct platform_driver cros_ec_pwm_driver = {
249 .probe = cros_ec_pwm_probe,
250 .remove = cros_ec_pwm_remove,
251 .driver = {
252 .name = "cros-ec-pwm",
253 .of_match_table = of_match_ptr(cros_ec_pwm_of_match),
254 },
255};
256module_platform_driver(cros_ec_pwm_driver);
257
258MODULE_ALIAS("platform:cros-ec-pwm");
259MODULE_DESCRIPTION("ChromeOS EC PWM driver");
260MODULE_LICENSE("GPL v2");