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1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#include <net/mac80211.h>
8#include <linux/netdevice.h>
9#include <linux/dmi.h>
10
11#include "iwl-trans.h"
12#include "iwl-op-mode.h"
13#include "fw/img.h"
14#include "iwl-debug.h"
15#include "iwl-prph.h"
16#include "fw/acpi.h"
17#include "fw/pnvm.h"
18#include "fw/uefi.h"
19
20#include "mvm.h"
21#include "fw/dbg.h"
22#include "iwl-phy-db.h"
23#include "iwl-modparams.h"
24#include "iwl-nvm-parse.h"
25#include "time-sync.h"
26
27#define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
28#define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
29
30#define IWL_UATS_VLP_AP_SUPPORTED BIT(29)
31#define IWL_UATS_AFC_AP_SUPPORTED BIT(30)
32
33struct iwl_mvm_alive_data {
34 bool valid;
35 u32 scd_base_addr;
36};
37
38static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
39{
40 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
41 .valid = cpu_to_le32(valid_tx_ant),
42 };
43
44 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
45 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
46 sizeof(tx_ant_cmd), &tx_ant_cmd);
47}
48
49static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
50{
51 int i;
52 struct iwl_rss_config_cmd cmd = {
53 .flags = cpu_to_le32(IWL_RSS_ENABLE),
54 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
55 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
56 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
57 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
58 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
59 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
60 };
61
62 if (mvm->trans->num_rx_queues == 1)
63 return 0;
64
65 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
66 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
67 cmd.indirection_table[i] =
68 1 + (i % (mvm->trans->num_rx_queues - 1));
69 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
70
71 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
72}
73
74static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
75{
76 struct iwl_dqa_enable_cmd dqa_cmd = {
77 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
78 };
79 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
80 int ret;
81
82 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
83 if (ret)
84 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
85 else
86 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
87
88 return ret;
89}
90
91void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
92 struct iwl_rx_cmd_buffer *rxb)
93{
94 struct iwl_rx_packet *pkt = rxb_addr(rxb);
95 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
96 __le32 *dump_data = mfu_dump_notif->data;
97 int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
98 int i;
99
100 if (mfu_dump_notif->index_num == 0)
101 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
102 le32_to_cpu(mfu_dump_notif->assert_id));
103
104 for (i = 0; i < n_words; i++)
105 IWL_DEBUG_INFO(mvm,
106 "MFUART assert dump, dword %u: 0x%08x\n",
107 le16_to_cpu(mfu_dump_notif->index_num) *
108 n_words + i,
109 le32_to_cpu(dump_data[i]));
110}
111
112static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
113 struct iwl_rx_packet *pkt, void *data)
114{
115 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
116 struct iwl_mvm *mvm =
117 container_of(notif_wait, struct iwl_mvm, notif_wait);
118 struct iwl_mvm_alive_data *alive_data = data;
119 struct iwl_umac_alive *umac;
120 struct iwl_lmac_alive *lmac1;
121 struct iwl_lmac_alive *lmac2 = NULL;
122 u16 status;
123 u32 lmac_error_event_table, umac_error_table;
124 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
125 UCODE_ALIVE_NTFY, 0);
126 u32 i;
127
128
129 if (version == 6) {
130 struct iwl_alive_ntf_v6 *palive;
131
132 if (pkt_len < sizeof(*palive))
133 return false;
134
135 palive = (void *)pkt->data;
136 mvm->trans->dbg.imr_data.imr_enable =
137 le32_to_cpu(palive->imr.enabled);
138 mvm->trans->dbg.imr_data.imr_size =
139 le32_to_cpu(palive->imr.size);
140 mvm->trans->dbg.imr_data.imr2sram_remainbyte =
141 mvm->trans->dbg.imr_data.imr_size;
142 mvm->trans->dbg.imr_data.imr_base_addr =
143 palive->imr.base_addr;
144 mvm->trans->dbg.imr_data.imr_curr_addr =
145 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
146 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
147 mvm->trans->dbg.imr_data.imr_enable,
148 mvm->trans->dbg.imr_data.imr_size,
149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
150
151 if (!mvm->trans->dbg.imr_data.imr_enable) {
152 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
153 struct iwl_ucode_tlv *reg_tlv;
154 struct iwl_fw_ini_region_tlv *reg;
155
156 reg_tlv = mvm->trans->dbg.active_regions[i];
157 if (!reg_tlv)
158 continue;
159
160 reg = (void *)reg_tlv->data;
161 /*
162 * We have only one DRAM IMR region, so we
163 * can break as soon as we find the first
164 * one.
165 */
166 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
167 mvm->trans->dbg.unsupported_region_msk |= BIT(i);
168 break;
169 }
170 }
171 }
172 }
173
174 if (version >= 5) {
175 struct iwl_alive_ntf_v5 *palive;
176
177 if (pkt_len < sizeof(*palive))
178 return false;
179
180 palive = (void *)pkt->data;
181 umac = &palive->umac_data;
182 lmac1 = &palive->lmac_data[0];
183 lmac2 = &palive->lmac_data[1];
184 status = le16_to_cpu(palive->status);
185
186 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
187 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
188 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
189
190 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
191 mvm->trans->sku_id[0],
192 mvm->trans->sku_id[1],
193 mvm->trans->sku_id[2]);
194 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
195 struct iwl_alive_ntf_v4 *palive;
196
197 if (pkt_len < sizeof(*palive))
198 return false;
199
200 palive = (void *)pkt->data;
201 umac = &palive->umac_data;
202 lmac1 = &palive->lmac_data[0];
203 lmac2 = &palive->lmac_data[1];
204 status = le16_to_cpu(palive->status);
205 } else if (iwl_rx_packet_payload_len(pkt) ==
206 sizeof(struct iwl_alive_ntf_v3)) {
207 struct iwl_alive_ntf_v3 *palive3;
208
209 if (pkt_len < sizeof(*palive3))
210 return false;
211
212 palive3 = (void *)pkt->data;
213 umac = &palive3->umac_data;
214 lmac1 = &palive3->lmac_data;
215 status = le16_to_cpu(palive3->status);
216 } else {
217 WARN(1, "unsupported alive notification (size %d)\n",
218 iwl_rx_packet_payload_len(pkt));
219 /* get timeout later */
220 return false;
221 }
222
223 lmac_error_event_table =
224 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
225 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
226
227 if (lmac2)
228 mvm->trans->dbg.lmac_error_event_table[1] =
229 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
230
231 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
232 ~FW_ADDR_CACHE_CONTROL;
233
234 if (umac_error_table) {
235 if (umac_error_table >=
236 mvm->trans->cfg->min_umac_error_event_table) {
237 iwl_fw_umac_set_alive_err_table(mvm->trans,
238 umac_error_table);
239 } else {
240 IWL_ERR(mvm,
241 "Not valid error log pointer 0x%08X for %s uCode\n",
242 umac_error_table,
243 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
244 "Init" : "RT");
245 }
246 }
247
248 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
249 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
250
251 IWL_DEBUG_FW(mvm,
252 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
253 status, lmac1->ver_type, lmac1->ver_subtype);
254
255 if (lmac2)
256 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
257
258 IWL_DEBUG_FW(mvm,
259 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
260 le32_to_cpu(umac->umac_major),
261 le32_to_cpu(umac->umac_minor));
262
263 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
264
265 return true;
266}
267
268static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
269 struct iwl_rx_packet *pkt, void *data)
270{
271 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
272
273 return true;
274}
275
276static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
277 struct iwl_rx_packet *pkt, void *data)
278{
279 struct iwl_phy_db *phy_db = data;
280
281 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
282 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
283 return true;
284 }
285
286 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
287
288 return false;
289}
290
291static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
292{
293#define IWL_FW_PRINT_REG_INFO(reg_name) \
294 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
295
296 struct iwl_trans *trans = mvm->trans;
297 enum iwl_device_family device_family = trans->trans_cfg->device_family;
298
299 if (device_family < IWL_DEVICE_FAMILY_8000)
300 return;
301
302 if (device_family <= IWL_DEVICE_FAMILY_9000)
303 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
304 else
305 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
306
307 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
308
309 /* print OPT info */
310 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
311 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
312}
313
314static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
315 enum iwl_ucode_type ucode_type)
316{
317 struct iwl_notification_wait alive_wait;
318 struct iwl_mvm_alive_data alive_data = {};
319 const struct fw_img *fw;
320 int ret;
321 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
322 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
323 bool run_in_rfkill =
324 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
325 u8 count;
326 struct iwl_pc_data *pc_data;
327
328 if (ucode_type == IWL_UCODE_REGULAR &&
329 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
330 !(fw_has_capa(&mvm->fw->ucode_capa,
331 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
332 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
333 else
334 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
335 if (WARN_ON(!fw))
336 return -EINVAL;
337 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
338 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
339
340 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
341 alive_cmd, ARRAY_SIZE(alive_cmd),
342 iwl_alive_fn, &alive_data);
343
344 /*
345 * We want to load the INIT firmware even in RFKILL
346 * For the unified firmware case, the ucode_type is not
347 * INIT, but we still need to run it.
348 */
349 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
350 if (ret) {
351 iwl_fw_set_current_image(&mvm->fwrt, old_type);
352 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
353 return ret;
354 }
355
356 /*
357 * Some things may run in the background now, but we
358 * just wait for the ALIVE notification here.
359 */
360 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
361 MVM_UCODE_ALIVE_TIMEOUT);
362
363 if (mvm->trans->trans_cfg->device_family ==
364 IWL_DEVICE_FAMILY_AX210) {
365 /* print these registers regardless of alive fail/success */
366 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
367 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
368 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
369 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
370 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
371 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
372 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
373 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
374 }
375
376 if (ret) {
377 struct iwl_trans *trans = mvm->trans;
378
379 /* SecBoot info */
380 if (trans->trans_cfg->device_family >=
381 IWL_DEVICE_FAMILY_22000) {
382 IWL_ERR(mvm,
383 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
384 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
385 iwl_read_umac_prph(trans,
386 UMAG_SB_CPU_2_STATUS));
387 } else if (trans->trans_cfg->device_family >=
388 IWL_DEVICE_FAMILY_8000) {
389 IWL_ERR(mvm,
390 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
391 iwl_read_prph(trans, SB_CPU_1_STATUS),
392 iwl_read_prph(trans, SB_CPU_2_STATUS));
393 }
394
395 iwl_mvm_print_pd_notification(mvm);
396
397 /* LMAC/UMAC PC info */
398 if (trans->trans_cfg->device_family >=
399 IWL_DEVICE_FAMILY_22000) {
400 pc_data = trans->dbg.pc_data;
401 for (count = 0; count < trans->dbg.num_pc;
402 count++, pc_data++)
403 IWL_ERR(mvm, "%s: 0x%x\n",
404 pc_data->pc_name,
405 pc_data->pc_address);
406 } else if (trans->trans_cfg->device_family >=
407 IWL_DEVICE_FAMILY_9000) {
408 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
409 iwl_read_umac_prph(trans,
410 UREG_UMAC_CURRENT_PC));
411 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
412 iwl_read_umac_prph(trans,
413 UREG_LMAC1_CURRENT_PC));
414 if (iwl_mvm_is_cdb_supported(mvm))
415 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
416 iwl_read_umac_prph(trans,
417 UREG_LMAC2_CURRENT_PC));
418 }
419
420 if (ret == -ETIMEDOUT && !mvm->pldr_sync)
421 iwl_fw_dbg_error_collect(&mvm->fwrt,
422 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
423
424 iwl_fw_set_current_image(&mvm->fwrt, old_type);
425 return ret;
426 }
427
428 if (!alive_data.valid) {
429 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
430 iwl_fw_set_current_image(&mvm->fwrt, old_type);
431 return -EIO;
432 }
433
434 /* if reached this point, Alive notification was received */
435 iwl_mei_alive_notif(true);
436
437 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
438 &mvm->fw->ucode_capa);
439 if (ret) {
440 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
441 iwl_fw_set_current_image(&mvm->fwrt, old_type);
442 return ret;
443 }
444
445 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
446
447 /*
448 * Note: all the queues are enabled as part of the interface
449 * initialization, but in firmware restart scenarios they
450 * could be stopped, so wake them up. In firmware restart,
451 * mac80211 will have the queues stopped as well until the
452 * reconfiguration completes. During normal startup, they
453 * will be empty.
454 */
455
456 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
457 /*
458 * Set a 'fake' TID for the command queue, since we use the
459 * hweight() of the tid_bitmap as a refcount now. Not that
460 * we ever even consider the command queue as one we might
461 * want to reuse, but be safe nevertheless.
462 */
463 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
464 BIT(IWL_MAX_TID_COUNT + 2);
465
466 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
467#ifdef CONFIG_IWLWIFI_DEBUGFS
468 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
469#endif
470
471 /*
472 * All the BSSes in the BSS table include the GP2 in the system
473 * at the beacon Rx time, this is of course no longer relevant
474 * since we are resetting the firmware.
475 * Purge all the BSS table.
476 */
477 cfg80211_bss_flush(mvm->hw->wiphy);
478
479 return 0;
480}
481
482static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
483 struct iwl_phy_specific_cfg *phy_filters)
484{
485#ifdef CONFIG_ACPI
486 *phy_filters = mvm->phy_filters;
487#endif /* CONFIG_ACPI */
488}
489
490#if defined(CONFIG_ACPI) && defined(CONFIG_EFI)
491static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
492{
493 u8 cmd_ver;
494 int ret;
495 struct iwl_host_cmd cmd = {
496 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
497 UATS_TABLE_CMD),
498 .flags = 0,
499 .data[0] = &mvm->fwrt.uats_table,
500 .len[0] = sizeof(mvm->fwrt.uats_table),
501 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
502 };
503
504 if (!(mvm->trans->trans_cfg->device_family >=
505 IWL_DEVICE_FAMILY_AX210)) {
506 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n");
507 return;
508 }
509
510 if (!mvm->fwrt.uats_enabled) {
511 IWL_DEBUG_RADIO(mvm, "UATS feature is disabled\n");
512 return;
513 }
514
515 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
516 IWL_FW_CMD_VER_UNKNOWN);
517 if (cmd_ver != 1) {
518 IWL_DEBUG_RADIO(mvm,
519 "UATS_TABLE_CMD ver %d not supported\n",
520 cmd_ver);
521 return;
522 }
523
524 ret = iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt);
525 if (ret < 0) {
526 IWL_ERR(mvm, "failed to read UATS table (%d)\n", ret);
527 return;
528 }
529
530 ret = iwl_mvm_send_cmd(mvm, &cmd);
531 if (ret < 0)
532 IWL_ERR(mvm, "failed to send UATS_TABLE_CMD (%d)\n", ret);
533 else
534 IWL_DEBUG_RADIO(mvm, "UATS_TABLE_CMD sent to FW\n");
535}
536
537static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
538{
539 u8 cmd_ver;
540 int ret;
541 struct iwl_host_cmd cmd = {
542 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
543 SAR_OFFSET_MAPPING_TABLE_CMD),
544 .flags = 0,
545 .data[0] = &mvm->fwrt.sgom_table,
546 .len[0] = sizeof(mvm->fwrt.sgom_table),
547 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
548 };
549
550 if (!mvm->fwrt.sgom_enabled) {
551 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
552 return 0;
553 }
554
555 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
556 IWL_FW_CMD_VER_UNKNOWN);
557
558 if (cmd_ver != 2) {
559 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
560 cmd_ver);
561 return 0;
562 }
563
564 ret = iwl_mvm_send_cmd(mvm, &cmd);
565 if (ret < 0)
566 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
567
568 return ret;
569}
570#else
571
572static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
573{
574 return 0;
575}
576
577static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
578{
579}
580#endif
581
582static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
583{
584 u32 cmd_id = PHY_CONFIGURATION_CMD;
585 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
586 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
587 u8 cmd_ver;
588 size_t cmd_size;
589
590 if (iwl_mvm_has_unified_ucode(mvm) &&
591 !mvm->trans->cfg->tx_with_siso_diversity)
592 return 0;
593
594 if (mvm->trans->cfg->tx_with_siso_diversity) {
595 /*
596 * TODO: currently we don't set the antenna but letting the NIC
597 * to decide which antenna to use. This should come from BIOS.
598 */
599 phy_cfg_cmd.phy_cfg =
600 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
601 }
602
603 /* Set parameters */
604 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
605
606 /* set flags extra PHY configuration flags from the device's cfg */
607 phy_cfg_cmd.phy_cfg |=
608 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
609
610 phy_cfg_cmd.calib_control.event_trigger =
611 mvm->fw->default_calib[ucode_type].event_trigger;
612 phy_cfg_cmd.calib_control.flow_trigger =
613 mvm->fw->default_calib[ucode_type].flow_trigger;
614
615 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
616 IWL_FW_CMD_VER_UNKNOWN);
617 if (cmd_ver >= 3)
618 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
619
620 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
621 phy_cfg_cmd.phy_cfg);
622 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
623 sizeof(struct iwl_phy_cfg_cmd_v1);
624 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
625}
626
627static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
628{
629 struct iwl_notification_wait init_wait;
630 struct iwl_nvm_access_complete_cmd nvm_complete = {};
631 struct iwl_init_extended_cfg_cmd init_cfg = {
632 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
633 };
634 static const u16 init_complete[] = {
635 INIT_COMPLETE_NOTIF,
636 };
637 u32 sb_cfg;
638 int ret;
639
640 if (mvm->trans->cfg->tx_with_siso_diversity)
641 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
642
643 lockdep_assert_held(&mvm->mutex);
644
645 mvm->rfkill_safe_init_done = false;
646
647 if (mvm->trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
648 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
649 /* if needed, we'll reset this on our way out later */
650 mvm->pldr_sync = sb_cfg == SB_CFG_RESIDES_IN_ROM;
651 if (mvm->pldr_sync && iwl_mei_pldr_req())
652 return -EBUSY;
653 }
654
655 iwl_init_notification_wait(&mvm->notif_wait,
656 &init_wait,
657 init_complete,
658 ARRAY_SIZE(init_complete),
659 iwl_wait_init_complete,
660 NULL);
661
662 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
663
664 /* Will also start the device */
665 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
666 if (ret) {
667 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
668
669 /* if we needed reset then fail here, but notify and remove */
670 if (mvm->pldr_sync) {
671 iwl_mei_alive_notif(false);
672 iwl_trans_pcie_remove(mvm->trans, true);
673 }
674
675 goto error;
676 }
677 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
678 NULL);
679
680 /* Send init config command to mark that we are sending NVM access
681 * commands
682 */
683 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
684 INIT_EXTENDED_CFG_CMD),
685 CMD_SEND_IN_RFKILL,
686 sizeof(init_cfg), &init_cfg);
687 if (ret) {
688 IWL_ERR(mvm, "Failed to run init config command: %d\n",
689 ret);
690 goto error;
691 }
692
693 /* Load NVM to NIC if needed */
694 if (mvm->nvm_file_name) {
695 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
696 mvm->nvm_sections);
697 if (ret)
698 goto error;
699 ret = iwl_mvm_load_nvm_to_nic(mvm);
700 if (ret)
701 goto error;
702 }
703
704 if (IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
705 ret = iwl_nvm_init(mvm);
706 if (ret) {
707 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
708 goto error;
709 }
710 }
711
712 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
713 NVM_ACCESS_COMPLETE),
714 CMD_SEND_IN_RFKILL,
715 sizeof(nvm_complete), &nvm_complete);
716 if (ret) {
717 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
718 ret);
719 goto error;
720 }
721
722 ret = iwl_send_phy_cfg_cmd(mvm);
723 if (ret) {
724 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
725 ret);
726 goto error;
727 }
728
729 /* We wait for the INIT complete notification */
730 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
731 MVM_UCODE_ALIVE_TIMEOUT);
732 if (ret)
733 return ret;
734
735 /* Read the NVM only at driver load time, no need to do this twice */
736 if (!IWL_MVM_PARSE_NVM && !mvm->nvm_data) {
737 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw,
738 mvm->set_tx_ant, mvm->set_rx_ant);
739 if (IS_ERR(mvm->nvm_data)) {
740 ret = PTR_ERR(mvm->nvm_data);
741 mvm->nvm_data = NULL;
742 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
743 return ret;
744 }
745 }
746
747 mvm->rfkill_safe_init_done = true;
748
749 return 0;
750
751error:
752 iwl_remove_notification(&mvm->notif_wait, &init_wait);
753 return ret;
754}
755
756int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
757{
758 struct iwl_notification_wait calib_wait;
759 static const u16 init_complete[] = {
760 INIT_COMPLETE_NOTIF,
761 CALIB_RES_NOTIF_PHY_DB
762 };
763 int ret;
764
765 if (iwl_mvm_has_unified_ucode(mvm))
766 return iwl_run_unified_mvm_ucode(mvm);
767
768 lockdep_assert_held(&mvm->mutex);
769
770 mvm->rfkill_safe_init_done = false;
771
772 iwl_init_notification_wait(&mvm->notif_wait,
773 &calib_wait,
774 init_complete,
775 ARRAY_SIZE(init_complete),
776 iwl_wait_phy_db_entry,
777 mvm->phy_db);
778
779 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
780
781 /* Will also start the device */
782 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
783 if (ret) {
784 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
785 goto remove_notif;
786 }
787
788 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
789 ret = iwl_mvm_send_bt_init_conf(mvm);
790 if (ret)
791 goto remove_notif;
792 }
793
794 /* Read the NVM only at driver load time, no need to do this twice */
795 if (!mvm->nvm_data) {
796 ret = iwl_nvm_init(mvm);
797 if (ret) {
798 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
799 goto remove_notif;
800 }
801 }
802
803 /* In case we read the NVM from external file, load it to the NIC */
804 if (mvm->nvm_file_name) {
805 ret = iwl_mvm_load_nvm_to_nic(mvm);
806 if (ret)
807 goto remove_notif;
808 }
809
810 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
811 "Too old NVM version (0x%0x, required = 0x%0x)",
812 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
813
814 /*
815 * abort after reading the nvm in case RF Kill is on, we will complete
816 * the init seq later when RF kill will switch to off
817 */
818 if (iwl_mvm_is_radio_hw_killed(mvm)) {
819 IWL_DEBUG_RF_KILL(mvm,
820 "jump over all phy activities due to RF kill\n");
821 goto remove_notif;
822 }
823
824 mvm->rfkill_safe_init_done = true;
825
826 /* Send TX valid antennas before triggering calibrations */
827 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
828 if (ret)
829 goto remove_notif;
830
831 ret = iwl_send_phy_cfg_cmd(mvm);
832 if (ret) {
833 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
834 ret);
835 goto remove_notif;
836 }
837
838 /*
839 * Some things may run in the background now, but we
840 * just wait for the calibration complete notification.
841 */
842 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
843 MVM_UCODE_CALIB_TIMEOUT);
844 if (!ret)
845 goto out;
846
847 if (iwl_mvm_is_radio_hw_killed(mvm)) {
848 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
849 ret = 0;
850 } else {
851 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
852 ret);
853 }
854
855 goto out;
856
857remove_notif:
858 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
859out:
860 mvm->rfkill_safe_init_done = false;
861 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
862 /* we want to debug INIT and we have no NVM - fake */
863 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
864 sizeof(struct ieee80211_channel) +
865 sizeof(struct ieee80211_rate),
866 GFP_KERNEL);
867 if (!mvm->nvm_data)
868 return -ENOMEM;
869 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
870 mvm->nvm_data->bands[0].n_channels = 1;
871 mvm->nvm_data->bands[0].n_bitrates = 1;
872 mvm->nvm_data->bands[0].bitrates =
873 (void *)(mvm->nvm_data->channels + 1);
874 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
875 }
876
877 return ret;
878}
879
880static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
881{
882 struct iwl_ltr_config_cmd cmd = {
883 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
884 };
885
886 if (!mvm->trans->ltr_enabled)
887 return 0;
888
889 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
890 sizeof(cmd), &cmd);
891}
892
893#ifdef CONFIG_ACPI
894int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
895{
896 u32 cmd_id = REDUCE_TX_POWER_CMD;
897 struct iwl_dev_tx_power_cmd cmd = {
898 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
899 };
900 __le16 *per_chain;
901 int ret;
902 u16 len = 0;
903 u32 n_subbands;
904 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
905 IWL_FW_CMD_VER_UNKNOWN);
906 if (cmd_ver == 7) {
907 len = sizeof(cmd.v7);
908 n_subbands = IWL_NUM_SUB_BANDS_V2;
909 per_chain = cmd.v7.per_chain[0][0];
910 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
911 } else if (cmd_ver == 6) {
912 len = sizeof(cmd.v6);
913 n_subbands = IWL_NUM_SUB_BANDS_V2;
914 per_chain = cmd.v6.per_chain[0][0];
915 } else if (fw_has_api(&mvm->fw->ucode_capa,
916 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
917 len = sizeof(cmd.v5);
918 n_subbands = IWL_NUM_SUB_BANDS_V1;
919 per_chain = cmd.v5.per_chain[0][0];
920 } else if (fw_has_capa(&mvm->fw->ucode_capa,
921 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
922 len = sizeof(cmd.v4);
923 n_subbands = IWL_NUM_SUB_BANDS_V1;
924 per_chain = cmd.v4.per_chain[0][0];
925 } else {
926 len = sizeof(cmd.v3);
927 n_subbands = IWL_NUM_SUB_BANDS_V1;
928 per_chain = cmd.v3.per_chain[0][0];
929 }
930
931 /* all structs have the same common part, add it */
932 len += sizeof(cmd.common);
933
934 ret = iwl_sar_select_profile(&mvm->fwrt, per_chain,
935 IWL_NUM_CHAIN_TABLES,
936 n_subbands, prof_a, prof_b);
937
938 /* return on error or if the profile is disabled (positive number) */
939 if (ret)
940 return ret;
941
942 iwl_mei_set_power_limit(per_chain);
943
944 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
945 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
946}
947
948int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
949{
950 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
951 struct iwl_geo_tx_power_profiles_resp *resp;
952 u16 len;
953 int ret;
954 struct iwl_host_cmd cmd = {
955 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
956 .flags = CMD_WANT_SKB,
957 .data = { &geo_tx_cmd },
958 };
959 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
960 IWL_FW_CMD_VER_UNKNOWN);
961
962 /* the ops field is at the same spot for all versions, so set in v1 */
963 geo_tx_cmd.v1.ops =
964 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
965
966 if (cmd_ver == 5)
967 len = sizeof(geo_tx_cmd.v5);
968 else if (cmd_ver == 4)
969 len = sizeof(geo_tx_cmd.v4);
970 else if (cmd_ver == 3)
971 len = sizeof(geo_tx_cmd.v3);
972 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
973 IWL_UCODE_TLV_API_SAR_TABLE_VER))
974 len = sizeof(geo_tx_cmd.v2);
975 else
976 len = sizeof(geo_tx_cmd.v1);
977
978 if (!iwl_sar_geo_support(&mvm->fwrt))
979 return -EOPNOTSUPP;
980
981 cmd.len[0] = len;
982
983 ret = iwl_mvm_send_cmd(mvm, &cmd);
984 if (ret) {
985 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
986 return ret;
987 }
988
989 resp = (void *)cmd.resp_pkt->data;
990 ret = le32_to_cpu(resp->profile_idx);
991
992 if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES_REV3))
993 ret = -EIO;
994
995 iwl_free_resp(&cmd);
996 return ret;
997}
998
999static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1000{
1001 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
1002 union iwl_geo_tx_power_profiles_cmd cmd;
1003 u16 len;
1004 u32 n_bands;
1005 u32 n_profiles;
1006 u32 sk = 0;
1007 int ret;
1008 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1009 IWL_FW_CMD_VER_UNKNOWN);
1010
1011 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
1012 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
1013 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
1014 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
1015 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
1016 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
1017 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
1018 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
1019
1020 /* the ops field is at the same spot for all versions, so set in v1 */
1021 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
1022
1023 if (cmd_ver == 5) {
1024 len = sizeof(cmd.v5);
1025 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
1026 n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
1027 } else if (cmd_ver == 4) {
1028 len = sizeof(cmd.v4);
1029 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
1030 n_profiles = ACPI_NUM_GEO_PROFILES_REV3;
1031 } else if (cmd_ver == 3) {
1032 len = sizeof(cmd.v3);
1033 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
1034 n_profiles = ACPI_NUM_GEO_PROFILES;
1035 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1036 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1037 len = sizeof(cmd.v2);
1038 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1039 n_profiles = ACPI_NUM_GEO_PROFILES;
1040 } else {
1041 len = sizeof(cmd.v1);
1042 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1043 n_profiles = ACPI_NUM_GEO_PROFILES;
1044 }
1045
1046 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1047 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1048 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1049 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1050 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1051 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1052 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1053 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1054 /* the table is at the same position for all versions, so set use v1 */
1055 ret = iwl_sar_geo_init(&mvm->fwrt, &cmd.v1.table[0][0],
1056 n_bands, n_profiles);
1057
1058 /*
1059 * It is a valid scenario to not support SAR, or miss wgds table,
1060 * but in that case there is no need to send the command.
1061 */
1062 if (ret)
1063 return 0;
1064
1065 /* Only set to South Korea if the table revision is 1 */
1066 if (mvm->fwrt.geo_rev == 1)
1067 sk = 1;
1068
1069 /*
1070 * Set the table_revision to South Korea (1) or not (0). The
1071 * element name is misleading, as it doesn't contain the table
1072 * revision number, but whether the South Korea variation
1073 * should be used.
1074 * This must be done after calling iwl_sar_geo_init().
1075 */
1076 if (cmd_ver == 5)
1077 cmd.v5.table_revision = cpu_to_le32(sk);
1078 else if (cmd_ver == 4)
1079 cmd.v4.table_revision = cpu_to_le32(sk);
1080 else if (cmd_ver == 3)
1081 cmd.v3.table_revision = cpu_to_le32(sk);
1082 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1083 IWL_UCODE_TLV_API_SAR_TABLE_VER))
1084 cmd.v2.table_revision = cpu_to_le32(sk);
1085
1086 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1087}
1088
1089int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1090{
1091 union iwl_ppag_table_cmd cmd;
1092 int ret, cmd_size;
1093
1094 ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1095 /* Not supporting PPAG table is a valid scenario */
1096 if (ret < 0)
1097 return 0;
1098
1099 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1100 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1101 PER_PLATFORM_ANT_GAIN_CMD),
1102 0, cmd_size, &cmd);
1103 if (ret < 0)
1104 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1105 ret);
1106
1107 return ret;
1108}
1109
1110static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1111{
1112 /* no need to read the table, done in INIT stage */
1113 if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt)))
1114 return 0;
1115
1116 return iwl_mvm_ppag_send_cmd(mvm);
1117}
1118
1119static const struct dmi_system_id dmi_tas_approved_list[] = {
1120 { .ident = "HP",
1121 .matches = {
1122 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1123 },
1124 },
1125 { .ident = "SAMSUNG",
1126 .matches = {
1127 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"),
1128 },
1129 },
1130 { .ident = "LENOVO",
1131 .matches = {
1132 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1133 },
1134 },
1135 { .ident = "DELL",
1136 .matches = {
1137 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1138 },
1139 },
1140 { .ident = "MSFT",
1141 .matches = {
1142 DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
1143 },
1144 },
1145 { .ident = "Acer",
1146 .matches = {
1147 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1148 },
1149 },
1150 { .ident = "ASUS",
1151 .matches = {
1152 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
1153 },
1154 },
1155 { .ident = "GOOGLE-HP",
1156 .matches = {
1157 DMI_MATCH(DMI_SYS_VENDOR, "Google"),
1158 DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
1159 },
1160 },
1161 { .ident = "MSI",
1162 .matches = {
1163 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International Co., Ltd."),
1164 },
1165 },
1166 { .ident = "Honor",
1167 .matches = {
1168 DMI_MATCH(DMI_SYS_VENDOR, "HONOR"),
1169 },
1170 },
1171 /* keep last */
1172 {}
1173};
1174
1175bool iwl_mvm_is_vendor_in_approved_list(void)
1176{
1177 return dmi_check_system(dmi_tas_approved_list);
1178}
1179
1180static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigned int mcc)
1181{
1182 int i;
1183 u32 size = le32_to_cpu(*le_size);
1184
1185 /* Verify that there is room for another country */
1186 if (size >= IWL_TAS_BLOCK_LIST_MAX)
1187 return false;
1188
1189 for (i = 0; i < size; i++) {
1190 if (list[i] == cpu_to_le32(mcc))
1191 return true;
1192 }
1193
1194 list[size++] = cpu_to_le32(mcc);
1195 *le_size = cpu_to_le32(size);
1196 return true;
1197}
1198
1199static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1200{
1201 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1202 int ret;
1203 union iwl_tas_config_cmd cmd = {};
1204 int cmd_size, fw_ver;
1205
1206 BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) <
1207 APCI_WTAS_BLACK_LIST_MAX);
1208
1209 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1210 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1211 return;
1212 }
1213
1214 fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1215 IWL_FW_CMD_VER_UNKNOWN);
1216
1217 ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver);
1218 if (ret < 0) {
1219 IWL_DEBUG_RADIO(mvm,
1220 "TAS table invalid or unavailable. (%d)\n",
1221 ret);
1222 return;
1223 }
1224
1225 if (ret == 0)
1226 return;
1227
1228 if (!iwl_mvm_is_vendor_in_approved_list()) {
1229 IWL_DEBUG_RADIO(mvm,
1230 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1231 dmi_get_system_info(DMI_SYS_VENDOR));
1232 if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1233 &cmd.v4.block_list_size,
1234 IWL_MCC_US)) ||
1235 (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array,
1236 &cmd.v4.block_list_size,
1237 IWL_MCC_CANADA))) {
1238 IWL_DEBUG_RADIO(mvm,
1239 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1240 return;
1241 }
1242 } else {
1243 IWL_DEBUG_RADIO(mvm,
1244 "System vendor '%s' is in the approved list.\n",
1245 dmi_get_system_info(DMI_SYS_VENDOR));
1246 }
1247
1248 /* v4 is the same size as v3, so no need to differentiate here */
1249 cmd_size = fw_ver < 3 ?
1250 sizeof(struct iwl_tas_config_cmd_v2) :
1251 sizeof(struct iwl_tas_config_cmd_v3);
1252
1253 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd);
1254 if (ret < 0)
1255 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1256}
1257
1258static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1259{
1260 u8 value;
1261 int ret = iwl_acpi_get_dsm_u8(mvm->fwrt.dev, 0, DSM_RFI_FUNC_ENABLE,
1262 &iwl_rfi_guid, &value);
1263
1264 if (ret < 0) {
1265 IWL_DEBUG_RADIO(mvm, "Failed to get DSM RFI, ret=%d\n", ret);
1266
1267 } else if (value >= DSM_VALUE_RFI_MAX) {
1268 IWL_DEBUG_RADIO(mvm, "DSM RFI got invalid value, ret=%d\n",
1269 value);
1270
1271 } else if (value == DSM_VALUE_RFI_ENABLE) {
1272 IWL_DEBUG_RADIO(mvm, "DSM RFI is evaluated to enable\n");
1273 return DSM_VALUE_RFI_ENABLE;
1274 }
1275
1276 IWL_DEBUG_RADIO(mvm, "DSM RFI is disabled\n");
1277
1278 /* default behaviour is disabled */
1279 return DSM_VALUE_RFI_DISABLE;
1280}
1281
1282static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1283{
1284 int ret;
1285 u32 value;
1286 struct iwl_lari_config_change_cmd_v7 cmd = {};
1287 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw,
1288 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1289 LARI_CONFIG_CHANGE), 1);
1290
1291 cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt);
1292
1293 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, DSM_FUNC_11AX_ENABLEMENT,
1294 &iwl_guid, &value);
1295 if (!ret)
1296 cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
1297
1298 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1299 DSM_FUNC_ENABLE_UNII4_CHAN,
1300 &iwl_guid, &value);
1301 if (!ret)
1302 cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
1303
1304 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1305 DSM_FUNC_ACTIVATE_CHANNEL,
1306 &iwl_guid, &value);
1307 if (!ret) {
1308 if (cmd_ver < 8)
1309 value &= ~ACTIVATE_5G2_IN_WW_MASK;
1310 cmd.chan_state_active_bitmap = cpu_to_le32(value);
1311 }
1312
1313 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1314 DSM_FUNC_ENABLE_6E,
1315 &iwl_guid, &value);
1316 if (!ret)
1317 cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
1318
1319 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1320 DSM_FUNC_FORCE_DISABLE_CHANNELS,
1321 &iwl_guid, &value);
1322 if (!ret)
1323 cmd.force_disable_channels_bitmap = cpu_to_le32(value);
1324
1325 ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0,
1326 DSM_FUNC_ENERGY_DETECTION_THRESHOLD,
1327 &iwl_guid, &value);
1328 if (!ret)
1329 cmd.edt_bitmap = cpu_to_le32(value);
1330
1331 if (cmd.config_bitmap ||
1332 cmd.oem_uhb_allow_bitmap ||
1333 cmd.oem_11ax_allow_bitmap ||
1334 cmd.oem_unii4_allow_bitmap ||
1335 cmd.chan_state_active_bitmap ||
1336 cmd.force_disable_channels_bitmap ||
1337 cmd.edt_bitmap) {
1338 size_t cmd_size;
1339
1340 switch (cmd_ver) {
1341 case 8:
1342 case 7:
1343 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v7);
1344 break;
1345 case 6:
1346 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1347 break;
1348 case 5:
1349 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5);
1350 break;
1351 case 4:
1352 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4);
1353 break;
1354 case 3:
1355 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3);
1356 break;
1357 case 2:
1358 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2);
1359 break;
1360 default:
1361 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1362 break;
1363 }
1364
1365 IWL_DEBUG_RADIO(mvm,
1366 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1367 le32_to_cpu(cmd.config_bitmap),
1368 le32_to_cpu(cmd.oem_11ax_allow_bitmap));
1369 IWL_DEBUG_RADIO(mvm,
1370 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1371 le32_to_cpu(cmd.oem_unii4_allow_bitmap),
1372 le32_to_cpu(cmd.chan_state_active_bitmap),
1373 cmd_ver);
1374 IWL_DEBUG_RADIO(mvm,
1375 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1376 le32_to_cpu(cmd.oem_uhb_allow_bitmap),
1377 le32_to_cpu(cmd.force_disable_channels_bitmap));
1378 IWL_DEBUG_RADIO(mvm,
1379 "sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x\n",
1380 le32_to_cpu(cmd.edt_bitmap));
1381 ret = iwl_mvm_send_cmd_pdu(mvm,
1382 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1383 LARI_CONFIG_CHANGE),
1384 0, cmd_size, &cmd);
1385 if (ret < 0)
1386 IWL_DEBUG_RADIO(mvm,
1387 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1388 ret);
1389 }
1390
1391 if (le32_to_cpu(cmd.oem_uhb_allow_bitmap) & IWL_UATS_VLP_AP_SUPPORTED ||
1392 le32_to_cpu(cmd.oem_uhb_allow_bitmap) & IWL_UATS_AFC_AP_SUPPORTED)
1393 mvm->fwrt.uats_enabled = TRUE;
1394}
1395
1396void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1397{
1398 int ret;
1399
1400 /* read PPAG table */
1401 ret = iwl_acpi_get_ppag_table(&mvm->fwrt);
1402 if (ret < 0) {
1403 IWL_DEBUG_RADIO(mvm,
1404 "PPAG BIOS table invalid or unavailable. (%d)\n",
1405 ret);
1406 }
1407
1408 /* read SAR tables */
1409 ret = iwl_sar_get_wrds_table(&mvm->fwrt);
1410 if (ret < 0) {
1411 IWL_DEBUG_RADIO(mvm,
1412 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1413 ret);
1414 /*
1415 * If not available, don't fail and don't bother with EWRD and
1416 * WGDS */
1417
1418 if (!iwl_sar_get_wgds_table(&mvm->fwrt)) {
1419 /*
1420 * If basic SAR is not available, we check for WGDS,
1421 * which should *not* be available either. If it is
1422 * available, issue an error, because we can't use SAR
1423 * Geo without basic SAR.
1424 */
1425 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1426 }
1427
1428 } else {
1429 ret = iwl_sar_get_ewrd_table(&mvm->fwrt);
1430 /* if EWRD is not available, we can still use
1431 * WRDS, so don't fail */
1432 if (ret < 0)
1433 IWL_DEBUG_RADIO(mvm,
1434 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1435 ret);
1436
1437 /* read geo SAR table */
1438 if (iwl_sar_geo_support(&mvm->fwrt)) {
1439 ret = iwl_sar_get_wgds_table(&mvm->fwrt);
1440 if (ret < 0)
1441 IWL_DEBUG_RADIO(mvm,
1442 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1443 ret);
1444 /* we don't fail if the table is not available */
1445 }
1446 }
1447
1448 iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters);
1449}
1450#else /* CONFIG_ACPI */
1451
1452inline int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm,
1453 int prof_a, int prof_b)
1454{
1455 return 1;
1456}
1457
1458inline int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
1459{
1460 return -ENOENT;
1461}
1462
1463static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
1464{
1465 return 0;
1466}
1467
1468int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1469{
1470 return -ENOENT;
1471}
1472
1473static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1474{
1475 return 0;
1476}
1477
1478static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1479{
1480}
1481
1482static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1483{
1484}
1485
1486bool iwl_mvm_is_vendor_in_approved_list(void)
1487{
1488 return false;
1489}
1490
1491static u8 iwl_mvm_eval_dsm_rfi(struct iwl_mvm *mvm)
1492{
1493 return DSM_VALUE_RFI_DISABLE;
1494}
1495
1496void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm)
1497{
1498}
1499
1500#endif /* CONFIG_ACPI */
1501
1502void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1503{
1504 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1505 int ret;
1506 u32 resp;
1507
1508 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1509 .flags = cpu_to_le32(flags),
1510 .buf_size = 0,
1511 };
1512 struct iwl_host_cmd host_cmd = {
1513 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1514 .flags = CMD_WANT_SKB,
1515 .data = {&recovery_cmd, },
1516 .len = {sizeof(recovery_cmd), },
1517 };
1518
1519 /* no error log was defined in TLV */
1520 if (!error_log_size)
1521 return;
1522
1523 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1524 /* no buf was allocated while HW reset */
1525 if (!mvm->error_recovery_buf)
1526 return;
1527
1528 host_cmd.data[1] = mvm->error_recovery_buf;
1529 host_cmd.len[1] = error_log_size;
1530 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1531 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1532 }
1533
1534 ret = iwl_mvm_send_cmd(mvm, &host_cmd);
1535 kfree(mvm->error_recovery_buf);
1536 mvm->error_recovery_buf = NULL;
1537
1538 if (ret) {
1539 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1540 return;
1541 }
1542
1543 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1544 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1545 resp = le32_to_cpu(*(__le32 *)host_cmd.resp_pkt->data);
1546 if (resp)
1547 IWL_ERR(mvm,
1548 "Failed to send recovery cmd blob was invalid %d\n",
1549 resp);
1550 }
1551}
1552
1553static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1554{
1555 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1556}
1557
1558static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1559{
1560 int ret;
1561
1562 if (iwl_mvm_has_unified_ucode(mvm))
1563 return iwl_run_unified_mvm_ucode(mvm);
1564
1565 ret = iwl_run_init_mvm_ucode(mvm);
1566
1567 if (ret) {
1568 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1569
1570 if (iwlmvm_mod_params.init_dbg)
1571 return 0;
1572 return ret;
1573 }
1574
1575 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1576 iwl_trans_stop_device(mvm->trans);
1577 ret = iwl_trans_start_hw(mvm->trans);
1578 if (ret)
1579 return ret;
1580
1581 mvm->rfkill_safe_init_done = false;
1582 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1583 if (ret)
1584 return ret;
1585
1586 mvm->rfkill_safe_init_done = true;
1587
1588 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1589 NULL);
1590
1591 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1592}
1593
1594int iwl_mvm_up(struct iwl_mvm *mvm)
1595{
1596 int ret, i;
1597 struct ieee80211_supported_band *sband = NULL;
1598
1599 lockdep_assert_held(&mvm->mutex);
1600
1601 ret = iwl_trans_start_hw(mvm->trans);
1602 if (ret)
1603 return ret;
1604
1605 ret = iwl_mvm_load_rt_fw(mvm);
1606 if (ret) {
1607 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1608 if (ret != -ERFKILL && !mvm->pldr_sync)
1609 iwl_fw_dbg_error_collect(&mvm->fwrt,
1610 FW_DBG_TRIGGER_DRIVER);
1611 goto error;
1612 }
1613
1614 /* FW loaded successfully */
1615 mvm->pldr_sync = false;
1616
1617 iwl_fw_disable_dbg_asserts(&mvm->fwrt);
1618 iwl_get_shared_mem_conf(&mvm->fwrt);
1619
1620 ret = iwl_mvm_sf_update(mvm, NULL, false);
1621 if (ret)
1622 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1623
1624 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1625 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1626 /* if we have a destination, assume EARLY START */
1627 if (mvm->fw->dbg.dest_tlv)
1628 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1629 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1630 }
1631
1632 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1633 if (ret)
1634 goto error;
1635
1636 if (!iwl_mvm_has_unified_ucode(mvm)) {
1637 /* Send phy db control command and then phy db calibration */
1638 ret = iwl_send_phy_db_data(mvm->phy_db);
1639 if (ret)
1640 goto error;
1641 ret = iwl_send_phy_cfg_cmd(mvm);
1642 if (ret)
1643 goto error;
1644 }
1645
1646 ret = iwl_mvm_send_bt_init_conf(mvm);
1647 if (ret)
1648 goto error;
1649
1650 if (fw_has_capa(&mvm->fw->ucode_capa,
1651 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1652 ret = iwl_set_soc_latency(&mvm->fwrt);
1653 if (ret)
1654 goto error;
1655 }
1656
1657 iwl_mvm_lari_cfg(mvm);
1658
1659 /* Init RSS configuration */
1660 ret = iwl_configure_rxq(&mvm->fwrt);
1661 if (ret)
1662 goto error;
1663
1664 if (iwl_mvm_has_new_rx_api(mvm)) {
1665 ret = iwl_send_rss_cfg_cmd(mvm);
1666 if (ret) {
1667 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1668 ret);
1669 goto error;
1670 }
1671 }
1672
1673 /* init the fw <-> mac80211 STA mapping */
1674 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1675 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1676 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1677 }
1678
1679 for (i = 0; i < IWL_MVM_FW_MAX_LINK_ID + 1; i++)
1680 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL);
1681
1682 memset(&mvm->fw_link_ids_map, 0, sizeof(mvm->fw_link_ids_map));
1683
1684 mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
1685
1686 /* reset quota debouncing buffer - 0xff will yield invalid data */
1687 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1688
1689 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1690 ret = iwl_mvm_send_dqa_cmd(mvm);
1691 if (ret)
1692 goto error;
1693 }
1694
1695 /*
1696 * Add auxiliary station for scanning.
1697 * Newer versions of this command implies that the fw uses
1698 * internal aux station for all aux activities that don't
1699 * requires a dedicated data queue.
1700 */
1701 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1702 /*
1703 * In old version the aux station uses mac id like other
1704 * station and not lmac id
1705 */
1706 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1707 if (ret)
1708 goto error;
1709 }
1710
1711 /* Add all the PHY contexts */
1712 i = 0;
1713 while (!sband && i < NUM_NL80211_BANDS)
1714 sband = mvm->hw->wiphy->bands[i++];
1715
1716 if (WARN_ON_ONCE(!sband)) {
1717 ret = -ENODEV;
1718 goto error;
1719 }
1720
1721 if (iwl_mvm_is_tt_in_fw(mvm)) {
1722 /* in order to give the responsibility of ct-kill and
1723 * TX backoff to FW we need to send empty temperature reporting
1724 * cmd during init time
1725 */
1726 iwl_mvm_send_temp_report_ths_cmd(mvm);
1727 } else {
1728 /* Initialize tx backoffs to the minimal possible */
1729 iwl_mvm_tt_tx_backoff(mvm, 0);
1730 }
1731
1732#ifdef CONFIG_THERMAL
1733 /* TODO: read the budget from BIOS / Platform NVM */
1734
1735 /*
1736 * In case there is no budget from BIOS / Platform NVM the default
1737 * budget should be 2000mW (cooling state 0).
1738 */
1739 if (iwl_mvm_is_ctdp_supported(mvm)) {
1740 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1741 mvm->cooling_dev.cur_state);
1742 if (ret)
1743 goto error;
1744 }
1745#endif
1746
1747 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1748 WARN_ON(iwl_mvm_config_ltr(mvm));
1749
1750 ret = iwl_mvm_power_update_device(mvm);
1751 if (ret)
1752 goto error;
1753
1754 /*
1755 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1756 * anyway, so don't init MCC.
1757 */
1758 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1759 ret = iwl_mvm_init_mcc(mvm);
1760 if (ret)
1761 goto error;
1762 }
1763
1764 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1765 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1766 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1767 ret = iwl_mvm_config_scan(mvm);
1768 if (ret)
1769 goto error;
1770 }
1771
1772 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1773 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1774
1775 if (mvm->time_sync.active)
1776 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1777 IWL_TIME_SYNC_PROTOCOL_TM |
1778 IWL_TIME_SYNC_PROTOCOL_FTM);
1779 }
1780
1781 if (!mvm->ptp_data.ptp_clock)
1782 iwl_mvm_ptp_init(mvm);
1783
1784 if (iwl_acpi_get_eckv(mvm->dev, &mvm->ext_clock_valid))
1785 IWL_DEBUG_INFO(mvm, "ECKV table doesn't exist in BIOS\n");
1786
1787 ret = iwl_mvm_ppag_init(mvm);
1788 if (ret)
1789 goto error;
1790
1791 ret = iwl_mvm_sar_init(mvm);
1792 if (ret == 0)
1793 ret = iwl_mvm_sar_geo_init(mvm);
1794 if (ret < 0)
1795 goto error;
1796
1797 ret = iwl_mvm_sgom_init(mvm);
1798 if (ret)
1799 goto error;
1800
1801 iwl_mvm_tas_init(mvm);
1802 iwl_mvm_leds_sync(mvm);
1803 iwl_mvm_uats_init(mvm);
1804
1805 if (iwl_rfi_supported(mvm)) {
1806 if (iwl_mvm_eval_dsm_rfi(mvm) == DSM_VALUE_RFI_ENABLE)
1807 iwl_rfi_send_config_cmd(mvm, NULL);
1808 }
1809
1810 iwl_mvm_mei_device_state(mvm, true);
1811
1812 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1813 return 0;
1814 error:
1815 if (!iwlmvm_mod_params.init_dbg || !ret)
1816 iwl_mvm_stop_device(mvm);
1817 return ret;
1818}
1819
1820int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1821{
1822 int ret, i;
1823
1824 lockdep_assert_held(&mvm->mutex);
1825
1826 ret = iwl_trans_start_hw(mvm->trans);
1827 if (ret)
1828 return ret;
1829
1830 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1831 if (ret) {
1832 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1833 goto error;
1834 }
1835
1836 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1837 if (ret)
1838 goto error;
1839
1840 /* Send phy db control command and then phy db calibration*/
1841 ret = iwl_send_phy_db_data(mvm->phy_db);
1842 if (ret)
1843 goto error;
1844
1845 ret = iwl_send_phy_cfg_cmd(mvm);
1846 if (ret)
1847 goto error;
1848
1849 /* init the fw <-> mac80211 STA mapping */
1850 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1851 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1852 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1853 }
1854
1855 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1856 /*
1857 * Add auxiliary station for scanning.
1858 * Newer versions of this command implies that the fw uses
1859 * internal aux station for all aux activities that don't
1860 * requires a dedicated data queue.
1861 * In old version the aux station uses mac id like other
1862 * station and not lmac id
1863 */
1864 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1865 if (ret)
1866 goto error;
1867 }
1868
1869 return 0;
1870 error:
1871 iwl_mvm_stop_device(mvm);
1872 return ret;
1873}
1874
1875void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1876 struct iwl_rx_cmd_buffer *rxb)
1877{
1878 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1879 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1880
1881 IWL_DEBUG_INFO(mvm,
1882 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1883 le32_to_cpu(mfuart_notif->installed_ver),
1884 le32_to_cpu(mfuart_notif->external_ver),
1885 le32_to_cpu(mfuart_notif->status),
1886 le32_to_cpu(mfuart_notif->duration));
1887
1888 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1889 IWL_DEBUG_INFO(mvm,
1890 "MFUART: image size: 0x%08x\n",
1891 le32_to_cpu(mfuart_notif->image_size));
1892}
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *
65 *****************************************************************************/
66#include <net/mac80211.h>
67#include <linux/netdevice.h>
68#include <linux/acpi.h>
69
70#include "iwl-trans.h"
71#include "iwl-op-mode.h"
72#include "iwl-fw.h"
73#include "iwl-debug.h"
74#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
75#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
76#include "iwl-prph.h"
77#include "iwl-eeprom-parse.h"
78
79#include "mvm.h"
80#include "fw-dbg.h"
81#include "iwl-phy-db.h"
82
83#define MVM_UCODE_ALIVE_TIMEOUT HZ
84#define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
85
86#define UCODE_VALID_OK cpu_to_le32(0x1)
87
88struct iwl_mvm_alive_data {
89 bool valid;
90 u32 scd_base_addr;
91};
92
93static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
94{
95 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
96 .valid = cpu_to_le32(valid_tx_ant),
97 };
98
99 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
100 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
101 sizeof(tx_ant_cmd), &tx_ant_cmd);
102}
103
104static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
105{
106 int i;
107 struct iwl_rss_config_cmd cmd = {
108 .flags = cpu_to_le32(IWL_RSS_ENABLE),
109 .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
110 IWL_RSS_HASH_TYPE_IPV4_UDP |
111 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
112 IWL_RSS_HASH_TYPE_IPV6_TCP |
113 IWL_RSS_HASH_TYPE_IPV6_UDP |
114 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
115 };
116
117 if (mvm->trans->num_rx_queues == 1)
118 return 0;
119
120 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
121 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
122 cmd.indirection_table[i] =
123 1 + (i % (mvm->trans->num_rx_queues - 1));
124 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
125
126 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
127}
128
129static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
130{
131 struct iwl_dqa_enable_cmd dqa_cmd = {
132 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
133 };
134 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
135 int ret;
136
137 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
138 if (ret)
139 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
140 else
141 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
142
143 return ret;
144}
145
146void iwl_free_fw_paging(struct iwl_mvm *mvm)
147{
148 int i;
149
150 if (!mvm->fw_paging_db[0].fw_paging_block)
151 return;
152
153 for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
154 struct iwl_fw_paging *paging = &mvm->fw_paging_db[i];
155
156 if (!paging->fw_paging_block) {
157 IWL_DEBUG_FW(mvm,
158 "Paging: block %d already freed, continue to next page\n",
159 i);
160
161 continue;
162 }
163 dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys,
164 paging->fw_paging_size, DMA_BIDIRECTIONAL);
165
166 __free_pages(paging->fw_paging_block,
167 get_order(paging->fw_paging_size));
168 paging->fw_paging_block = NULL;
169 }
170 kfree(mvm->trans->paging_download_buf);
171 mvm->trans->paging_download_buf = NULL;
172 mvm->trans->paging_db = NULL;
173
174 memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
175}
176
177static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image)
178{
179 int sec_idx, idx;
180 u32 offset = 0;
181
182 /*
183 * find where is the paging image start point:
184 * if CPU2 exist and it's in paging format, then the image looks like:
185 * CPU1 sections (2 or more)
186 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
187 * CPU2 sections (not paged)
188 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
189 * non paged to CPU2 paging sec
190 * CPU2 paging CSS
191 * CPU2 paging image (including instruction and data)
192 */
193 for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) {
194 if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
195 sec_idx++;
196 break;
197 }
198 }
199
200 /*
201 * If paging is enabled there should be at least 2 more sections left
202 * (one for CSS and one for Paging data)
203 */
204 if (sec_idx >= ARRAY_SIZE(image->sec) - 1) {
205 IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n");
206 iwl_free_fw_paging(mvm);
207 return -EINVAL;
208 }
209
210 /* copy the CSS block to the dram */
211 IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n",
212 sec_idx);
213
214 memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block),
215 image->sec[sec_idx].data,
216 mvm->fw_paging_db[0].fw_paging_size);
217
218 IWL_DEBUG_FW(mvm,
219 "Paging: copied %d CSS bytes to first block\n",
220 mvm->fw_paging_db[0].fw_paging_size);
221
222 sec_idx++;
223
224 /*
225 * copy the paging blocks to the dram
226 * loop index start from 1 since that CSS block already copied to dram
227 * and CSS index is 0.
228 * loop stop at num_of_paging_blk since that last block is not full.
229 */
230 for (idx = 1; idx < mvm->num_of_paging_blk; idx++) {
231 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
232 image->sec[sec_idx].data + offset,
233 mvm->fw_paging_db[idx].fw_paging_size);
234
235 IWL_DEBUG_FW(mvm,
236 "Paging: copied %d paging bytes to block %d\n",
237 mvm->fw_paging_db[idx].fw_paging_size,
238 idx);
239
240 offset += mvm->fw_paging_db[idx].fw_paging_size;
241 }
242
243 /* copy the last paging block */
244 if (mvm->num_of_pages_in_last_blk > 0) {
245 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
246 image->sec[sec_idx].data + offset,
247 FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk);
248
249 IWL_DEBUG_FW(mvm,
250 "Paging: copied %d pages in the last block %d\n",
251 mvm->num_of_pages_in_last_blk, idx);
252 }
253
254 return 0;
255}
256
257static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm,
258 const struct fw_img *image)
259{
260 struct page *block;
261 dma_addr_t phys = 0;
262 int blk_idx = 0;
263 int order, num_of_pages;
264 int dma_enabled;
265
266 if (mvm->fw_paging_db[0].fw_paging_block)
267 return 0;
268
269 dma_enabled = is_device_dma_capable(mvm->trans->dev);
270
271 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
272 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
273
274 num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
275 mvm->num_of_paging_blk = ((num_of_pages - 1) /
276 NUM_OF_PAGE_PER_GROUP) + 1;
277
278 mvm->num_of_pages_in_last_blk =
279 num_of_pages -
280 NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1);
281
282 IWL_DEBUG_FW(mvm,
283 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
284 mvm->num_of_paging_blk,
285 mvm->num_of_pages_in_last_blk);
286
287 /* allocate block of 4Kbytes for paging CSS */
288 order = get_order(FW_PAGING_SIZE);
289 block = alloc_pages(GFP_KERNEL, order);
290 if (!block) {
291 /* free all the previous pages since we failed */
292 iwl_free_fw_paging(mvm);
293 return -ENOMEM;
294 }
295
296 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
297 mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE;
298
299 if (dma_enabled) {
300 phys = dma_map_page(mvm->trans->dev, block, 0,
301 PAGE_SIZE << order, DMA_BIDIRECTIONAL);
302 if (dma_mapping_error(mvm->trans->dev, phys)) {
303 /*
304 * free the previous pages and the current one since
305 * we failed to map_page.
306 */
307 iwl_free_fw_paging(mvm);
308 return -ENOMEM;
309 }
310 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
311 } else {
312 mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG |
313 blk_idx << BLOCK_2_EXP_SIZE;
314 }
315
316 IWL_DEBUG_FW(mvm,
317 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
318 order);
319
320 /*
321 * allocate blocks in dram.
322 * since that CSS allocated in fw_paging_db[0] loop start from index 1
323 */
324 for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
325 /* allocate block of PAGING_BLOCK_SIZE (32K) */
326 order = get_order(PAGING_BLOCK_SIZE);
327 block = alloc_pages(GFP_KERNEL, order);
328 if (!block) {
329 /* free all the previous pages since we failed */
330 iwl_free_fw_paging(mvm);
331 return -ENOMEM;
332 }
333
334 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
335 mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE;
336
337 if (dma_enabled) {
338 phys = dma_map_page(mvm->trans->dev, block, 0,
339 PAGE_SIZE << order,
340 DMA_BIDIRECTIONAL);
341 if (dma_mapping_error(mvm->trans->dev, phys)) {
342 /*
343 * free the previous pages and the current one
344 * since we failed to map_page.
345 */
346 iwl_free_fw_paging(mvm);
347 return -ENOMEM;
348 }
349 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
350 } else {
351 mvm->fw_paging_db[blk_idx].fw_paging_phys =
352 PAGING_ADDR_SIG |
353 blk_idx << BLOCK_2_EXP_SIZE;
354 }
355
356 IWL_DEBUG_FW(mvm,
357 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
358 order);
359 }
360
361 return 0;
362}
363
364static int iwl_save_fw_paging(struct iwl_mvm *mvm,
365 const struct fw_img *fw)
366{
367 int ret;
368
369 ret = iwl_alloc_fw_paging_mem(mvm, fw);
370 if (ret)
371 return ret;
372
373 return iwl_fill_paging_mem(mvm, fw);
374}
375
376/* send paging cmd to FW in case CPU2 has paging image */
377static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw)
378{
379 struct iwl_fw_paging_cmd paging_cmd = {
380 .flags =
381 cpu_to_le32(PAGING_CMD_IS_SECURED |
382 PAGING_CMD_IS_ENABLED |
383 (mvm->num_of_pages_in_last_blk <<
384 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
385 .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
386 .block_num = cpu_to_le32(mvm->num_of_paging_blk),
387 };
388 int blk_idx, size = sizeof(paging_cmd);
389
390 /* A bit hard coded - but this is the old API and will be deprecated */
391 if (!iwl_mvm_has_new_tx_api(mvm))
392 size -= NUM_OF_FW_PAGING_BLOCKS * 4;
393
394 /* loop for for all paging blocks + CSS block */
395 for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
396 dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys;
397
398 addr = addr >> PAGE_2_EXP_SIZE;
399
400 if (iwl_mvm_has_new_tx_api(mvm)) {
401 __le64 phy_addr = cpu_to_le64(addr);
402
403 paging_cmd.device_phy_addr.addr64[blk_idx] = phy_addr;
404 } else {
405 __le32 phy_addr = cpu_to_le32(addr);
406
407 paging_cmd.device_phy_addr.addr32[blk_idx] = phy_addr;
408 }
409 }
410
411 return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD,
412 IWL_ALWAYS_LONG_GROUP, 0),
413 0, size, &paging_cmd);
414}
415
416/*
417 * Send paging item cmd to FW in case CPU2 has paging image
418 */
419static int iwl_trans_get_paging_item(struct iwl_mvm *mvm)
420{
421 int ret;
422 struct iwl_fw_get_item_cmd fw_get_item_cmd = {
423 .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING),
424 };
425
426 struct iwl_fw_get_item_resp *item_resp;
427 struct iwl_host_cmd cmd = {
428 .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0),
429 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
430 .data = { &fw_get_item_cmd, },
431 };
432
433 cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd);
434
435 ret = iwl_mvm_send_cmd(mvm, &cmd);
436 if (ret) {
437 IWL_ERR(mvm,
438 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
439 ret);
440 return ret;
441 }
442
443 item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data;
444 if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) {
445 IWL_ERR(mvm,
446 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
447 le32_to_cpu(item_resp->item_id));
448 ret = -EIO;
449 goto exit;
450 }
451
452 /* Add an extra page for headers */
453 mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE +
454 FW_PAGING_SIZE,
455 GFP_KERNEL);
456 if (!mvm->trans->paging_download_buf) {
457 ret = -ENOMEM;
458 goto exit;
459 }
460 mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val);
461 mvm->trans->paging_db = mvm->fw_paging_db;
462 IWL_DEBUG_FW(mvm,
463 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
464 mvm->trans->paging_req_addr);
465
466exit:
467 iwl_free_resp(&cmd);
468
469 return ret;
470}
471
472static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
473 struct iwl_rx_packet *pkt, void *data)
474{
475 struct iwl_mvm *mvm =
476 container_of(notif_wait, struct iwl_mvm, notif_wait);
477 struct iwl_mvm_alive_data *alive_data = data;
478 struct mvm_alive_resp_ver1 *palive1;
479 struct mvm_alive_resp_ver2 *palive2;
480 struct mvm_alive_resp *palive;
481
482 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
483 palive1 = (void *)pkt->data;
484
485 mvm->support_umac_log = false;
486 mvm->error_event_table =
487 le32_to_cpu(palive1->error_event_table_ptr);
488 mvm->log_event_table =
489 le32_to_cpu(palive1->log_event_table_ptr);
490 alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
491
492 alive_data->valid = le16_to_cpu(palive1->status) ==
493 IWL_ALIVE_STATUS_OK;
494 IWL_DEBUG_FW(mvm,
495 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
496 le16_to_cpu(palive1->status), palive1->ver_type,
497 palive1->ver_subtype, palive1->flags);
498 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
499 palive2 = (void *)pkt->data;
500
501 mvm->error_event_table =
502 le32_to_cpu(palive2->error_event_table_ptr);
503 mvm->log_event_table =
504 le32_to_cpu(palive2->log_event_table_ptr);
505 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
506 mvm->umac_error_event_table =
507 le32_to_cpu(palive2->error_info_addr);
508 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
509 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
510
511 alive_data->valid = le16_to_cpu(palive2->status) ==
512 IWL_ALIVE_STATUS_OK;
513 if (mvm->umac_error_event_table)
514 mvm->support_umac_log = true;
515
516 IWL_DEBUG_FW(mvm,
517 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
518 le16_to_cpu(palive2->status), palive2->ver_type,
519 palive2->ver_subtype, palive2->flags);
520
521 IWL_DEBUG_FW(mvm,
522 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
523 palive2->umac_major, palive2->umac_minor);
524 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
525 palive = (void *)pkt->data;
526
527 mvm->error_event_table =
528 le32_to_cpu(palive->error_event_table_ptr);
529 mvm->log_event_table =
530 le32_to_cpu(palive->log_event_table_ptr);
531 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
532 mvm->umac_error_event_table =
533 le32_to_cpu(palive->error_info_addr);
534 mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
535 mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
536
537 alive_data->valid = le16_to_cpu(palive->status) ==
538 IWL_ALIVE_STATUS_OK;
539 if (mvm->umac_error_event_table)
540 mvm->support_umac_log = true;
541
542 IWL_DEBUG_FW(mvm,
543 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
544 le16_to_cpu(palive->status), palive->ver_type,
545 palive->ver_subtype, palive->flags);
546
547 IWL_DEBUG_FW(mvm,
548 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
549 le32_to_cpu(palive->umac_major),
550 le32_to_cpu(palive->umac_minor));
551 }
552
553 return true;
554}
555
556static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
557 struct iwl_rx_packet *pkt, void *data)
558{
559 struct iwl_phy_db *phy_db = data;
560
561 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
562 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
563 return true;
564 }
565
566 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
567
568 return false;
569}
570
571static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
572 enum iwl_ucode_type ucode_type)
573{
574 struct iwl_notification_wait alive_wait;
575 struct iwl_mvm_alive_data alive_data;
576 const struct fw_img *fw;
577 int ret, i;
578 enum iwl_ucode_type old_type = mvm->cur_ucode;
579 static const u16 alive_cmd[] = { MVM_ALIVE };
580 struct iwl_sf_region st_fwrd_space;
581
582 if (ucode_type == IWL_UCODE_REGULAR &&
583 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
584 !(fw_has_capa(&mvm->fw->ucode_capa,
585 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
586 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
587 else
588 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
589 if (WARN_ON(!fw))
590 return -EINVAL;
591 mvm->cur_ucode = ucode_type;
592 mvm->ucode_loaded = false;
593
594 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
595 alive_cmd, ARRAY_SIZE(alive_cmd),
596 iwl_alive_fn, &alive_data);
597
598 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
599 if (ret) {
600 mvm->cur_ucode = old_type;
601 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
602 return ret;
603 }
604
605 /*
606 * Some things may run in the background now, but we
607 * just wait for the ALIVE notification here.
608 */
609 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
610 MVM_UCODE_ALIVE_TIMEOUT);
611 if (ret) {
612 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
613 IWL_ERR(mvm,
614 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
615 iwl_read_prph(mvm->trans, SB_CPU_1_STATUS),
616 iwl_read_prph(mvm->trans, SB_CPU_2_STATUS));
617 mvm->cur_ucode = old_type;
618 return ret;
619 }
620
621 if (!alive_data.valid) {
622 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
623 mvm->cur_ucode = old_type;
624 return -EIO;
625 }
626
627 /*
628 * update the sdio allocation according to the pointer we get in the
629 * alive notification.
630 */
631 st_fwrd_space.addr = mvm->sf_space.addr;
632 st_fwrd_space.size = mvm->sf_space.size;
633 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
634 if (ret) {
635 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
636 return ret;
637 }
638
639 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
640
641 /*
642 * configure and operate fw paging mechanism.
643 * driver configures the paging flow only once, CPU2 paging image
644 * included in the IWL_UCODE_INIT image.
645 */
646 if (fw->paging_mem_size) {
647 /*
648 * When dma is not enabled, the driver needs to copy / write
649 * the downloaded / uploaded page to / from the smem.
650 * This gets the location of the place were the pages are
651 * stored.
652 */
653 if (!is_device_dma_capable(mvm->trans->dev)) {
654 ret = iwl_trans_get_paging_item(mvm);
655 if (ret) {
656 IWL_ERR(mvm, "failed to get FW paging item\n");
657 return ret;
658 }
659 }
660
661 ret = iwl_save_fw_paging(mvm, fw);
662 if (ret) {
663 IWL_ERR(mvm, "failed to save the FW paging image\n");
664 return ret;
665 }
666
667 ret = iwl_send_paging_cmd(mvm, fw);
668 if (ret) {
669 IWL_ERR(mvm, "failed to send the paging cmd\n");
670 iwl_free_fw_paging(mvm);
671 return ret;
672 }
673 }
674
675 /*
676 * Note: all the queues are enabled as part of the interface
677 * initialization, but in firmware restart scenarios they
678 * could be stopped, so wake them up. In firmware restart,
679 * mac80211 will have the queues stopped as well until the
680 * reconfiguration completes. During normal startup, they
681 * will be empty.
682 */
683
684 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
685 if (iwl_mvm_is_dqa_supported(mvm))
686 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
687 else
688 mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
689
690 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
691 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
692
693 mvm->ucode_loaded = true;
694
695 return 0;
696}
697
698static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
699{
700 struct iwl_phy_cfg_cmd phy_cfg_cmd;
701 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
702
703 /* Set parameters */
704 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
705 phy_cfg_cmd.calib_control.event_trigger =
706 mvm->fw->default_calib[ucode_type].event_trigger;
707 phy_cfg_cmd.calib_control.flow_trigger =
708 mvm->fw->default_calib[ucode_type].flow_trigger;
709
710 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
711 phy_cfg_cmd.phy_cfg);
712
713 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
714 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
715}
716
717int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
718{
719 struct iwl_notification_wait calib_wait;
720 static const u16 init_complete[] = {
721 INIT_COMPLETE_NOTIF,
722 CALIB_RES_NOTIF_PHY_DB
723 };
724 int ret;
725
726 lockdep_assert_held(&mvm->mutex);
727
728 if (WARN_ON_ONCE(mvm->calibrating))
729 return 0;
730
731 iwl_init_notification_wait(&mvm->notif_wait,
732 &calib_wait,
733 init_complete,
734 ARRAY_SIZE(init_complete),
735 iwl_wait_phy_db_entry,
736 mvm->phy_db);
737
738 /* Will also start the device */
739 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
740 if (ret) {
741 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
742 goto error;
743 }
744
745 ret = iwl_send_bt_init_conf(mvm);
746 if (ret)
747 goto error;
748
749 /* Read the NVM only at driver load time, no need to do this twice */
750 if (read_nvm) {
751 /* Read nvm */
752 ret = iwl_nvm_init(mvm, true);
753 if (ret) {
754 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
755 goto error;
756 }
757 }
758
759 /* In case we read the NVM from external file, load it to the NIC */
760 if (mvm->nvm_file_name)
761 iwl_mvm_load_nvm_to_nic(mvm);
762
763 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
764 WARN_ON(ret);
765
766 /*
767 * abort after reading the nvm in case RF Kill is on, we will complete
768 * the init seq later when RF kill will switch to off
769 */
770 if (iwl_mvm_is_radio_hw_killed(mvm)) {
771 IWL_DEBUG_RF_KILL(mvm,
772 "jump over all phy activities due to RF kill\n");
773 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
774 ret = 1;
775 goto out;
776 }
777
778 mvm->calibrating = true;
779
780 /* Send TX valid antennas before triggering calibrations */
781 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
782 if (ret)
783 goto error;
784
785 /*
786 * Send phy configurations command to init uCode
787 * to start the 16.0 uCode init image internal calibrations.
788 */
789 ret = iwl_send_phy_cfg_cmd(mvm);
790 if (ret) {
791 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
792 ret);
793 goto error;
794 }
795
796 /*
797 * Some things may run in the background now, but we
798 * just wait for the calibration complete notification.
799 */
800 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
801 MVM_UCODE_CALIB_TIMEOUT);
802
803 if (ret && iwl_mvm_is_radio_hw_killed(mvm)) {
804 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
805 ret = 1;
806 }
807 goto out;
808
809error:
810 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
811out:
812 mvm->calibrating = false;
813 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
814 /* we want to debug INIT and we have no NVM - fake */
815 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
816 sizeof(struct ieee80211_channel) +
817 sizeof(struct ieee80211_rate),
818 GFP_KERNEL);
819 if (!mvm->nvm_data)
820 return -ENOMEM;
821 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
822 mvm->nvm_data->bands[0].n_channels = 1;
823 mvm->nvm_data->bands[0].n_bitrates = 1;
824 mvm->nvm_data->bands[0].bitrates =
825 (void *)mvm->nvm_data->channels + 1;
826 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
827 }
828
829 return ret;
830}
831
832static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm,
833 struct iwl_rx_packet *pkt)
834{
835 struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
836 int i;
837
838 mvm->shared_mem_cfg.num_txfifo_entries =
839 ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size);
840 for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
841 mvm->shared_mem_cfg.txfifo_size[i] =
842 le32_to_cpu(mem_cfg->txfifo_size[i]);
843 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
844 mvm->shared_mem_cfg.rxfifo_size[i] =
845 le32_to_cpu(mem_cfg->rxfifo_size[i]);
846
847 BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) !=
848 sizeof(mem_cfg->internal_txfifo_size));
849
850 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size);
851 i++)
852 mvm->shared_mem_cfg.internal_txfifo_size[i] =
853 le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
854}
855
856static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm,
857 struct iwl_rx_packet *pkt)
858{
859 struct iwl_shared_mem_cfg_v1 *mem_cfg = (void *)pkt->data;
860 int i;
861
862 mvm->shared_mem_cfg.num_txfifo_entries =
863 ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size);
864 for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
865 mvm->shared_mem_cfg.txfifo_size[i] =
866 le32_to_cpu(mem_cfg->txfifo_size[i]);
867 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
868 mvm->shared_mem_cfg.rxfifo_size[i] =
869 le32_to_cpu(mem_cfg->rxfifo_size[i]);
870
871 /* new API has more data, from rxfifo_addr field and on */
872 if (fw_has_capa(&mvm->fw->ucode_capa,
873 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
874 BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) !=
875 sizeof(mem_cfg->internal_txfifo_size));
876
877 for (i = 0;
878 i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size);
879 i++)
880 mvm->shared_mem_cfg.internal_txfifo_size[i] =
881 le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
882 }
883}
884
885static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
886{
887 struct iwl_host_cmd cmd = {
888 .flags = CMD_WANT_SKB,
889 .data = { NULL, },
890 .len = { 0, },
891 };
892 struct iwl_rx_packet *pkt;
893
894 lockdep_assert_held(&mvm->mutex);
895
896 if (fw_has_capa(&mvm->fw->ucode_capa,
897 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
898 cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
899 else
900 cmd.id = SHARED_MEM_CFG;
901
902 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
903 return;
904
905 pkt = cmd.resp_pkt;
906 if (iwl_mvm_has_new_tx_api(mvm))
907 iwl_mvm_parse_shared_mem_a000(mvm, pkt);
908 else
909 iwl_mvm_parse_shared_mem(mvm, pkt);
910
911 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
912
913 iwl_free_resp(&cmd);
914}
915
916static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
917{
918 struct iwl_ltr_config_cmd cmd = {
919 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
920 };
921
922 if (!mvm->trans->ltr_enabled)
923 return 0;
924
925 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
926 sizeof(cmd), &cmd);
927}
928
929#define ACPI_WRDS_METHOD "WRDS"
930#define ACPI_WRDS_WIFI (0x07)
931#define ACPI_WRDS_TABLE_SIZE 10
932
933struct iwl_mvm_sar_table {
934 bool enabled;
935 u8 values[ACPI_WRDS_TABLE_SIZE];
936};
937
938#ifdef CONFIG_ACPI
939static int iwl_mvm_sar_get_wrds(struct iwl_mvm *mvm, union acpi_object *wrds,
940 struct iwl_mvm_sar_table *sar_table)
941{
942 union acpi_object *data_pkg;
943 u32 i;
944
945 /* We need at least two packages, one for the revision and one
946 * for the data itself. Also check that the revision is valid
947 * (i.e. it is an integer set to 0).
948 */
949 if (wrds->type != ACPI_TYPE_PACKAGE ||
950 wrds->package.count < 2 ||
951 wrds->package.elements[0].type != ACPI_TYPE_INTEGER ||
952 wrds->package.elements[0].integer.value != 0) {
953 IWL_DEBUG_RADIO(mvm, "Unsupported wrds structure\n");
954 return -EINVAL;
955 }
956
957 /* loop through all the packages to find the one for WiFi */
958 for (i = 1; i < wrds->package.count; i++) {
959 union acpi_object *domain;
960
961 data_pkg = &wrds->package.elements[i];
962
963 /* Skip anything that is not a package with the right
964 * amount of elements (i.e. domain_type,
965 * enabled/disabled plus the sar table size.
966 */
967 if (data_pkg->type != ACPI_TYPE_PACKAGE ||
968 data_pkg->package.count != ACPI_WRDS_TABLE_SIZE + 2)
969 continue;
970
971 domain = &data_pkg->package.elements[0];
972 if (domain->type == ACPI_TYPE_INTEGER &&
973 domain->integer.value == ACPI_WRDS_WIFI)
974 break;
975
976 data_pkg = NULL;
977 }
978
979 if (!data_pkg)
980 return -ENOENT;
981
982 if (data_pkg->package.elements[1].type != ACPI_TYPE_INTEGER)
983 return -EINVAL;
984
985 sar_table->enabled = !!(data_pkg->package.elements[1].integer.value);
986
987 for (i = 0; i < ACPI_WRDS_TABLE_SIZE; i++) {
988 union acpi_object *entry;
989
990 entry = &data_pkg->package.elements[i + 2];
991 if ((entry->type != ACPI_TYPE_INTEGER) ||
992 (entry->integer.value > U8_MAX))
993 return -EINVAL;
994
995 sar_table->values[i] = entry->integer.value;
996 }
997
998 return 0;
999}
1000
1001static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm,
1002 struct iwl_mvm_sar_table *sar_table)
1003{
1004 acpi_handle root_handle;
1005 acpi_handle handle;
1006 struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL};
1007 acpi_status status;
1008 int ret;
1009
1010 root_handle = ACPI_HANDLE(mvm->dev);
1011 if (!root_handle) {
1012 IWL_DEBUG_RADIO(mvm,
1013 "Could not retrieve root port ACPI handle\n");
1014 return -ENOENT;
1015 }
1016
1017 /* Get the method's handle */
1018 status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD,
1019 &handle);
1020 if (ACPI_FAILURE(status)) {
1021 IWL_DEBUG_RADIO(mvm, "WRDS method not found\n");
1022 return -ENOENT;
1023 }
1024
1025 /* Call WRDS with no arguments */
1026 status = acpi_evaluate_object(handle, NULL, NULL, &wrds);
1027 if (ACPI_FAILURE(status)) {
1028 IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status);
1029 return -ENOENT;
1030 }
1031
1032 ret = iwl_mvm_sar_get_wrds(mvm, wrds.pointer, sar_table);
1033 kfree(wrds.pointer);
1034
1035 return ret;
1036}
1037#else /* CONFIG_ACPI */
1038static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm,
1039 struct iwl_mvm_sar_table *sar_table)
1040{
1041 return -ENOENT;
1042}
1043#endif /* CONFIG_ACPI */
1044
1045static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1046{
1047 struct iwl_mvm_sar_table sar_table;
1048 struct iwl_dev_tx_power_cmd cmd = {
1049 .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
1050 };
1051 int ret, i, j, idx;
1052 int len = sizeof(cmd);
1053
1054 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
1055 len = sizeof(cmd.v3);
1056
1057 ret = iwl_mvm_sar_get_table(mvm, &sar_table);
1058 if (ret < 0) {
1059 IWL_DEBUG_RADIO(mvm,
1060 "SAR BIOS table invalid or unavailable. (%d)\n",
1061 ret);
1062 /* we don't fail if the table is not available */
1063 return 0;
1064 }
1065
1066 if (!sar_table.enabled)
1067 return 0;
1068
1069 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
1070
1071 BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS !=
1072 ACPI_WRDS_TABLE_SIZE);
1073
1074 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1075 IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
1076 for (j = 0; j < IWL_NUM_SUB_BANDS; j++) {
1077 idx = (i * IWL_NUM_SUB_BANDS) + j;
1078 cmd.v3.per_chain_restriction[i][j] =
1079 cpu_to_le16(sar_table.values[idx]);
1080 IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
1081 j, sar_table.values[idx]);
1082 }
1083 }
1084
1085 ret = iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
1086 if (ret)
1087 IWL_ERR(mvm, "failed to set per-chain TX power: %d\n", ret);
1088
1089 return ret;
1090}
1091
1092int iwl_mvm_up(struct iwl_mvm *mvm)
1093{
1094 int ret, i;
1095 struct ieee80211_channel *chan;
1096 struct cfg80211_chan_def chandef;
1097
1098 lockdep_assert_held(&mvm->mutex);
1099
1100 ret = iwl_trans_start_hw(mvm->trans);
1101 if (ret)
1102 return ret;
1103
1104 /*
1105 * If we haven't completed the run of the init ucode during
1106 * module loading, load init ucode now
1107 * (for example, if we were in RFKILL)
1108 */
1109 ret = iwl_run_init_mvm_ucode(mvm, false);
1110
1111 if (iwlmvm_mod_params.init_dbg)
1112 return 0;
1113
1114 if (ret) {
1115 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1116 /* this can't happen */
1117 if (WARN_ON(ret > 0))
1118 ret = -ERFKILL;
1119 goto error;
1120 }
1121
1122 /*
1123 * Stop and start the transport without entering low power
1124 * mode. This will save the state of other components on the
1125 * device that are triggered by the INIT firwmare (MFUART).
1126 */
1127 _iwl_trans_stop_device(mvm->trans, false);
1128 ret = _iwl_trans_start_hw(mvm->trans, false);
1129 if (ret)
1130 goto error;
1131
1132 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1133 if (ret) {
1134 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1135 goto error;
1136 }
1137
1138 iwl_mvm_get_shared_mem_conf(mvm);
1139
1140 ret = iwl_mvm_sf_update(mvm, NULL, false);
1141 if (ret)
1142 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1143
1144 mvm->fw_dbg_conf = FW_DBG_INVALID;
1145 /* if we have a destination, assume EARLY START */
1146 if (mvm->fw->dbg_dest_tlv)
1147 mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
1148 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
1149
1150 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1151 if (ret)
1152 goto error;
1153
1154 ret = iwl_send_bt_init_conf(mvm);
1155 if (ret)
1156 goto error;
1157
1158 /* Send phy db control command and then phy db calibration*/
1159 ret = iwl_send_phy_db_data(mvm->phy_db);
1160 if (ret)
1161 goto error;
1162
1163 ret = iwl_send_phy_cfg_cmd(mvm);
1164 if (ret)
1165 goto error;
1166
1167 /* Init RSS configuration */
1168 if (iwl_mvm_has_new_rx_api(mvm)) {
1169 ret = iwl_send_rss_cfg_cmd(mvm);
1170 if (ret) {
1171 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1172 ret);
1173 goto error;
1174 }
1175 }
1176
1177 /* init the fw <-> mac80211 STA mapping */
1178 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1179 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1180
1181 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
1182
1183 /* reset quota debouncing buffer - 0xff will yield invalid data */
1184 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1185
1186 /* Enable DQA-mode if required */
1187 if (iwl_mvm_is_dqa_supported(mvm)) {
1188 ret = iwl_mvm_send_dqa_cmd(mvm);
1189 if (ret)
1190 goto error;
1191 } else {
1192 IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n");
1193 }
1194
1195 /* Add auxiliary station for scanning */
1196 ret = iwl_mvm_add_aux_sta(mvm);
1197 if (ret)
1198 goto error;
1199
1200 /* Add all the PHY contexts */
1201 chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
1202 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1203 for (i = 0; i < NUM_PHY_CTX; i++) {
1204 /*
1205 * The channel used here isn't relevant as it's
1206 * going to be overwritten in the other flows.
1207 * For now use the first channel we have.
1208 */
1209 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1210 &chandef, 1, 1);
1211 if (ret)
1212 goto error;
1213 }
1214
1215#ifdef CONFIG_THERMAL
1216 if (iwl_mvm_is_tt_in_fw(mvm)) {
1217 /* in order to give the responsibility of ct-kill and
1218 * TX backoff to FW we need to send empty temperature reporting
1219 * cmd during init time
1220 */
1221 iwl_mvm_send_temp_report_ths_cmd(mvm);
1222 } else {
1223 /* Initialize tx backoffs to the minimal possible */
1224 iwl_mvm_tt_tx_backoff(mvm, 0);
1225 }
1226
1227 /* TODO: read the budget from BIOS / Platform NVM */
1228 if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) {
1229 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1230 mvm->cooling_dev.cur_state);
1231 if (ret)
1232 goto error;
1233 }
1234#else
1235 /* Initialize tx backoffs to the minimal possible */
1236 iwl_mvm_tt_tx_backoff(mvm, 0);
1237#endif
1238
1239 WARN_ON(iwl_mvm_config_ltr(mvm));
1240
1241 ret = iwl_mvm_power_update_device(mvm);
1242 if (ret)
1243 goto error;
1244
1245 /*
1246 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1247 * anyway, so don't init MCC.
1248 */
1249 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1250 ret = iwl_mvm_init_mcc(mvm);
1251 if (ret)
1252 goto error;
1253 }
1254
1255 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1256 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1257 ret = iwl_mvm_config_scan(mvm);
1258 if (ret)
1259 goto error;
1260 }
1261
1262 if (iwl_mvm_is_csum_supported(mvm) &&
1263 mvm->cfg->features & NETIF_F_RXCSUM)
1264 iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3);
1265
1266 /* allow FW/transport low power modes if not during restart */
1267 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1268 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1269
1270 ret = iwl_mvm_sar_init(mvm);
1271 if (ret)
1272 goto error;
1273
1274 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1275 return 0;
1276 error:
1277 iwl_mvm_stop_device(mvm);
1278 return ret;
1279}
1280
1281int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1282{
1283 int ret, i;
1284
1285 lockdep_assert_held(&mvm->mutex);
1286
1287 ret = iwl_trans_start_hw(mvm->trans);
1288 if (ret)
1289 return ret;
1290
1291 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1292 if (ret) {
1293 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1294 goto error;
1295 }
1296
1297 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1298 if (ret)
1299 goto error;
1300
1301 /* Send phy db control command and then phy db calibration*/
1302 ret = iwl_send_phy_db_data(mvm->phy_db);
1303 if (ret)
1304 goto error;
1305
1306 ret = iwl_send_phy_cfg_cmd(mvm);
1307 if (ret)
1308 goto error;
1309
1310 /* init the fw <-> mac80211 STA mapping */
1311 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1312 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1313
1314 /* Add auxiliary station for scanning */
1315 ret = iwl_mvm_add_aux_sta(mvm);
1316 if (ret)
1317 goto error;
1318
1319 return 0;
1320 error:
1321 iwl_mvm_stop_device(mvm);
1322 return ret;
1323}
1324
1325void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1326 struct iwl_rx_cmd_buffer *rxb)
1327{
1328 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1329 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1330 u32 flags = le32_to_cpu(card_state_notif->flags);
1331
1332 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1333 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1334 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1335 (flags & CT_KILL_CARD_DISABLED) ?
1336 "Reached" : "Not reached");
1337}
1338
1339void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1340 struct iwl_rx_cmd_buffer *rxb)
1341{
1342 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1343 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1344
1345 IWL_DEBUG_INFO(mvm,
1346 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1347 le32_to_cpu(mfuart_notif->installed_ver),
1348 le32_to_cpu(mfuart_notif->external_ver),
1349 le32_to_cpu(mfuart_notif->status),
1350 le32_to_cpu(mfuart_notif->duration));
1351}